NMIY-0020 Single Board Computer
Covers:  NMIY-0020 V. 1.0  10/17/97


1.    INTRODUCTION 
2.    CONVENTIONS  
3.    GETTING STARTED      
3.1.  CONNECTIONS AND BASIC OPERATIONS   
3.2.  TARGET AND DEVELOMPENT CONFIGURATION DIFFERENCES   
4.    CIRCUIT DESCRIPTION  
4.1.  PARALLEL PORTS     
4.2.  KEYPAD INTERFACE   
4.3.  MULTIPLEXING KEYBOARD AND A/D CHANNELS     
4.4.  LCD INTERFACE      
4.5.  SERIAL I/O 
4.6.  AC POWER SUPPLY    
4.7.  DC POWER, BATTERY BACKUP, AND RESET        
4.8.  ADDRESS DECODING   
4.9.  TROUBLESHOOTING    
5.    APPENDIX A:  MEMORY MAP      
6.    APPENDIX B:  MISCELLANEOUS JUMPERS   
7.    APPENDIX C:  GENERAL PURPOSE SOCKETS 
8.    APPENDIX D:  INPUT/OUTPUT JACKS      
9.    APPENDIX E:  FORTH PROGRAM EXAMPLES  
9.1.  ( * GENERIC KEYPAD INPUT AND LCD OUTPUT TEST ROUTINE              * )
9.2.  ( * NMIL-1055  24-BIT I/O  EXAMPLE                                * )        
9.3.  ( * NMIL-3003 64 INPUT HC COMPATIBLE BOARD EXAMPLE                * )  
9.4.  ( * NIMS-3005 TEST PROGRAM TO PRINT THE ASCII CHARACTERS:  A - Z  * )        
9.5.  ( * NMIL-4000 8-CHANNEL, 8-BIT, DIGITAL TO ANALOG BOARD EXAMPLE   * )    
9.6.  ( * NMIL-4004 1-CHANNEL, 12-BIT, ANALOG TO DIGITAL BOARD EXAMPLE  * )   
9.7.  ( * NMIL-5000 ACIA 1-CHANNEL SERIAL COMMUNICATIONS BOARD EXAMPLE  * )   
9.8.  ( * NMIL-7001 16-CHANNEL OPTO ISOLATOR OUTPUT BOARD EXAMPLE       * )        
9.9.  ( * NMIL-7003 8-CH. IN, 8-CH. OUT OPTO ISOLATOR BOARD EXAMPLE     * )      
9.10. ( * NMIL-7022 8-CHANNEL, MECHANICAL RELAY (SPST) BOARD EXAMPLE    * )    
9.11. ( * NMIL-7040 4-CHANNEL STEPPER MOTOR CONTROLLER BOARD EXAMPLE    * )    
9.12. ( * NMIL-7056 SERVO MOTOR DRIVER BOARD EXAMPLE                    * )    
9.13. ( * NMIL-9003 REAL TIME CLOCK BOARD EXAMPLE                       * )       
									* )


1. Introduction

The NMIY-0020 board is a low cost, production oriented, computer board.  
Facilities are included for memory-mapped serial communications, a real-time 
chip, LCD interface, keypad, and memory expansion to 64Kbytes of memory.  
Serial communication options include RS-232, RS-422, and RS-485 It will serve 
as host for the NMIL and NMIS series of Vertical Stacking Component (VSC) 
cards.  This ability gives it a great degree of flexibility in meeting 
customer application requirements.  The NMIY-0020 design allows purchasers 
custom board configuration, including only the facilities required by their 
application.

The NMIY-0020 has several options that make it adaptable to many uses.  The 
standard configuration is used as a base to allow the user many paths to 
achieving the control configuration that suits their application.  To provide 
the facilities that promote application development, the installed headers 
option allows flexibility in configuring memory.  Three languages for 
development, as well as monitor, are also available.  Other options include 
an on board power supply, up to 64K EPROM/RAM space, and three COM port 
standards.  Customized circuitry can be added in the prototyping area by the 
customer or New Micros.

Vertical Stacking Component (VSC) options further enhance flexibility.  More 
than a dozen NMIL/NMIS series peripheral cards are available to enhance 
off-the-shelf hardware solutions for control systems.  Custom card designs 
can also make use of the VSC connector for bus connection.

With these configuration options including the fully customizable interfaces, 
the NMIY-0020 processor board provides the user with the ability to construct 
a cost-effective, digital control unit for a wide range of applications.

Conventions describes the use of print conventions in this manual.
Getting Started provides some basic functional checks so that the user may 
quickly determine the status of the hardware.





2. Conventions
Several different type faces are used in this manual to distinguish items 
such as user input, screen output, etc.  This is a guide to reading the 
type-face conventions employed.

Conventions typeface is used to distinguish chapter titles at the beginning 
of each section.

FORTH indicates the formal name of a language, or a title reference to 
another manual chapter or chapter subsection title.

Enter  highlighting signifies a key name for function keys.  In a program 
dialog, highlighting indicates a user-keyed date entry.

OK indicates a response from software or operating system.

Bold text is used occasionally, where text requires special emphasis.

Command codes and addresses are always given in hexadecimal format.






3. Getting Started

3.1 Connections and basic operations

System operation requires power and communications connections.  A standard configuration requires 250 mA of regulated +5 VDC at connector J3.  The on-board power supply option requires 6.3 to 10.0 VAC input at connector J2.  The MAX232 chip develops its own +/- 10 VDC for RS-232C compatibility.
For development systems, a terminal (or PC with terminal emulation software) must be connected.  A cable with an RS-232 connector (DB25 or DB9) on one end and a 10-pin dual-row header connector on the other end is required.  This cable is not included with the NMIY-0020, and must be provided by the user or purchased separately from the supplier.  The COM port RS-232 serial connections are present at J9.  Pin J9-3 is data-out and pin J9-5 is data-in to the NMIY-0020 board.  See the section on I/O Connectors for additional detail on J9 connections.
Once power and terminal connections are established, the operating system or monitor EPROM in U2 can be used to work with basic board functions, such as the LCD or keypad interfaces.
The RS232 terminal connection requires a 9600 baud terminal with no parity, 8 data bits, and one stop bit (8N1).  On a PC, also check that the terminal emulator program is set to use the same physical port to which you have attached the serial interface cable (i.e. COM1:, COM2:, etc.).
Examples follow for users of BASIC, Monitor, and FORTH.  The examples are intended as quick checks of board function.  When the cursor (underscore) is present in an example, it will blink.  FORTH does not use a cursor.
The NMIY-0020 is an F68HC11 based single board computer with built-in LCD display interface and a 4x5 matrix keypad interface.  When purchased in development configuration, it is complete and ready to run.  The target version of the NMIY-0020 is made from the same printed circuit board, but has fewer parts installed.  Normally, a developer will use the NMIY-0020 for development, and high end projects, then switch to the lower cost NMIY-0020 (or a modified version of it - call NMI) when volume production begins.
To operate the NMIY-0020 system, plug in the wall transformer (optional) and connect a terminal to  the serial RS-232 connector.  Most terminals should plug in directly, with a straight through cable ( i.e. pin 1 to pin1, 2 to 2, 3 to 3, etc.).  The NMIY-0020 uses only lines 3 and 5 for output and input respectively, and pins 1 and 7 for ground.  Many terminals require additional handshaking signals to work, so pins 4 and 5  are hooked together on the DB25F connector, as are pins 6 and 20.  In this way the terminals that require the additional handshake signal have their own "clear to send" / "ready to send", and "data terminal ready" / "data set  ready" signals wrapped back around, indicating "always ready".

RS-232 connections, J6:

DB9F            DB25F           Signal Name
		1               Case ground
3               2               Serial in (to NMIY-0020)
2               3               Serial out (from NMIY-0020)
5               7               Electrical ground
7 to 8          4 to 5          CTS to RTS
4 to 6          6 to 20         DSR to DTR

In order to talk to the NMIY-0020 the terminal must have the correct bit 
settings.  The baud rate should be set at 9600 baud for the standard 2 MHz 
system (8 MHz crystal).  The NMIY-0020 sends and receives a bit protocol of 
one start bit, eight data bits, and on stop bit.

When the terminal is set correctly, every time you depress and release the 
reset button the NMIY-0020 should respond with:
   Max-FORTH Vx.x                  (Assuming you are using the FORTH)
Seeing this message means the terminal can see the NMIY-0020.  Press return 
on your terminal several times.  If the NMIY-0020 responds with  OK  each 
time, communications are established.

Your NMIY-0020 is now running and communicating as it should.

3.2 Target and development configuration differences.

Target configuration is a minimal, 5 Volt only, configuration.  The F68HC11, 
XTAL, reset circuit, various HC "glue" components, and three 28 pin JEDEC 
sockets.  Typically, a program developed in the "development configured" 
board will be installed in the 'generic target configured" board for 
production of a dedicated application.  The user must install the appropriate 
jumpers in place of the headers, which are not provided in the target 
configuration.

All configurations of the F68HC11 based NMIY-0020 boards use the same base PC board.  Configuration differences refer to the various option items available.

4. Circuit Description

4.1 Parallel ports

The F68HC11 has five parallel ports, Port A, B, C, D, and E.  Three ports of 
the F68HC11 are sacrificed to create a 64K address and data bus.  Although 
some of the remaining port lines have special multiplexed functions, they can 
all be used as inputs or as outputs according to their individual designs.  
Some of the port lines have direction registers allowing them to be used as 
either inputs or outputs.  Ports A, D, and E of the F68HC11 are brought out 
to connector  J11.  Power and ground are also available on J11.

INPUT - OUTPUT JACK J11
TOP VIEW
ROM/RAM EDGE OF CARD
X       PD5     1       o       o       2       PD4     X
X       PD3     3       o       o       4       PD2     X
X       PD1     5       o       o       6       PD0     X
	+5      7       o       o       8       +5
	GND     9       o       o       10      GND
X       PA7     11      o       o       12      PA6     O
O       PA5     13      o       o       14      PA4     O
X       PA3     15      o       o       16      PA2     I
I       PA1     17      o       o       18      PA0     I
	 +5     19      o       o       20       +5
	GND     21      o       o       22      GND

I       PE7     23      o       o       24      PE6     I
I       PE5     25      o       o       26      PE4     I
I       PE3     27      o       o       28      PE2     I
I       PE1     29      o       o       30      PE0     I
	 +5     31      o       o       32       +5
X       XCS     33      o       o       34      GND


X       Input and Output        I       Input           O       Output

The lines can be used as individual inputs or outputs, or in combination.  
There are very few applications, however, where pins are switched dynamically 
between inputs and outputs. The outputs of the F68HC11 can sink 1.6 mA to 
ground while letting the pin go no higher than 0.4 V for a 'zero' and source 
about 0.8 mA at 4.5 V for a "one".  In terms of control, this is a very small 
signal.  Most relays require over 50 times more current to operate.  LED's 
typically take 5 mA to be visible.  HC levels are such that the output is 
sufficient to drive the input of one pin on a TTL device or about a dozen of 
the lower power LSTTL inputs.  The output is sufficient to drive VMOS FET's 
and Darlingtons with an external pull up which can in turn control several 
amps of current.  Usually, however, a buffer will be needed to do serious 
non-HC interfacing.

4. The NMIY-0020 has a built-in Keypad Controller, the 74C923.  This device scans matrices of keys up to 4x5 without processor intervention.  Connection of the 74C923 Keypad Controller to the cpu is via F68HC11 Port E pins PE3 thru PE7 for key data and Port A pin PA0 for the key valid strobe.
The operation of the 74C923 Keypad Controller provides a high level Data Available Strobe to Port PA0 when a valid key is detected in the keyboard matrix.  This can be detected by the F68HC11 under software control and the key data can then be read from Port E as a binary number that represents the valid key on the keyboard.

Connector J7 provides the keyboard connection.  Compatible keyboards are common and should be similar to Grayhill Series 86 or 88 keyboards.  The pinout of J7 is:

KEYBOARD INPUT/OUTPUT JACK J7
TOP VIEW, NUMBERED LEFT TO RIGHT
1   2   3   4   5   6   7   8   9   
o   o   o   o   o   o   o   o   o
C   C   R   R   C   R   R   C   C
O   O   O   O   O   O   O   O   O
L   L   W   W   L   W   W   L   L
1   2   3   2   3   1   4   4   5


4.3. MULTIPLEXING KEYBOARD AND A/D CHANNELS

It is important to note that 5 of the 8 F68HC11 Port E A/D input channels can not be used while the Keyboard Controller is installed.  If more than three A/D channels are required the user may perform a simple modification to multiplex Port E with the 74C923 Keyboard Controller and the A/D input channels.  Following is a brief explanation:
1. Enable the 74C923 output enable functions so that the outputs of the 74C923 can be disabled to a high impedance condition.  To do this you need to remove the 74C923 IC from the IC socket and bend pin 14 out straight so that it will not plug-in when the 74C923 is replaced in the socket.  Next replace the 74C923 in the socket.
2. Attach a wire from the open 74C923 pin 14 to an available output pin on the F68hc11cpu in the J11 connector.  For example Port A pin PA4, J11 pin 14.
3. Add a software control sequence that will cause Port A pin PA4 to idle in the high level output condition (74C923 outputs off), output a low on PA4 (enable 74C923 outputs) prior to the read of the Port E key data, and return PA4 to the idle high condition after the read.
4. The A/D channels can now be used by placing a 4.7K ohm resistor or higher in series with the J5 Port E inputs.

4.4. LCD INTERFACE

The NMIY-0020 has a built-in connector (J1) and decode circuitry to allow direct interfacing to many of the popularly available, intelligent LCD displays.  A wide number of LCD modules can be accommodated, since many manufacturers make the modules with the same controller chips or control instructions.  Some of these manufacturers and AND, Densitron, Epson, Optrex, Sharp, and Seiko.  They come in configurations such as 1x8, 1x16, 2x16, 1x20, 2x20, etc., up to 4x40 or 2x80.
Connector J1 contains 16 pins but will accept the 14 pin or 16 pin ribbon connectors from the standard LCD modules as the pin out is common except for an additional enable signal for the larger displays.  J1 is configured to accept ribbon connectors that are taken off the back side of the LCD to allow flush mounting of the module's display face to a front panel.  Ribbon cables attached this way have their signals mirrored.
The LCD interface is hard addressed at four consecutive locations, $B080 through $B083 hex.  On board logic provides the necessary chip select and timing information to operate the displays.  Address line A0 goes directly to the displays, so each chip select represents two memory locations.  The smaller displays, with up to 80 characters, use only one display controller chip.  Those with a larger number of characters use additional display controller chips.  Those with 16 pin connectors have up to two controllers built-in.
The type display attached will determine its own access speed.  Generally they are listed at 450 ns.  This is fast enough for 1 MHz bus timing (6800 and 6500 type processors), but not fast enough for 2 MHz.  Almost all of the displays will work, however, at this higher speed, although using them this way means they are outside the manufacturer's specification.
The board provides little support to the display processor, other than the necessary  signals, voltages, and gated chip selects.  The handling of the displays follows the manufacturer's specifications for the particular display.  Extensive example program segments are shown in Appendix B for single controller, 2 line displays.  For other configurations and types refer to the manufacturer's literature.

4.5. SERIAL I/O

The F68HC11 has a full duplex hardware serial channel that operates at CMOS levels.  To use this serial channel with most standard communication interfaces, level converters are needed.  Drivers for RS-232C and RS-422/485 drivers are on the boards.  (It should be noted that only on driver should be used at a time to avoid contention between the receiver outputs.)
A zero by RS-232C specification is any voltage from +3 to +15 V, and a one is between -3 and -15 V.  To convert the HC signals to a suitable voltage range, the NMIY-0020 uses a single 16 pin device, the MAX232N.
The MAX232 is ideally suited for this use.  It not only provides an RS-232 receiver and transmitter pair for the F68HC11 processor, but also a spare RS-232 receiver and transmitter pair which can be used with port lines for handshaking or software driven UARTS, etc.  It also generates the higher voltages needed for full Rs-232 communications standards by way of an internal charge pump.  This allows output swings of a nominal +/- 9V, even though the chip is only supplied +5V.  (The negative output is also used to get the negative voltage bias for the display to increase contrast.)
The Rs-422 standard uses a voltage differential on a pair of conductors.  While the RS-232 at full voltage drive levels in electrically noisy environments is barely reliable at distances up to 1000 feet, RS-422 signals are considered reliable at distances up to 4000 feet.  The RS-422 signals are considered reliable at distances up to 4000 feet.  The RS-422 drivers operate over twisted pairs of wires, requiring only a single-sided 5 volt supply.  A full duplex connection for RS-422 requires two twisted pairs, one for transmit, one for receive.  The shield of the twisted pair should act as the common return path for the signals.
The Rs-485 interface uses the same specifications for its transmitters and receivers.  It allows a single twisted pair to be used for incoming and outgoing messages.  This is accomplished by having both a transmitter (with tri-state ability) and a receiver tied in parallel to the same twisted pair.  Multiple drop communications are possible under this scheme (up to 64 pairs).  Of course, in application the transmitter turns on and takes control of the lines only under software control.  The actual implementation of this control will be determined by the particular protocol being used in the communication network.  Usually one master sends an addressed message to one of multiple slaves and then turns off its master transmitter.  The addressed slave, recognizing its address will turn on its transmitter and respond with the requested data.
These two interfaces are accommodated on the NMIY-0020 by the addition of two 8 pin 75176's, which each contain a transmitter/receiver pair.  Whether the transmitter of the pair is active, or not, is controlled by a signal on one of its pins.
One of the 75176's (U13) has its receiver always enabled.  It is used exclusively as the RS-422 receiver.  The other 75176 (U12) can be used as the RS-422 transmitter if jumper H3 is grounded (i.e. in 42 position), or it can be used as the receiver and transmitter for the RS-485 interface as controlled by Port A pin PA3 (i.e. in 485 position).  In this case if PA3 is low, the 75176's transmitter is not active.  If PA3 is high its transmitter is active.

4.6. AC POWER SUPPLY

The power supply circuit on the NMIY-0020 is designed to allow the board to operate from a simple, low-voltage, AC wall-transformer.  It has three major sub-circuits:  rectification, regulation, and DC-DC conversion.  Battery backup capabilities are also provided to the 28 pin JEDEC sockets and the F68HC11 internal RAM, and a power-up, power-down reset circuit.
Connection J2 is for AC (9VAC) input or for DC voltages from +9 to +14 VDC.
The bridge rectifier converts AC to DC.  The 7805 regulates the rectified power to a constant +5 VDC.
The upper limit of +V is set by the ability of the 7805 to dissipate heat.  If a heat sink is added to the 7805, voltages is excess of 20 volts are possible.  Driving the 7805 too hard, however, will cause it to enter thermal overload and "shut down" its output.
The typical current required by the NMIY-0020 with 8K CMOS RAM and the Max-FORTH ROM at 2 MHz from 9 VAC is 60 mA.
The MAX232 Rs-232 interface chip generates its own + and - voltages for RS-232 levels.  A multiple stage charge pump produces _9V and -9V.  The negative output is also employed by the LCD to increase contrast.


4.7. DC POWER, BATTER BACKUP, AND RESET

Connector J3 provides a means to connect an external +5VDC power source or to access the on board +5VDC supply if the AC power connector is providing board power.  Other connections on J3 provide access to VBB and Ground.
The battery backup capability allows data retention in otherwise volatile CMOS RAMs and the processor's own internal RAM through main board power-downs.  A third terminal on connector J3 is marked VBB for Voltage Battery Backup.
The VBB terminal on J3 is connected to the VBB supply rail on the board by diode D1.  The VBB supply rail supplies the three 28 pin JEDEC sockets, and U15, the 8054HN reset circuit low-voltage indicator, and the 74HC4053 selector in the memory circuit.  If no power is applied to the VBB terminal, the VBB rail is supplied through D1 to within a diode drop of the supplying 5 volt rail (~4.4 volts).  When battery power is available at either J3-1 or the battery option (available from NMI) then VBB is supplied through D2 or D3 respectively to within one diode drop of  applied battery voltage.  (This may cause some problems with the Dallas Semiconductor DS1223 battery sockets, as they "write protect" their RAM at 4.75 V.  Running an elevated 5 volt supply may be necessary to accommodate these parts.  The purpose of this feature is, however, to do away with the need for those devices in final system configurations.
It is critical to meet the complete specification of the parts involved by applying correct backup voltage on the VBB pin.  This supply must be low enough to ensure that after the diode drop of D1 The VBB rail causes the 8054HN to issue a reset (~4.0 volts).  Otherwise reset will be inactive and the whole system will be powered by VBB.  It must also be high enough to ensure that after the diode drop of D2 or D3 the VBB rail will meet the processor's and external RAM's required backup voltage (listed as 4.0 V for F68HC11).  Therefore, the ideal voltage for the VBB supply is 4.3-4.5 V.  It should be pointed out, however, the Motorola specification appears to be overly conservative.  By empirical test, VBB supplies below 3 volts appear to be adequate.  Most CMOS RAMs will retain data down to 2.2 volts.  Accounting for the diode drop under such low currents, the VBB supply may work as low as 2.5 volts.
The processor battery backup supply enters the chip via the MODB pin.  Jumper block D controls the setting of MODB, either to ground or to VBB.  For successful backup of the processor's RAM, jumpers D and E must be in the Single Chip or Expanded Multiplexed settings.  When the VBB supply is used on the processor, it will retain its User Area through power down and remember its linkages to the external FORTH dictionary.

4.8. ADDRESS DECODING

The chip selects of the three JEDEC sockets are generated by an AT18V8Z PAL, 
U7.  The chip selects are then processed by a 74HC4053, U14, to allow battery 
backup.  CS1 selects U2 whenever the bus address is in the range 0200-7FFF.  
CS2 selects U3 whenever the bus address is in the range 8000-AFFF, B100-B5FF, 
or C000-DFFF.  CS3 selects U4 whenever the bus address is in the range E000-
FFFF for 8K devices or 8000-FFFF for 32K devices, as set by the H5 jumper.


4.9. TROUBLE SHOUTING

As always the first thing to do when troubleshooting is to check the power and ground connections.  An oscilloscope should be used to check signals.  The heat sink of the 7805 power regulator is a convenient place to hook a ground clip.  If +5 volts is present at J3 and the board is not operational, the next item to check is the oscillator.  Use the scope to observe EXTAL (Pin 7).  An 8 MHz sine wave (4 MHz for F68HC11 parts running 4 MHz XTAL's) varying from about 0.5 V lows to 4.5 V peaks.  XTAL (F68HC11 Pin 8) should have an identical waveshape, but of a much smaller amplitude.  If the sine waves are not present and there is +5 V power present between the power pins (VCC on pin 26 and GND on pin 52), then either the F68HC11 or the crystal are bad and require replacement.  There is one exception.  If the processor has executed a STOP instruction, the oscillator will stop.
When the oscillator is functioning correctly a 2 MHz (1 MHz) clean running square wave should be present at the E output on pin 5.  The E signal drives the timing for all external memory transfers.  This signal should transition nearly rail to rail, a 0.4 V low and 4.6 V high are normal.  Less amplitude can indicate a board short or an excessive load on the line external to the F68HC11.
The serial channel should send a sign-on message if no autostart ROM intervenes.  If no, the reset circuit could be bad, the serial converter could have failed, or the F68HC11 could be defective.  With the reset button depressed the RES line on pin 17 should be at ground.  When released, the pin should rise to 5 V.  If the reset pin is working and still no message is seen on the terminal, check PD1, the serial output line on pin 21.  When reset is exercised, this line should go from normally high through a sequence of toggles back to a high quiescent state.  The periods of the transitions are multiples of approximately 100 microseconds.  If this signal is not present, and there are no user ROMs in the board, the F68HC11 is suspect.  If the signal is present, check pin 3 of the DB25F connector.  I should normally be at -V (-9 V nominally) and should toggle to +V (+9 V nominally) at the same rate as the serial output line.  If this is happening and no message is seen, the RS-232 wiring or the terminal is suspect.

Check to see if J1 is connected to the DB25F RS-232 connector as follows:

DB9F              DB25F             Signal Name
		    1               Case ground
3                   2               Serial in to NMIY-0020
2                   3               Serial out from NMIY-0020
5                   7               Electrical ground
7 to 8           4 to 5             CTS to RTS
4 to 6           6 to 20            DSR to DTR

Check the voltages on pins 2 and 3.  If pin 3 is very negative and pin 2 is floating, both systems are trying to talk on the same line.  Pins 2 and 3 need to swapped on one end, either the terminal or the NMIY-0020.  Usually this is done with a "null modem" inserted where the two systems connect.
If the -V/+V signal was not found at pin 3, the RS-232 converter is not working.  Check pin 2 of the MAX232 for +V and pin 6 of the MAX232 for -V.  If these signals are not present, the charge pump of the MAX232 has failed.  Pin 7 of the MAX232, the output, should look the same as pin 3 of J9.  Except for the voltage differences, Pin 7 and 10 of the MAX232 should have the same waveshape.
Check pin 5 of J9 which is the serial into the board from the terminal.  It should normally be at a negative voltage between -3 and -15 V.  When a key is pressed on the terminal it should pulse to positive voltages between +3 and +15 V.  If it doesn't, the terminal or the RS-232 wiring are suspect.  The same signals at inverted TTL levels. Should also be at PD0, which is the serial input line of the processor on pin 20.
The most common error in trying to use the NMIY-0020 is mismatched baud rates or bit settings.  Verify that the terminal is set for 9600 baud with one start bit, eight data bits, and one stop bit, with no parity.  If using FORTH, be sure to use CAPITALS.  (Review this discussion in the Getting Started section.)
Appendix B:  Miscellaneous Jumpers

References to position on the board are with the LCD connector on the top edge and the RAM/ROM sockets on the bottom edge viewed from the component side of the board.
Jumper  Functions                               Location
H1              Selects bias for the LCD                Below keypad connector
GND or -9                               next to LCD pot
H2              Selects RS-232 or                       To the left of J3 near the right
		RS-422/485                              board edge
H3              Selects RS-422 or RS-485                Below H2
H4              Selects PA3 or +5V for RS-422   Below H3
H5              Selects +5 for 32K device at    To the right of PAL U7
		U4 or GND for 8K device at U4
H6              Connects OE* to J4, J5, and J6  Between PALs U7 and U8
H7              Reset switch connector          Between J3 and J4 on right edge
							of the board
D-A             D E :  Single Chip/                     Above Proc. U1
			   Expanded Multiplex
E-B             A-B:   No battery backup
F               Selects between IRQ* and                Above Proc. U1
XIRQ* for J4, J5, and J6
H, I, J         Pull-up location for battery            Next to upper right corner of U2,
		backup of devices in U2, U3,    U3, and U4
		and U4
HB, IB, JB      Selects battery backup for              To the right of N, O, and P
		RAM in U2, U3, and U4           respectively
J11             A/D voltage reference to U1     Next to Y1

N, O, P Memory configuration jumpers    Below U2, U3, U4
		See Memory Configuration for details


7. Appendix C:  General Purpose Sockets

Jumper Assignments for JEDEC 28 Pin Sockets
Jumper  1  o                    o  28   +5 Volts                        *
      A12       2  o                    o  27   Jumper
       A7       3  o                    o  26   Jumper
       A6       4  o                    o  25   A8
       A5       5  o                    o  24   A9
       A4       6  o                    o  23   A11
       A3       7  o                    o  22  OE*
       A2       8  o                    o  21   A10
       A1       9  o                    o  20   CS*
       A0        10  o                  o  19   D7
       D0        11  o                  o  18   D6
       D1        12  o                  o  17   D5
       D2        13  o                  o  16   D4
     Gnd        14  o                   o  15   D3
N, O, P:        PIN 1       PIN 26     PIN 27
		

A14   +5   +5    A13   A14   RR/W
*  Option of pull-ups on R/W lines to write protect RAMs in socket.  To use, install 100K pull-up resistor and remove jumper for pin 27.  If battery backup is in use, RAM will then emulate ROM.
Jumper settings for Standard JEDEC 24/28
ALL 8k x 8 DEVICES    2764, 2864, 6264
Pin 1                   Pin 26                    Pin 27
								   *

A14         +5V +5V        A13         A14      RR/W
16K x 8 EPROM     27128
Pin 1                   Pin 26                    Pin 27


A14         +5V +5V        A13         A14      RR/W
32K x 8 EPROM     27256
Pin 1                   Pin 26                    Pin 27


A14         +5V +5V        A13         A14      RR/W
32K x 8 RAM     62256
Pin 1                   Pin 26                    Pin 27
								   *

A14         +5V +5V        A13         A14      RR/W
*  Option of pull-ups on R/W lines to write protect RAMs in socket.  To use, install 100K pull-up resistor & remove jumper for pin 27.  If battery backup is in use, RAM will then emulate ROM.
8. Appendix D:  Input/Output Jacks
RS-232 SERIAL I/O JACK    J9                    KEYPAD JACK    J7, TOP VIEW
N.C.            1           2                                   P   N   M   L   K   J   H   G   F
XMIT            3           4                           
RCV             5           6                           Y1 Y2 X3 X2 Y3 X1 X4 Y4 Y5
DATA-B IN       7           8  DATA-A IN(422)         VSC EXPANSION JACK  J4, J5, AND J6
GND             9           10  N.C.            MEMDIS                  N.C.
							     E                  RST
LCD DISPLAY JACK   J1, TOP VIEW          A15                    INT
E2                15        16  N.C.                     A14                    +5
D7                13        14  D6                       A12                    R/W
D5                11        12  D4                       A7                     A13
D3                 9        10  D2                       A6                     A8
D1                 7        8   D0                       A5                     A9
E1                 5        6   R/W*                     A4                     A11
A0                 3        4   Vo                       A3                     OE*
+5                 1        2   GND                      A2                     A10
						       A1                       AS*
RS-422/RS-485 JACK  J10                A0                       D7
	N.C.    1            2       N.C.                       D0                      D6
	   3         4                          D1                      D5
	GND  5       6  GND                     D2                      D4
	   7         8  N.C.                 GND                        D3
N.C.    9           10  N.C.

The J4, J5, and J6 expansion connectors were designed to follow the JEDEC standard for byte sized memory parts in the 8, 16, and 32 K byte varieties.  The J4, J5, and J6 connectors on these boards are made to most closely match the more recently available 32K JEDEC parts.
9. 
Appendix E:  FORTH Program Examples


9.

( GENERIC KEYPAD INPUT AND LCD OUTPUT TEST ROUTINE

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404 DP !

: IS CONSTANT ;

B000 IS KPRDY
B00A IS KPDAT
B080 IS LCMD
B081 IS LDAT

: INIT-LCD
    38 LCMD C!
    38 LCMD C!
    06 LCMD C!
    0F LCMD C!
;

: CUR-HOME 2 LCMD C! ;

: LCD-CLEAR 1 LCMD C! ;

( Output one byte to LCD )
: DSP-DATA ( byte -- ) LDAT C! ;

: PA0?   ( Test key-pressed signal )
    BEGIN
      KPRDY C@ 1 AND
    UNTIL
    BEGIN  ( debounce keypad )
      KPRDY C@ 1 AND 0=
    UNTIL
;

( Get one keypad data byte )
: KP-DATA  ( -- byte )  KPDAT C@ 2/ 2/ 2/ ;


( Translate keypad byte to ASCII for LCD )
: KP-XLAT ( byte -- byte )
    DUP 4 MOD 33 SWAP - SWAP 4 / 4 * +
    DUP 39 > IF 7 + THEN
;

( Prints RAW keypad entry to terminal )
: TEST-KP
    BEGIN
      PA0?
      KP-DATA U.
      ?TERMINAL
    UNTIL
;

( Prints keypad entry to LCD in ASCII )
: TEST-KPLCD
    BEGIN
      PA0? KP-DATA
      KP-XLAT DSP-DATA
      ?TERMINAL
    UNTIL
;
9.
(  ******* NMIL-1055  24-Bit I/O  Example ******* )

(  ******* NMIL-1055  24-Bit I/O  Example ******* )

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404 DP !

: IS CONSTANT ;

8000 IS PORT-A
8001 IS PORT-B
8002 IS PORT-C
8003 IS CNTL-REG

: CFIG0 80 CNTL-REG C! ; ( Set PORT-A, PORT-B, and PORT-C to output)

: CFIG1 81 CNTL-REG C! ; ( Set PORT-A, B, & C 4-7 to output, PORT-C 0-3 input)

: CFIG2 82 CNTL-REG C! ; ( Set PORT-A & PORT-C to output, PORT-B input)

: IN PORT-B C@ U. ;      ( Read PORT-B and display the value. )

: IN-C0-3 PORT-C C@ 0F AND U. ; ( Read PORT-C bits 0-3 )

: OUT-A  ( data byte -- )  PORT-A C! ;  ( Send data byte to port A )

: OUT-B  ( data byte -- )  PORT-B C! ;  ( Send data byte to port B )

: OUT-C  ( data byte -- )  PORT-C C! ;  ( Send data byte to port C )

: OUT-C4-7 F0 PORT-C C! ;  ( Turn on PORT-C bits 4-7 )


( ******* NMIS-3000 32-IN 32-OUT Board Example ******* )

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404 DP !

: IS CONSTANT ;

8000 IS BASE-ADDRESS

BASE-ADDRESS 0 + IS PORTA
BASE-ADDRESS 1 + IS PORTB
BASE-ADDRESS 2 + IS PORTC
BASE-ADDRESS 3 + IS PORTD
BASE-ADDRESS 0 + IS PORTE
BASE-ADDRESS 1 + IS PORTF
BASE-ADDRESS 2 + IS PORTG
BASE-ADDRESS 3 + IS PORTH

: PA@ PORTA C@ U. ;
: PB@ PORTB C@ U. ;
: PC@ PORTC C@ U. ;
: PD@ PORTD C@ U. ;
: PE! PORTE C! ;
: PF! PORTF C! ;
: PG! PORTG C! ;
: PH! PORTH C! ;

: PAB@ PORTA @ U. ;
: PCD@ PORTC @ U. ;

: PEF! PORTE ! ;
: PGH! PORTG ! ;

: PD0? PD@ 0001 AND 0= NOT ;


9.
( ******* NMIL-3003 64 Input HC Compatible Board Example******* )

( ******* NMIL-3003 64 Input HC Compatible Board Example******* )

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404 DP !

: IS CONSTANT ;

8000 IS BASE-ADDRESS

BASE-ADDRESS 0 + IS PORTA
BASE-ADDRESS 1 + IS PORTB
BASE-ADDRESS 2 + IS PORTC
BASE-ADDRESS 3 + IS PORTD
BASE-ADDRESS 4 + IS PORTE
BASE-ADDRESS 5 + IS PORTF
BASE-ADDRESS 6 + IS PORTG
BASE-ADDRESS 7 + IS PORTH

: PA@ PORTA C@ ;
: PB@ PORTB C@ ;
: PC@ PORTC C@ ;
: PD@ PORTD C@ ;
: PE@ PORTE C@ ;
: PF@ PORTF C@ ;
: PG@ PORTG C@ ;
: PH@ PORTH C@ ;

: PAB@ PORTA @ ;
: PCD@ PORTC @ ;
: PEF@ PORTE @ ;
: PGH@ PORTG @ ;

: PD0? PD@ 0001 AND 0= NOT ;




( ******* NMIL-3004 64 Output HC Compatible Board Example ******* )

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404 DP !

: IS CONSTANT ;

8000 IS BASE-ADDRESS

BASE-ADDRESS 0 + IS PORTA
BASE-ADDRESS 1 + IS PORTB
BASE-ADDRESS 2 + IS PORTC
BASE-ADDRESS 3 + IS PORTD
BASE-ADDRESS 4 + IS PORTE
BASE-ADDRESS 5 + IS PORTF
BASE-ADDRESS 6 + IS PORTG
BASE-ADDRESS 7 + IS PORTH

: PA! PORTA C! ;
: PB! PORTB C! ;
: PC! PORTC C! ;
: PD! PORTD C! ;
: PE! PORTE C! ;
: PF! PORTF C! ;
: PG! PORTG C! ;
: PH! PORTH C! ;

: PAB! PORTA ! ;
: PCD! PORTC ! ;
: PEF! PORTE ! ;
: PGH! PORTG ! ;


9.
( **** NIMS-3005 TEST PROGRAM TO PRINT THE ASCII CHARACTERS:  A - Z  **** )

( **** NIMS-3005 TEST PROGRAM TO PRINT THE ASCII CHARACTERS:  A - Z  **** )

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404 DP !

: IS CONSTANT ;

8000 IS DATA.BUFFER
8001 IS STATUS.IN
8002 IS CONTROL.OUT
   1 IS STRB
   2 IS AUTO
   4 IS INIT'
   8 IS SLCTIN
  10 IS INT-ENABLE
   8 IS ERROR'
  10 IS SLCT
  20 IS POUT
  40 IS ACK'
  80 IS BUSY'

: SETUP SLCTIN INIT' OR CONTROL.OUT C! ;

: BUSY-WAIT BEGIN STATUS.IN C@ BUSY' AND 0= NOT UNTIL ;

: PEMIT
  BUSY-WAIT
  DATA.BUFFER C!
  CONTROL.OUT C@
  DUP STRB OR CONTROL.OUT C!
  CONTROL.OUT C!
;

: PRINT.CHARS
    5B 41 DO
    I PEMIT
  LOOP
  0D PEMIT
  0A PEMIT
;

: TEST
    SETUP
    PRINT.CHARS
;


9.
( ******* NMIL-4000 8-Channel, 8-Bit, Digital to Analog Board Example ******* )

( ******* NMIL-4000 8-Channel, 8-Bit, Digital to Analog Board Example ******* )

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( ************************************************** *)
(                                                                       )
(  This is a sample program segment to demonstrate      )
(  the use of the NMIL-4000 board with the NMIY-0020 )
(  processor board.                                             )
(                                                                       )
(  TEST will generate a rising ramp waveform on each    )
(  output with a DAC installed.                                 )
(                                                                       )
( ************************************************** *)

404 DP !

: IS CONSTANT ;
  
VARIABLE RAM-POINTER
1050 RAM-POINTER !
: RAM RAM-POINTER @ SWAP RAM-POINTER +! ;

2 RAM IS DAC1-RAM
2 RAM IS DAC2-RAM
2 RAM IS DAC3-RAM
2 RAM IS DAC4-RAM
2 RAM IS DAC5-RAM
2 RAM IS DAC6-RAM
2 RAM IS DAC7-RAM
2 RAM IS DAC8-RAM


8000 IS BASE-ADDRESS

BASE-ADDRESS 0 + IS DAC1-REG
BASE-ADDRESS 1 + IS DAC2-REG
BASE-ADDRESS 2 + IS DAC3-REG
BASE-ADDRESS 3 + IS DAC4-REG
BASE-ADDRESS 4 + IS DAC5-REG
BASE-ADDRESS 5 + IS DAC6-REG
BASE-ADDRESS 6 + IS DAC7-REG
BASE-ADDRESS 7 + IS DAC8-REG


DECIMAL

: DAC1-SCALED-2.56-MV-! DAC1-RAM @ 10 / DAC1-REG ! ;
: DAC2-SCALED-2.56-MV-! DAC2-RAM @ 10 / DAC2-REG ! ;
: DAC3-SCALED-2.56-MV-! DAC3-RAM @ 10 / DAC3-REG ! ;
: DAC4-SCALED-2.56-MV-! DAC4-RAM @ 10 / DAC4-REG ! ;
: DAC5-SCALED-2.56-MV-! DAC5-RAM @ 10 / DAC5-REG ! ;
: DAC6-SCALED-2.56-MV-! DAC6-RAM @ 10 / DAC6-REG ! ;
: DAC7-SCALED-2.56-MV-! DAC7-RAM @ 10 / DAC7-REG ! ;
: DAC8-SCALED-2.56-MV-! DAC8-RAM @ 10 / DAC8-REG ! ;

: DAC1-SCALED-10.0-MV-! DAC1-RAM @ 39 / DAC1-REG ! ;
: DAC2-SCALED-10.0-MV-! DAC2-RAM @ 39 / DAC2-REG ! ;
: DAC3-SCALED-10.0-MV-! DAC3-RAM @ 39 / DAC3-REG ! ;
: DAC4-SCALED-10.0-MV-! DAC4-RAM @ 39 / DAC4-REG ! ;
: DAC5-SCALED-10.0-MV-! DAC5-RAM @ 39 / DAC5-REG ! ;
: DAC6-SCALED-10.0-MV-! DAC6-RAM @ 39 / DAC6-REG ! ;
: DAC7-SCALED-10.0-MV-! DAC7-RAM @ 39 / DAC7-REG ! ;
: DAC8-SCALED-10.0-MV-! DAC8-RAM @ 39 / DAC8-REG ! ;

( Generalized DAC setting, parameters on stack )
: DAC-SET ( dac# mv --- )
  1- BASE-ADDRESS +
  SWAP
  10 ( OR 39 ) /
  SWAP
  C!
;


HEX

: TEST              ( Quick functional test of )
  0                 ( NMIL-4000 with NMIY-0020 )
  BEGIN
   1+
   DUP 8000 C!      ( U3 )
   DUP 8001 C!      ( U4 )
   DUP 8002 C!      ( U5 )
   DUP 8003 C!      ( U6 )
   DUP 8004 C!      ( U7 )
   DUP 8005 C!      ( U8 )
   DUP 8006 C!      ( U9 )
   DUP 8007 C!      ( U10 )
   ?TERMINAL
   500 1
   DO               ( delay loop allows for digital meter response time )
     0 0 0 DROP DROP DROP
   LOOP
  UNTIL
  DROP
;

: INITIALIZE-A
  0 DAC1-REG ! ( ALSO CLEARS DAC2 SINCE 16 BIT STORE )
  0 DAC3-REG ! ( ALSO CLEARS DAC4 SINCE 16 BIT STORE )
  0 DAC5-REG ! ( ALSO CLEARS DAC6 SINCE 16 BIT STORE )
  0 DAC7-REG ! ( ALSO CLEARS DAC8 SINCE 16 BIT STORE )
;

: INITIALIZE-B
  9 1
  DO
    0 ( mv ) I ( dac# ) DAC-SET
  LOOP
;

9.
( ******* NMIL-4004 1-Channel, 12-Bit, Analog to Digital Board Example ******* )

( ******* NMIL-4004 1-Channel, 12-Bit, Analog to Digital Board Example ******* )
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404 DP !

: IS CONSTANT ;

8000 IS CHNL
8002 IS A/D

: START-CONV CHNL C! 0 A/D C! ;

: DELAY 100 0 DO LOOP ;

: READ-A/D A/D @ ;

DECIMAL

: OUTPUT-20 20 * 0 41 UM/MOD SWAP DROP
  10 /MOD 10 /MOD
  48 + EMIT
  46 EMIT
  48 + EMIT
  48 + EMIT
  CR
;

: OUTPUT-10 10 * 0 41 UM/MOD SWAP DROP
  10 /MOD 10 /MOD
  48 + EMIT
  46 EMIT
  48 + EMIT
  48 + EMIT
  CR
;

: SCALE-10 10 * 0 41 UM/MOD SWAP DROP
  10 /MOD 10 /MOD
;


: DISP
  10 /MOD 10 /MOD 48 + EMIT
  ." ."
  48 + EMIT
  48 + EMIT
  32 EMIT 32 EMIT 32 EMIT
;

: DISPLAY-RESULTS
  8 0 
  DO
    0 START-CONV DELAY READ-A/D SCALE-10 DISP
    1 START-CONV DELAY READ-A/D SCALE-10 DISP
    2 START-CONV DELAY READ-A/D SCALE-10 DISP
    3 START-CONV DELAY READ-A/D SCALE-10 DISP
    4 START-CONV DELAY READ-A/D SCALE-10 DISP
    5 START-CONV DELAY READ-A/D SCALE-10 DISP
    6 START-CONV DELAY READ-A/D SCALE-10 DISP
    7 START-CONV DELAY READ-A/D SCALE-10 DISP
    CR
  LOOP
  8 0 DO
	08 EMIT
	13 EMIT
      LOOP
;

HEX

: SPACE
  20 EMIT 20 EMIT
  20 EMIT 20 EMIT
  20 EMIT 20 EMIT
;

: MAKE-HEADER
  CR
  20 EMIT 20 EMIT
  ." 1"  SPACE
  ." 2"  SPACE
  ." 3"  SPACE
  ." 4"  SPACE
  ." 5"  SPACE
  ." 6"  SPACE
  ." 7"  SPACE
  ." 8"  CR
  35 0 DO 5F EMIT LOOP
;

: PUT-TITLE
  1A 0 DO 0A EMIT LOOP
  1A 0 DO 0D EMIT 08 EMIT LOOP
  14 0 DO 20 EMIT LOOP
  ." CHANNEL READINGS"
;

: SCAN
  PUT-TITLE
  MAKE-HEADER CR
  BEGIN
    DISPLAY-RESULTS
  ?TERMINAL
  UNTIL
    KEY
    DROP
    8 0 DO 0A EMIT LOOP
    CR
;


9.
( ******* NMIL-5000 ACIA 1-Channel Serial Communications Board Example ******* )

( ******* NMIL-5000 ACIA 1-Channel Serial Communications Board Example ******* )

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404 DP !

: IS CONSTANT ;

8000 IS BASE-ADDR              ( set card addresses )
0 BASE-ADDR + IS DATA
1 BASE-ADDR + IS STATUS
2 BASE-ADDR + IS CMMAND
3 BASE-ADDR + IS CNTROL

: INIT                         ( control command -- )
   0 STATUS C!  ( program reset )
   CMMAND   C!  ( set command register )
   CNTROL   C!  ( set control register )
;

: TDREADY? STATUS C@ 10 AND ;  ( check if you can send )
: RDREADY? STATUS C@ 08 AND ;  ( check if you've received )

: S-EMIT  ( char -- )
   BEGIN TDREADY? UNTIL        ( wait until last char is done )
   DATA C!                     ( send next char )
;

: S-KEY  ( -- char )
   BEGIN RDREADY? UNTIL        ( wait until a char is here )
   DATA C@                     ( get it )
;

: S-?TERMINAL RDREADY? ;       ( is a char here now ? )

: S-TYPE  ( ca -- )            ( send a string )
	      COUNT ?DUP IF
  ( ca+1 n )   0 DO
  ( ca+i   )    COUNT S-EMIT LOOP
	      THEN
  ( ca+i   )  DROP
;


: ~S-CR?  ( CHAR -- CHAR 0 | 1 )
    DUP 0D = IF SPACE 0 ELSE DROP 1 THEN 
;

: S-BS  ( ca ca+i -- ca f )
    OVER SWAP U< IF
    8 EMIT THEN 0 ;

: S-CHAR?  ( ca+u ca' char -- ca+u ca'+1 f )
  ( ca+u ca' char )  DUP EMIT  ( display char )
  ( ca+u ca' char )  OVER C!   ( save char in buffer )
  ( ca+u ca'      )  1+        ( bump pointer )
  ( ca+u ca'+1    )  2DUP U< ; ( buffer full ? )

: S-EXPECT  ( ca +n -- )       ( accepts remote string )
			       ( stores at address ca )
			       ( no more than +n chars, not counting )
			       ( those that were backspaced )
			       ( echoes string to terminal )
  ( ca u         )  OVER + OVER
  ( ca ca+u ca   )  BEGIN
  ( ca ca+u ca+i )   S-KEY ~S-CR? IF
		      DUP 7F = IF    ( funny backspace char ? )
		       DROP S-BS     ( backspace )
		       ELSE S-CHAR?  ( or handle char )
		      THEN
		     THEN
		    UNTIL 2DROP DROP  ( quit if CR or buffer full )
;

( debugging commands )

: .STATUS                      ( reports status register )
   STATUS C@
   DUP 80 AND IF ." Interrupt " CR THEN
   DUP 40 AND IF ." DSR High (not ready)" CR THEN
   DUP 20 AND IF ." DCD High ( not ready)" CR THEN
   DUP 10 AND 0= IF ." Transmitter not empty" CR THEN
   DUP  8 AND IF ." Receiver full" CR THEN
   DUP  4 AND IF ." Overrun" CR THEN
   DUP  2 AND IF ." Framing error" CR THEN
	1 AND IF ." Parity error" CR THEN
;


: PARITY-TYPE  ( x -- )        ( used by another routine )
    DUP 0C0 AND
    DUP   0= IF ." Odd parity set"  THEN
    DUP 40 = IF ." Even parity set" THEN
    DUP 80 = IF ." Mark parity set, no checking"  THEN
       0C0 = IF ." Space parity set, no checking" THEN CR
;

: .RTS  ( x -- )               ( used by another routine )
   DUP 0C AND
   DUP  0= IF ." RTS high, transmitter disabled" THEN
   DUP 4 = IF ." RTS low,  transmitter interrupt  enabled" THEN
   DUP 8 = IF ." RTS low,  transmitter interrupt disabled" THEN
      0C = IF ." RTS low,  transmitter interrupt disabled" THEN
   CR
;

: .COMMAND                     ( reports command register )
   CMMAND C@
   DUP 20 AND IF PARITY-TYPE ELSE
    ." Parity mode disabled, no parity sent, no checking" CR
   THEN
   DUP 10 AND IF ." Receiver echoes" CR THEN
   .RTS
   DUP 2 AND IF ." Receiver interrupt request interrupt disabled" ELSE
		." Receiver interrupt request interrupt enabled" THEN CR
       1 AND IF ." DTR low, ready" ELSE ." DTR high, not ready"
	     THEN CR
;

: 8BITS-PAR  ( cmd -- cmd f )  ( subroutine to report stop bits )
   DUP 60 AND 0= CMMAND C@ 20 AND AND DUP IF
    ." 1 stop bit" THEN
;

: 5BITS-NO-PAR ( cmd -- cmd f )( subroutine to report stop bits )
   DUP 60 AND 60 = CMMAND C@ 20 AND 0= AND DUP IF
    ." 1.5 stop bits" THEN
;

: .STOPBITS  ( cmd -- cmd )    ( subroutine to report stop bits )
   DUP 80 AND 0= IF ." one stop bit" ELSE
    8BITS-PAR 0= IF 5BITS-NO-PAR 0= IF ." 2 stop bits" THEN THEN
   THEN CR
;


CREATE BAUDS DECIMAL
   0 ,  100 ,  150 ,  220 ,  269 ,  300 ,  600 , 1200 ,
2400 , 3600 , 4800 , 7200 , 9600 , 14400 , 19200 , 38400 ,
HEX

: #BITS  ( x -- n )            ( subroutine to report bits/char )
	 60 AND >< 2/
( 0-3 )  8 SWAP -
( 5-8 )  . ." bits" CR
;

: .CONTROL                     ( reports Control Register )
   CNTROL C@
   8 OVER 60 AND >< 2/ - . ." bits" CR .STOPBITS
   DUP 10 AND 0= IF ." external clock" ELSE
    0F AND 2* BAUDS + @ DECIMAL U. HEX ." Baud" THEN CR
;

: .?                           ( reports all registers )
   .COMMAND .CONTROL .STATUS
;

( for testing )

: TEST-SEND                    ( send a test pattern )
   1C CB INIT .?
   BEGIN
    FE 20 DO
      BEGIN TDREADY? UNTIL     ( wait until transmitter ready )
      I DATA C!                ( send new char )
     200 0 DO LOOP             ( wait in case remote is slow )
    LOOP
   0 UNTIL                     ( repeat until push reset button )
;

: TEST-GET1                    ( receive with no RTS handshaking )
			       ( RTS low )
   1C CB INIT
   BEGIN
    BEGIN RDREADY? UNTIL
    DATA C@ EMIT               ( get char )
    ?TERMINAL                  ( stop if keypress )
   UNTIL KEY DROP
;


: TEST-GET2                    ( receive with RTS handshaking for RS232 )
   1C CB INIT
   BEGIN
    CMMAND C@ 8 OR CMMAND C! ( RTS low )
    BEGIN RDREADY? UNTIL
    03 CMMAND C!              ( RTS high )
    DATA C@ EMIT               ( get char )
    ?TERMINAL                  ( stop if keypress )
   UNTIL KEY DROP
;

: TEST-FULL                      ( send and receive both )
   1C CB INIT                      ( full-duplex RS232 or RS422 )
   BEGIN
    FE 20 DO
     RDREADY? IF
      DATA C@ EMIT THEN        ( get char if char is received )
     BEGIN TDREADY? UNTIL      ( wait until transmitter ready )
      I DATA C!                    ( send char )
     100 0 DO LOOP             ( wait in case remote is slow )
    LOOP
   0 UNTIL
;

: TEST-GET3                      ( receive with no RTS handshaking )
					     ( RTS high )
   1C D3 INIT
   BEGIN
    BEGIN RDREADY? UNTIL
    DATA C@ EMIT               ( get char )
    ?TERMINAL                  ( stop if keypress )
   UNTIL KEY DROP
;


9.
( ******* NMIL-7001 16-Channel OPTO Isolator Output Board Example ******* )

( ******* NMIL-7001 16-Channel OPTO Isolator Output Board Example ******* )

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: 404 DP !

 IS CONSTANT ;

8000 IS PORT
8000 IS PORTA
8001 IS PORTB

( SIMPLE WRITE THAT SETS ALL OUTPUTS AT ONCE )
: PORT! PORT ! ;

( EXAMPLES THAT SET ONLY ONE BYTE AT A TIME )
: PORTA!  ( d-- )  PORTA C! ;
: PORTB!  ( d-- )  PORTB C! ;

( EXAMPLE THAT SETS ONLY ONE BIT AT A TIME )
( REQUIRES OVERMAPPING ON TOP OF RAM TO WORK WITH READ BACK )
: SET-1-ON  PORT @ FFFE AND PORT ! ;
: SET-1-OFF PORT @ 0001 OR  PORT ! ;




9.
( ******* NMIL-7003 8-Ch. In, 8-Ch. Out OPTO Isolator Board Example ******* )

( ******* NMIL-7003 8-Ch. In, 8-Ch. Out OPTO Isolator Board Example ******* )

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404 DP !

: IS CONSTANT ;

 8000 IS PORTA
 8001 IS PORTB

( EXAMPLES THAT SET OR READ ONLY ONE BYTE AT A TIME )
: PORTA@  ( d-- )  PORTA C@ ;
: PORTB!  ( d-- )  PORTB C! ;

( EXAMPLE THAT SETS ONLY ONE BIT AT A TIME )
( REQUIRES OVERMAPPING ON TOP OF RAM TO WORK WITH READ BACK )
: SET-1-ON  PORTB C@ FE AND PORTB C! ;
: SET-1-OFF PORTB C@ 01 OR  PORTB C! ;




9.
( ******* NMIL-7022 8-Channel, Mechanical Relay (SPST) Board Example ******* )

( ******* NMIL-7022 8-Channel, Mechanical Relay (SPST) Board Example ******* )

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404 DP !

: IS CONSTANT ;

8000 IS PORT
1050 IS RAM-COPY ( ANYWHERE THERE IS RAM )
( ALSO SEE NOTE ABOUT OVERMAPPING PORT BEHIND RAM )

( INITIALIZATION OF RAM AND OUTPUTS )
: CLEAR-ALL 0 RAM-COPY C! 0 PORT C! ;

: SET-ALL FF RAM-COPY C! FF PORT C! ;

( SIMPLE STORE THAT DEFINES ALL OUTPUTS AT ONCE )
: PALL! PORT C! ;

( EXAMPLES THAT CHANGE ONLY ONE BIT AT A TIME )
: J1-ON  RAM-COPY C@ 01 OR  DUP RAM-COPY C! PORT C! ;
: J1-OFF RAM-COPY C@ FE AND DUP RAM-COPY C! PORT C! ;
: J2-ON  RAM-COPY C@ 02 OR  DUP RAM-COPY C! PORT C! ;
: J2-OFF RAM-COPY C@ FD AND DUP RAM-COPY C! PORT C! ;
: J3-ON  RAM-COPY C@ 04 OR  DUP RAM-COPY C! PORT C! ;
: J3-OFF RAM-COPY C@ FB AND DUP RAM-COPY C! PORT C! ;
: J4-ON  RAM-COPY C@ 08 OR  DUP RAM-COPY C! PORT C! ;
: J4-OFF RAM-COPY C@ F7 AND DUP RAM-COPY C! PORT C! ;
: J5-ON  RAM-COPY C@ 10 OR  DUP RAM-COPY C! PORT C! ;
: J5-OFF RAM-COPY C@ EF AND DUP RAM-COPY C! PORT C! ;
: J6-ON  RAM-COPY C@ 20 OR  DUP RAM-COPY C! PORT C! ;
: J6-OFF RAM-COPY C@ DF AND DUP RAM-COPY C! PORT C! ;
: J7-ON  RAM-COPY C@ 40 OR  DUP RAM-COPY C! PORT C! ;
: J7-OFF RAM-COPY C@ BF AND DUP RAM-COPY C! PORT C! ;
: J8-ON  RAM-COPY C@ 80 OR  DUP RAM-COPY C! PORT C! ;
: J8-OFF RAM-COPY C@ 7F AND DUP RAM-COPY C! PORT C! ;


( MORE ELEGANT FORTH EXAMPLE )
: TURN-ON  RAM-COPY C@ OR  DUP RAM-COPY C! PORT C! ;
: TURN-OFF RAM-COPY C@ AND DUP RAM-COPY C! PORT C! ;
: J1+ 1  TURN-ON ;  : J1- FE TURN-OFF ;
: J2+ 2  TURN-ON ;  : J2- FD TURN-OFF ;
: J3+ 4  TURN-ON ;  : J3- FB TURN-OFF ;
: J4+ 8  TURN-ON ;  : J4- F7 TURN-OFF ;
: J5+ 10 TURN-ON ;  : J5- EF TURN-OFF ;
: J6+ 20 TURN-ON ;  : J6- DF TURN-OFF ;
: J7+ 40 TURN-ON ;  : J7- BF TURN-OFF ;
: J8+ 80 TURN-ON ;  : J8- 7F TURN-OFF ;




9.
( ******* NMIL-7040 4-Channel Stepper Motor Controller Board Example ******* ) 

( ******* NMIL-7040 4-Channel Stepper Motor Controller Board Example ******* )

COLD
HEX

404 DP !

: IS CONSTANT ;

8000 IS STEP-REG

VARIABLE DELAY-VALUE  100 DELAY-VALUE !
VARIABLE LEFT-SWING    C8 LEFT-SWING  !
VARIABLE RIGHT-SWING   C8 RIGHT-SWING !
VARIABLE ACTIVE         2 ACTIVE      !

: L STEP-REG C@ . ;

CREATE PATTERN-TABLE
00 C, ( 0 )
01 C, ( 1 )
04 C, ( 2 )
10 C, ( 3 )
40 C, ( 4 )

: MOTOR-SELECT ( 1,2,3,4 ) 1 MAX 4 MIN PATTERN-TABLE + C@ ACTIVE ! ;

: LEFT  STEP-REG C@ ACTIVE @ OR         STEP-REG C! ;
: RIGHT STEP-REG C@ ACTIVE @ FF XOR AND STEP-REG C! ;

: TOGGLE STEP-REG C@ ACTIVE @ 2* XOR STEP-REG C! ;

: WAIT DELAY-VALUE @ 0 DO LOOP ;

: STEP TOGGLE WAIT TOGGLE WAIT ;

: RUN 0 DO ?TERMINAL IF LEAVE THEN STEP LOOP ;

: SEARCH
  BEGIN
    RIGHT RIGHT-SWING @ RUN
    LEFT  LEFT-SWING  @ RUN
  ?TERMINAL
  UNTIL
;

9.
( ******* NMIL-7056 Servo Motor Driver Board Example ******* )

( ******* NMIL-7056 Servo Motor Driver Board Example ******* )

COLD
HEX

404 DP !

: IS CONSTANT ;

8000 IS PORT
8001 IS DATAPORT

2VARIABLE REAL-POS ( v )
2VARIABLE ACCEPTABLE-ERROR
VARIABLE DS     ( derivative sample          )
VARIABLE KP     ( proportional constant      )
VARIABLE KI     ( integral constant          )
VARIABLE KD     ( derivative constant        )
VARIABLE IL     ( integration limit constant )
VARIABLE VEL-FACTOR


B000 IS PA
B02D IS SCCR2
B02E IS SCSR
B0AA IS PORTE


: STATUS@  PORT C@ ;

: BB?  BEGIN  STATUS@ 1 AND 0=  UNTIL
;

: COM!  PORT C! ;

: CMD!  COM! BB? ;

: LOAD-TRAJ  1F CMD! ;

: START-TRAJ  01 CMD! ;

: W!  DUP >< DATAPORT C! DATAPORT C! BB? ;

: DW!  W! W! ;


: W@  DATAPORT C@ 100 * DATAPORT C@ + BB? ;

: DW@  W@ W@ SWAP ;

: END?  STATUS@ 04 AND ;

: WAIT-FOR-MOVE-END  BEGIN  END?  UNTIL ;

: STOP  LOAD-TRAJ 0200 W! START-TRAJ WAIT-FOR-MOVE-END ;

: MOTOR-OFF  LOAD-TRAJ 0100 W! START-TRAJ ;

: MOTOR-ON  LOAD-TRAJ 0000 W! START-TRAJ ;

: DEFIN-HOME 02 CMD! ;

: READ-REAL-POS  0A CMD! DW@ REAL-POS 2! ;

: ABS-MOVE  ( n -- )
  LOAD-TRAJ
  002A W!       ( Cmd to loadd acc, vel, pos )
  0000.1000 DW! ( Acceleration )
  0010.0000 DW! ( Velocity )
  S->D DW!      ( Position )
  START-TRAJ
  WAIT-FOR-MOVE-END
;

: RELATIVE-MOVE  ( n -- )
  LOAD-TRAJ
  002B W!       ( Cmd to load acc, vel, pos )
  0000.1000 DW! ( Acceleration )
  0010.0000 DW! ( Velocity )
  S->D DW!      ( Position )
  START-TRAJ
  WAIT-FOR-MOVE-END
;

: RIGHT-VELOCITY-MOVE
  LOAD-TRAJ
  1828 W!       ( Command )
  0000.1000 DW! ( Acceleration )
  0010.0000 DW! ( Velocity )
  START-TRAJ
;


: LEFT-VELOCITY-MOVE
  LOAD-TRAJ
  102A W!       ( Command )
  0000.1000 DW! ( Acceleration )
  0002.0000 DW! ( Velocity )
  C000.0000 DW! ( Full neg pos )
  START-TRAJ
;

: JOG-RIGHT  200 RELATIVE-MOVE ;

: JOG-LEFT  -200 RELATIVE-MOVE ;

: SET-FILTERS  ( T.B.D )
    KP !
    KI !
  0 IL !
  0 KD !
  1 DS !
  2 VEL-FACTOR !
  0000.0080 ACCEPTABLE-ERROR 2!
  ( T.B.D )
;

: FILTER
  1E CMD!
  DS @ 100 * 0F OR W!
  KP @ W!
  KI @ W!
  KD @ W!
  IL @ W!
  04 CMD!
;

: RESET
  0 COM!         ( Software reset )
  1000 0 DO LOOP ( 1.5 ms wait loop min )
  1D CMD!        ( Resetting interrupts )
  0000 W!
;

: RES  RESET SET-FILTERS FILTER ;

: TRACKER  BEGIN  READ-REAL-POS 2@ D. CR ?TERMINAL  UNTIL ;

: LOAD-FILTER-PARA  1E CMD! ;


: UPDATE-FILTER-PARA 04 CMD! ;
: RI   RIGHT-VELOCITY-MOVE ;
: LE   LEFT-VELOCITY-MOVE ;
: REL  RELATIVE-MOVE ;
: DIS  READ-REAL-POS REAL-POS 2@ D. CR ;
: MR   RES  100 REL DIS DIS DIS ;
: ML   RES -100 REL DIS DIS DIS ;
: MR1  RES    1 REL DIS DIS DIS ;
: ML1  RES   -1 REL DIS DIS DIS ;
: R    MOTOR-OFF ;

DECIMAL 0 4 RES


9.
( ******* NMIL-9003 Real Time Clock Board Example ******* )

( ******* NMIL-9003 Real Time Clock Board Example ******* )

COLD
HEX

404 DP !

: IS CONSTANT ;
8000 IS BASE-ADDRESS

VARIABLE RAM-POINTER
1050 RAM-POINTER !

: RAM RAM-POINTER @ SWAP RAM-POINTER +! ;

2 RAM IS CR-AM/PM
2 RAM IS CR-MONTH
2 RAM IS CR-DAY
2 RAM IS CR-YEAR
2 RAM IS CR-HOUR
2 RAM IS CR-MINUTE
2 RAM IS CR-SECOND
2 RAM IS CR-DOW

BASE-ADDRESS 0 + IS 1-SEC-DIG
BASE-ADDRESS 1 + IS 10-SEC-DIG
BASE-ADDRESS 2 + IS 1-MIN-DIG
BASE-ADDRESS 3 + IS 10-MIN-DIG
BASE-ADDRESS 4 + IS 1-HRS-DIG
BASE-ADDRESS 5 + IS 10-HRS-DIG
BASE-ADDRESS 6 + IS 1-DAY-DIG
BASE-ADDRESS 7 + IS 10-DAY-DIG
BASE-ADDRESS 8 + IS 1-MON-DIG
BASE-ADDRESS 9 + IS 10-MON-DIG
BASE-ADDRESS A + IS 1-YRS-DIG
BASE-ADDRESS B + IS 10-YRS-DIG
BASE-ADDRESS C + IS 1-DOW-DIG
BASE-ADDRESS D + IS REG-D
BASE-ADDRESS E + IS REG-E
BASE-ADDRESS F + IS REG-F


0 IS SUN
1 IS MON
2 IS TUE
3 IS WED
4 IS THU
5 IS FRI
6 IS SAT

VARIABLE DAY$ -2 ALLOT
0A EMIT KEY DUP EMIT C, KEY DUP EMIT C, KEY DUP EMIT C, 
SUN
0A EMIT KEY DUP EMIT C, KEY DUP EMIT C, KEY DUP EMIT C, 
MON
0A EMIT KEY DUP EMIT C, KEY DUP EMIT C, KEY DUP EMIT C, 
TUE
0A EMIT KEY DUP EMIT C, KEY DUP EMIT C, KEY DUP EMIT C, 
WED
0A EMIT KEY DUP EMIT C, KEY DUP EMIT C, KEY DUP EMIT C, 
THU
0A EMIT KEY DUP EMIT C, KEY DUP EMIT C, KEY DUP EMIT C, 
FRI
0A EMIT KEY DUP EMIT C, KEY DUP EMIT C, KEY DUP EMIT C, 
SAT

: TEN* A * ;

: TEN/MOD A /MOD ;

: RELEASE-CLOCK 
  0 REG-D C!
;

: HOLD61  ( -- )
  RELEASE-CLOCK
  ( NO-OP:  Wait at least 61 uS )
  REG-D C@ DROP
  ( Reassert HOLD before leaving )
  5 REG-D C!
;

: HOLD-CLOCK
  5 REG-D C! ( TURN ON HOLD BIT )
  BEGIN REG-D C@ 2 AND IF HOLD61 0 ELSE 1 THEN UNTIL
  ( NOW READY TO READ OR WRITE - DON'T TAKE OVER 1 SEC THOUGH! )
;


( HIGH LEVEL READ )
: READ-CLOCK
  HOLD-CLOCK
  10-SEC-DIG C@   TEN* 1-SEC-DIG C@ + CR-SECOND !
  10-MIN-DIG C@   TEN* 1-MIN-DIG C@ + CR-MINUTE !
  10-HRS-DIG C@ 4 AND                            CR-AM/PM  ! 
  10-HRS-DIG C@ 3 AND TEN* 1-HRS-DIG C@ + CR-HOUR   ! 
  10-DAY-DIG C@       TEN* 1-DAY-DIG C@ + CR-DAY    !
  10-MON-DIG C@ TEN* 1-MON-DIG C@ + CR-MONTH  !
  10-YRS-DIG C@        TEN* 1-YRS-DIG C@ + CR-YEAR   !
  1-DOW-DIG  C@                                    CR-DOW    !
  RELEASE-CLOCK
;

: SET-12-HR-MODE
  REG-F C@ F0 AND 0 = NOT
  IF
    1 REG-F C!
    1 REG-F C!
    0 REG-F C!
  THEN
;

: SET-24-HR-MODE
  REG-F C@ F0 AND 4 = NOT
  IF
    1 REG-F C!
    5 REG-F C!
    4 REG-F C!
  THEN
;

: 12-HR-MODE?
  REG-F C@ 4 AND 0=
;

DECIMAL

: SET-SECOND
  0 MAX 59 MIN
  TEN/MOD 1-SEC-DIG SWAP 10-SEC-DIG
  HOLD-CLOCK
  C! C!
  RELEASE-CLOCK
;


: SET-MINUTE
  0 MAX 59 MIN
  TEN/MOD 1-MIN-DIG SWAP 10-MIN-DIG
  HOLD-CLOCK
  C! C!
  RELEASE-CLOCK
;

: SET-HOUR
  0 MAX 23 MIN 12-HR-MODE? IF 12 MAX THEN
  HOLD-CLOCK
  TEN/MOD CR-AM/PM @ 4 AND OR 10-HRS-DIG C! 1-HRS-DIG C!
  RELEASE-CLOCK
;

: SET-DAY
  1 MAX 31 MIN
  HOLD-CLOCK
  TEN/MOD 10-DAY-DIG C! 1-DAY-DIG C!
  RELEASE-CLOCK
;

: SET-MONTH
  1 MAX 12 MIN
  HOLD-CLOCK
  TEN/MOD 10-MON-DIG C! 1-MON-DIG C!
  RELEASE-CLOCK
;

: SET-YEAR
  0 MAX 100 MIN
  HOLD-CLOCK
  TEN/MOD 10-YRS-DIG C! 1-YRS-DIG C!
  RELEASE-CLOCK
;

: SET-DOW
  0 MAX 6 MIN
  HOLD-CLOCK
  1-DOW-DIG C!
  RELEASE-CLOCK
;


HEX

( Included only for convenience, clock setting entries
( must be on the stack with minutes on top, then hour, ...
( dow is first user entry

: SET-CLOCK
  SET-SECOND
  SET-MINUTE
  SET-HOUR
  SET-DAY
  SET-MONTH
  SET-YEAR
  SET-DOW
;

: 2.R
  TEN/MOD 30 OR EMIT 30 OR EMIT
;

: CLK
  READ-CLOCK
  CR
  CR-HOUR  @ 2.R ." :" CR-MINUTE @ 2.R ." :" CR-SECOND @ 2.R
  12-HR-MODE? IF CR-AM/PM @ IF ."  PM" ELSE ."  AM" THEN THEN SPACE
  CR-MONTH @ 2.R ." /" CR-DAY @ 2.R ." /" CR-YEAR @ 2.R
  SPACE CR-DOW   @ 3 * DAY$ + 3 TYPE SPACE
;

DECIMAL






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NMIY-0020 10/17/97 11:24 AM


