.ALIASES
M_M11           M11(d=N18557 g=0 s=N18637 b=VSS ) CN @AMI.SCHEMATIC1(sch_1):I00056111@AMIS06.CMOSN.Normal(chips)
I_I1            I1(+=VDD -=VBIAS ) CN @AMI.SCHEMATIC1(sch_1):I11822@SOURCE.IDC.Normal(chips)
M_M60           M60(d=N00499 g=VBIAS s=VSS b=VSS ) CN @AMI.SCHEMATIC1(sch_1):I000561@AMIS06.CMOSN.Normal(chips)
M_M31           M31(d=N18557 g=N18557 s=VDD b=VDD ) CN @AMI.SCHEMATIC1(sch_1):I00107112@AMIS06.CMOSP.Normal(chips)
M_M10           M10(d=N00352 g=0 s=N00499 b=VSS ) CN @AMI.SCHEMATIC1(sch_1):I00056@AMIS06.CMOSN.Normal(chips)
V_V3            V3(+=N07825 -=0 ) CN @AMI.SCHEMATIC1(sch_1):I10420@SOURCE.VAC.Normal(chips)
C_C4            C4(1=VOUT2 2=N18553 ) CN @AMI.SCHEMATIC1(sch_1):I1550600@ANALOG.C.Normal(chips)
C_C1            C1(1=0 2=VOUT1 ) CN @AMI.SCHEMATIC1(sch_1):I15506@ANALOG.C.Normal(chips)
M_M41           M41(d=N18553 g=N18557 s=VDD b=VDD ) CN @AMI.SCHEMATIC1(sch_1):I001070113@AMIS06.CMOSP.Normal(chips)
M_M80           M80(d=VOUT1 g=N00347 s=VDD b=VDD ) CN @AMI.SCHEMATIC1(sch_1):I00107049@AMIS06.CMOSP.Normal(chips)
V_V2            V2(+=0 -=VSS ) CN @AMI.SCHEMATIC1(sch_1):I012020@SOURCE.VDC.Normal(chips)
M_M30           M30(d=N00352 g=N00352 s=VDD b=VDD ) CN @AMI.SCHEMATIC1(sch_1):I00107@AMIS06.CMOSP.Normal(chips)
R_R2            R2(1=0 2=VOUT1 ) CN @AMI.SCHEMATIC1(sch_1):I26150@ANALOG.R.Normal(chips)
C_C2            C2(1=VOUT1 2=N00347 ) CN @AMI.SCHEMATIC1(sch_1):I155060@ANALOG.C.Normal(chips)
M_M21           M21(d=N18553 g=N18919 s=N18637 b=VSS ) CN @AMI.SCHEMATIC1(sch_1):I000560114@AMIS06.CMOSN.Normal(chips)
V_V4            V4(+=N18919 -=0 ) CN @AMI.SCHEMATIC1(sch_1):I18947@SOURCE.VAC.Normal(chips)
M_M61           M61(d=N18637 g=VBIAS s=VSS b=VSS ) CN @AMI.SCHEMATIC1(sch_1):I000561115@AMIS06.CMOSN.Normal(chips)
M_M40           M40(d=N00347 g=N00352 s=VDD b=VDD ) CN @AMI.SCHEMATIC1(sch_1):I001070@AMIS06.CMOSP.Normal(chips)
C_C3            C3(1=0 2=VOUT2 ) CN @AMI.SCHEMATIC1(sch_1):I155061@ANALOG.C.Normal(chips)
M_M51           M51(d=VBIAS g=VBIAS s=VSS b=VSS ) CN @AMI.SCHEMATIC1(sch_1):I00056086118@AMIS06.CMOSN.Normal(chips)
M_M50           M50(d=VBIAS g=VBIAS s=VSS b=VSS ) CN @AMI.SCHEMATIC1(sch_1):I00056086@AMIS06.CMOSN.Normal(chips)
R_R1            R1(1=0 2=VOUT2 ) CN @AMI.SCHEMATIC1(sch_1):I25990@ANALOG.R.Normal(chips)
M_M71           M71(d=VOUT2 g=VBIAS s=VSS b=VSS ) CN @AMI.SCHEMATIC1(sch_1):I0005610117@AMIS06.CMOSN.Normal(chips)
M_M81           M81(d=VOUT2 g=N18553 s=VDD b=VDD ) CN @AMI.SCHEMATIC1(sch_1):I00107049116@AMIS06.CMOSP.Normal(chips)
M_M70           M70(d=VOUT1 g=VBIAS s=VSS b=VSS ) CN @AMI.SCHEMATIC1(sch_1):I0005610@AMIS06.CMOSN.Normal(chips)
M_M20           M20(d=N00347 g=N07825 s=N00499 b=VSS ) CN @AMI.SCHEMATIC1(sch_1):I000560@AMIS06.CMOSN.Normal(chips)
V_V1            V1(+=VDD -=0 ) CN @AMI.SCHEMATIC1(sch_1):I01202@SOURCE.VDC.Normal(chips)
I_I2            I2(+=VDD -=VBIAS ) CN @AMI.SCHEMATIC1(sch_1):I11822119@SOURCE.IDC.Normal(chips)
_    _(vdd=VDD)
_    _(vbias=VBIAS)
_    _(vout1=VOUT1)
_    _(vout2=VOUT2)
_    _(vss=VSS)
.ENDALIASES