"nmos" is a three-terminal NFET representation. The bulk node is
initially set to "gnd!" but is modifiable from the property list. If you
want a four-terminal NFET, use "nmos4".

This version netlists to a "weak" (resistive) transistor (rnmos) than
can be overdriven by a regular device. It also has 0.1 units of delay
when simulated using Verilog.

