.ALIASES
D_D9            D9(1=N00212 2=VIN ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):INS5536@BREAKOUT.Dbreak.Normal(chips)
V_V1            V1(+=N00212 -=N00185 ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):I00003@CLASS.VSIN.Normal(chips)
X_Q1            Q1(c=VIN b=N01247 e=N03585 ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):I01221@CLASS.TIP102.Normal(chips)
X_U1A           U1A(+=N01080 -=N01366 V+=VIN V-=0 OUT=N01247 ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):I01002@EVAL.LM324.Normal(chips)
C_C2            C2(1=VO 2=0 ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):I01753@CLASS.C.Normal(chips)
R_R2            R2(1=VIN 2=N01080 ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):I01036@CLASS.R.Normal(chips)
X_D5            D5(A=0 K=N01080 ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):I01058@CLASS.LM385M-1.2.Normal(chips)
R_R3            R3(1=VO 2=N01366 ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):I01322@CLASS.R.Normal(chips)
R_Load          Load(1=VO 2=0 ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):I00606@CLASS.R.Normal(chips)
C_C1            C1(1=VIN 2=0 ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):I00374@CLASS.C.Normal(chips)
R_R4            R4(1=N01366 2=0 ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):I01344@CLASS.R.Normal(chips)
D_D7            D7(1=N00185 2=VIN ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):INS5443@BREAKOUT.Dbreak.Normal(chips)
R_R5            R5(1=N03585 2=VO ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):INS3519@CLASS.R.Normal(chips)
D_D6            D6(1=0 2=N00185 ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):INS5025@BREAKOUT.Dbreak.Normal(chips)
Q_Q2            Q2(c=N01247 b=N03585 e=VO ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):INS3828@EVAL.Q2N3904.Normal(chips)
C_C3            C3(1=VO 2=0 ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):I02635@CLASS.C.Normal(chips)
D_D8            D8(1=0 2=N00212 ) CN @HW1 PROBLEM 3.SCHEMATIC1(sch_1):INS5520@BREAKOUT.Dbreak.Normal(chips)
_    _(Vin=VIN)
_    _(Vo=VO)
.ENDALIASES