.ALIASES
V_Vs            Vs(+=N05671 -=0 ) CN @SEPIC.SCHEMATIC1(sch_1):INS5599@SOURCE.VDC.Normal(chips)
V_V2            V2(+=N05819 -=0 ) CN @SEPIC.SCHEMATIC1(sch_1):INS5829@SOURCE.VPULSE.Normal(chips)
R_R1            R1(1=0 2=OUTPUT ) CN @SEPIC.SCHEMATIC1(sch_1):INS5619@ANALOG.R.Normal(chips)
X_S1    S1(1=N05819 2=0 3=SWITCH 4=0 ) CN @SEPIC.SCHEMATIC1(sch_1):INS5641@BREAKOUT.Sbreak.Normal(chips)
C_C1            C1(1=SWITCH 2=N05939 ) CN @SEPIC.SCHEMATIC1(sch_1):INS5899@ANALOG.C.Normal(chips)
L_L2            L2(1=0 2=N05939 ) CN @SEPIC.SCHEMATIC1(sch_1):INS5915@ANALOG.L.Normal(chips)
L_L1            L1(1=N05671 2=SWITCH ) CN @SEPIC.SCHEMATIC1(sch_1):INS5701@ANALOG.L.Normal(chips)
C_C2            C2(1=0 2=OUTPUT ) CN @SEPIC.SCHEMATIC1(sch_1):INS5721@ANALOG.C.Normal(chips)
D_D1            D1(1=N05939 2=OUTPUT ) CN @SEPIC.SCHEMATIC1(sch_1):INS5737@BREAKOUT.Dbreak.Normal(chips)
_    _(Output=OUTPUT)
_    _(Switch=SWITCH)
.ENDALIASES