.ALIASES
V_Vin           Vin(+=IN -=0 ) CN @CHAPTER 14.Example 14.6(sch_1):I01249@SOURCE.VSIN.Normal(chips)
V_+VCC          +VCC(+=VCC -=0 ) CN @CHAPTER 14.Example 14.6(sch_1):I72849@SOURCE.VDC.Normal(chips)
V_-VCC          -VCC(+=0 -=-VCC ) CN @CHAPTER 14.Example 14.6(sch_1):I72875@SOURCE.VDC.Normal(chips)
Q_QP            QP(c=-VCC b=IN e=OUT ) CN @CHAPTER 14.Example 14.6(sch_1):I80379@SEDRA_LIB.QMJE253.Normal(chips)
R_RL            RL(1=OUT 2=0 ) CN @CHAPTER 14.Example 14.6(sch_1):I74853@ANALOG.R.Normal(chips)
Q_QN            QN(c=VCC b=IN e=OUT ) CN @CHAPTER 14.Example 14.6(sch_1):I80226@SEDRA_LIB.QMJE243.Normal(chips)
_    _(IN=IN)
_    _(OUT=OUT)
_    _(-VCC=-VCC)
_    _(VCC=VCC)
.ENDALIASES