m255
K3
13
cModel Technology
Z0 dC:\modeltech_6.5\examples
T_opt
Z1 V:`KVKVeFYJ^ZHm8TSASFc1
Z2 04 16 4 work first_counter_tb fast 0
Z3 =4-005056c00001-4a469321-1d1-100
Z4 o-quiet -auto_acc_if_foreign -work work +acc
Z5 n@_opt
Z6 OE;O;6.5;42
T_opt1
Z7 VI>7N:?7Cgo><[UMS2MS=L2
Z8 04 10 4 work bench_test fast 0
Z9 =6-005056c00001-4a469bca-3d5-d84
R4
Z10 n@_opt1
R6
T_opt2
Z11 VAM6`GLmh?EPNRTThDED]c2
Z12 04 8 4 work compteur fast 0
Z13 =1-005056c00001-4a469374-1e1-d74
R4
Z14 n@_opt2
R6
vbench_test
Z15 I9`I9R0R`0BHXen5BU6U`n2
Z16 V1JFaz4cfIO8hBT==C_@k<2
Z17 dC:\Verilog
Z18 w1246140453
Z19 8C:/Verilog/diviseur.v
Z20 FC:/Verilog/diviseur.v
Z21 L0 103
Z22 OE;L;6.5;42
r1
31
Z23 !s102 -nocovercells
Z24 o-work work -nocovercells -L mtiAvm -L mtiOvm -L mtiUPF
Z25 !s100 7QP1F:W1_l^ge4d9DjNIh2
!s85 0
vclock_diviseur
Z26 IdDogG>m?zWK[3IZIQH_@90
Z27 V]Q=aAWA>Q2[ODD5^lmQcK3
R17
Z28 w1246141376
R19
R20
L0 29
R22
r1
31
R23
R24
Z29 !s100 Ezj_<>4LOF@CYUm4lhji?1
!s85 0
vcompteur
Z30 IkSki=VQOX9V2^>d>jUOHz1
Z31 VeTWMVNUEOE6Gneg[oPf2Z0
R17
R18
R19
R20
L0 62
R22
r1
31
R23
R24
Z32 !s100 `UJ6:4FFN:_1CZVShgj830
!s85 0
vfirst_counter
Z33 IP9nC9FzZiWO2[PonR7RmU2
Z34 VGMIYGl0i:6:Tm:bfObkLD3
R17
Z35 w1246137298
R19
R20
L0 9
R22
r1
31
R23
R24
Z36 !s100 g7VEDOX7Ga_7P:Al0?OMO2
!s85 0
vfirst_counter_tb
Z37 I[mAmGeIf@U@?P1NPOC1dZ2
Z38 ViHACe[nSZM`Il0bkK_E5j2
R17
Z39 w1246139158
R19
R20
L0 64
R22
r1
31
R23
R24
Z40 !s100 1ad56n4:l5U?T0=fNgSWY0
!s85 0
vhz
Z41 IoAm3XZ[[n>NnUH6>J9>zW1
Z42 VlH_7TnBCiYB9LBQ3Q]9[Y3
R17
Z43 w1246140193
R19
R20
L0 3
R22
r1
31
R23
R24
Z44 !s100 hmIfOAz[VH4YEJa8PK?H:0
!s85 0
vtest
Z45 I?Of[^_>j7joI];@6B@=MB0
Z46 Vk<3<[f=78GX=_HO53D;7>3
R17
Z47 w1246136926
R19
R20
L0 43
R22
r1
31
R23
R24
Z48 !s100 62Z;KJ<^_G:GaV0U9j8^h1
!s85 0