$FILE_FORMAT_VERSION
	Version 1.1;
$END
$VECTOR_PREFERENCE
	descending;
$END
$GLOBAL_SIGNALS
	VDD!:::VERILOGAMS=(netType=wire);
	VSS!:::VERILOGAMS=(netType=wire);
$END
$INH_SIGNAL_CONN
	VSS!:VSS;
	VDD!:VDD;
$END
$INH_TERMINAL_CONN
	VDD:VDD=VDD!;
	VSS:VSS=VSS!;
$END
$TIMESTAMP
	1134103895=7-gpdk0906-pmos1v;
	1134103896=7-gpdk0906-pmos1v6-symbol;
	1134103877=7-gpdk0906-nmos1v;
	1134103878=7-gpdk0906-nmos1v6-symbol;
	-1=5-basic4-opin;
	1133906591=5-basic4-opin6-symbol;
	-1=5-basic4-ipin;
	1133906589=5-basic4-ipin6-symbol;
	1136387621=verilog.vams;
$END
