LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
LIBRARY IEEE;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;

package prim is

CONSTANT DefCombSpikeMsgOn : BOOLEAN := true;
CONSTANT DefCombSpikeXOn   : BOOLEAN := true;
CONSTANT DefSeqMsgOn       : BOOLEAN := true;
CONSTANT DefSeqXOn         : BOOLEAN := true;

CONSTANT DefDummyDelay    : VitalDelayType := 1.00 ns;
CONSTANT DefDummySetup    : VitalDelayType := 1.00 ns;
CONSTANT DefDummyHold     : VitalDelayType := 1.00 ns;
CONSTANT DefDummyWidth    : VitalDelayType := 1.00 ns;
CONSTANT DefDummyRecovery : VitalDelayType := 1.00 ns;
CONSTANT DefDummyRemoval  : VitalDelayType := 1.00 ns;
CONSTANT DefDummyIpd      : VitalDelayType := 0.00 ns;
CONSTANT DefDummyIsd      : VitalDelayType := 0.00 ns;
CONSTANT DefDummyIcd      : VitalDelayType := 0.00 ns;

CONSTANT udp_dff : VitalStateTableType (1 TO 21, 1 TO 7) := (
--    NOTIFIER   D      CLK     RN       S      Q(t)   Q(t+1)
     (  'X',    '-',    '-',    '-',    '-',    '-',    'X'  ),
     (  '-',    '-',    '-',    '-',    '1',    '-',    '1'  ),
     (  '-',    '-',    '-',    '1',    '0',    '-',    '0'  ),
     (  '-',    '0',    '/',    '-',    '0',    '-',    '0'  ),
     (  '-',    '1',    '/',    '0',    '-',    '-',    '1'  ),
     (  '-',    '1',    '*',    '0',    '-',    '1',    '1'  ),
     (  '-',    '0',    '*',    '-',    '0',    '0',    '0'  ),
     (  '-',    '-',    '\',   '-',    '-',    '-',    'S'  ),
     (  '-',    '*',    'B',    '-',    '-',    '-',    'S'  ),
     (  '-',    '-',    'B',    '0',    '*',    '1',    '1'  ),
     (  '-',    '1',    'X',    '0',    '*',    '1',    '1'  ),
     (  '-',    '-',    'B',    '*',    '0',    '0',    '0'  ),
     (  '-',    '0',    'X',    '*',    '0',    '0',    '0'  ),
     (  '-',    'B',    'r',    '-',    '-',    '-',    'X'  ),
     (  '-',    '/',    'X',    '-',    '-',    '-',    'X'  ),
     (  '-',    '-',    '-',    '-',    '*',    '-',    'X'  ),
     (  '-',    '-',    '-',    '*',    '-',    '-',    'X'  ),
     (  '-',    '-',    'f',    '-',    '-',    '-',    'X'  ),
     (  '-',    '\',   'X',    '0',    '-',    '-',    'X'  ),
     (  '-',    'B',    'X',    '-',    '-',    '-',    'S'  ),
     (  '-',    '-',    'S',    '-',    '-',    '-',    'S'  ));

CONSTANT udp_tlat : VitalStateTableType (1 TO 20, 1 TO 7) := (
--      NOT      D       G       R       S      Q(t)  Q(t+1)
     (  'X',    '-',    '-',    '-',    '-',    '-',    'X'  ),
     (  '-',    '-',    '-',    '-',    '1',    '-',    '1'  ),
     (  '-',    '-',    '-',    '1',    '0',    '-',    '0'  ),
     (  '-',    '1',    '1',    '0',    '-',    '-',    '1'  ),
     (  '-',    '0',    '1',    '-',    '0',    '-',    '0'  ),
     (  '-',    '1',    '*',    '0',    '-',    '1',    '1'  ),
     (  '-',    '0',    '*',    '-',    '0',    '0',    '0'  ),
     (  '-',    '*',    '0',    '-',    '-',    '-',    'S'  ),
     (  '-',    '-',    '0',    '0',    '*',    '1',    '1'  ),
     (  '-',    '1',    '-',    '0',    '*',    '1',    '1'  ),
     (  '-',    '-',    '0',    '*',    '0',    '0',    '0'  ),
     (  '-',    '0',    '-',    '*',    '0',    '0',    '0'  ),
     (  '-',    '0',    '-',    '-',    '0',    '0',    '0'  ),
     (  '-',    '1',    '-',    '0',    '-',    '1',    '1'  ),
     (  '-',    '*',    '-',    '-',    '-',    '-',    'X'  ),
     (  '-',    '-',    '-',    '*',    '-',    '-',    'X'  ),
     (  '-',    '-',    '-',    '-',    '*',    '-',    'X'  ),
     (  '-',    'B',    'r',    '0',    '0',    '-',    'X'  ),
     (  '-',    'B',    'X',    '0',    '0',    '-',    'S'  ),
     (  '-',    '-',    'S',    '-',    '-',    '-',    'S'  ) );

CONSTANT udp_rslat : VitalStateTableType (1 TO 12, 1 TO 5) := (
--      NOT      R       S      Q(t)  Q(t+1)
     (  'X',    '-',    '-',    '-',    'X'  ),
     (  '-',    '-',    '1',    '-',    '1'  ),
     (  '-',    '1',    '0',    '-',    '0'  ),
     (  '-',    '0',    '-',    '1',    '1'  ),
     (  '-',    '-',    '0',    '0',    '0'  ),
     (  '-',    '-',    '-',    '-',    'S'  ),
     (  '-',    '0',    '*',    '1',    '1'  ),
     (  '-',    '*',    '0',    '0',    '0'  ),
     (  '-',    '-',    '0',    '0',    '0'  ),
     (  '-',    '0',    '-',    '1',    '1'  ),
     (  '-',    '*',    '-',    '-',    'X'  ),
     (  '-',    '-',    '*',    '-',    'X'  ) );


end prim;

package body prim is

end prim;
LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ACHCONX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CON : VitalDelayType01 := (0.0700836 ns, 0.0735197 ns);
             tpd_B_CON : VitalDelayType01 := (0.0409286 ns, 0.0388318 ns);
             tpd_CI_CON : VitalDelayType01 := (0.0226137 ns, 0.0206995 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CON : out std_ulogic);

   attribute VITAL_LEVEL0 of ACHCONX2 : entity is TRUE;
end ACHCONX2;

architecture behavioral of ACHCONX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE CON_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CON_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          n4_var := VitalOR2(n2_var, n3_var);
          CON_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CON,
               OutSignalName => "CON",
               OutTemp => CON_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CON,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CON,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CON,
                             TRUE)),
               GlitchData => CON_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFHX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0506216 ns, 0.0618148 ns);
             tpd_A_S : VitalDelayType01 := (0.0757043 ns, 0.0734759 ns);
             tpd_B_CO : VitalDelayType01 := (0.0510774 ns, 0.0616804 ns);
             tpd_B_S : VitalDelayType01 := (0.0759779 ns, 0.0724705 ns);
             tpd_CI_CO : VitalDelayType01 := (0.0468645 ns, 0.054937 ns);
             tpd_CI_S : VitalDelayType01 := (0.0714893 ns, 0.0708617 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFHX1 : entity is TRUE;
end ADDFHX1;

architecture behavioral of ADDFHX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFHX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0609028 ns, 0.0752152 ns);
             tpd_A_S : VitalDelayType01 := (0.0974617 ns, 0.0951118 ns);
             tpd_B_CO : VitalDelayType01 := (0.0614702 ns, 0.0753636 ns);
             tpd_B_S : VitalDelayType01 := (0.0979013 ns, 0.0940685 ns);
             tpd_CI_CO : VitalDelayType01 := (0.05714 ns, 0.0686234 ns);
             tpd_CI_S : VitalDelayType01 := (0.0937839 ns, 0.0927592 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFHX2 : entity is TRUE;
end ADDFHX2;

architecture behavioral of ADDFHX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFHX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0738523 ns, 0.0923029 ns);
             tpd_A_S : VitalDelayType01 := (0.124521 ns, 0.12203 ns);
             tpd_B_CO : VitalDelayType01 := (0.0744027 ns, 0.0927275 ns);
             tpd_B_S : VitalDelayType01 := (0.12495 ns, 0.120876 ns);
             tpd_CI_CO : VitalDelayType01 := (0.070076 ns, 0.0860932 ns);
             tpd_CI_S : VitalDelayType01 := (0.121079 ns, 0.119747 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFHX4 : entity is TRUE;
end ADDFHX4;

architecture behavioral of ADDFHX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFHXL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0467313 ns, 0.0574537 ns);
             tpd_A_S : VitalDelayType01 := (0.0696711 ns, 0.0677907 ns);
             tpd_B_CO : VitalDelayType01 := (0.0471996 ns, 0.0571855 ns);
             tpd_B_S : VitalDelayType01 := (0.0698379 ns, 0.0667576 ns);
             tpd_CI_CO : VitalDelayType01 := (0.0430636 ns, 0.050456 ns);
             tpd_CI_S : VitalDelayType01 := (0.0654267 ns, 0.0651238 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFHXL : entity is TRUE;
end ADDFHXL;

architecture behavioral of ADDFHXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0546109 ns, 0.0686522 ns);
             tpd_A_S : VitalDelayType01 := (0.0851118 ns, 0.0838245 ns);
             tpd_B_CO : VitalDelayType01 := (0.0551661 ns, 0.068605 ns);
             tpd_B_S : VitalDelayType01 := (0.0853974 ns, 0.0828939 ns);
             tpd_CI_CO : VitalDelayType01 := (0.0509709 ns, 0.0618007 ns);
             tpd_CI_S : VitalDelayType01 := (0.0813231 ns, 0.0815389 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFX1 : entity is TRUE;
end ADDFX1;

architecture behavioral of ADDFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0695255 ns, 0.0884658 ns);
             tpd_A_S : VitalDelayType01 := (0.116292 ns, 0.115016 ns);
             tpd_B_CO : VitalDelayType01 := (0.0701422 ns, 0.0887825 ns);
             tpd_B_S : VitalDelayType01 := (0.116815 ns, 0.114044 ns);
             tpd_CI_CO : VitalDelayType01 := (0.0657798 ns, 0.081899 ns);
             tpd_CI_S : VitalDelayType01 := (0.112905 ns, 0.112993 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFX2 : entity is TRUE;
end ADDFX2;

architecture behavioral of ADDFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0738523 ns, 0.0923029 ns);
             tpd_A_S : VitalDelayType01 := (0.124521 ns, 0.12203 ns);
             tpd_B_CO : VitalDelayType01 := (0.0744027 ns, 0.0927275 ns);
             tpd_B_S : VitalDelayType01 := (0.12495 ns, 0.120876 ns);
             tpd_CI_CO : VitalDelayType01 := (0.070076 ns, 0.0860932 ns);
             tpd_CI_S : VitalDelayType01 := (0.121079 ns, 0.119747 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFX4 : entity is TRUE;
end ADDFX4;

architecture behavioral of ADDFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFXL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0473234 ns, 0.0584897 ns);
             tpd_A_S : VitalDelayType01 := (0.0698712 ns, 0.0682447 ns);
             tpd_B_CO : VitalDelayType01 := (0.0477972 ns, 0.0581441 ns);
             tpd_B_S : VitalDelayType01 := (0.0699595 ns, 0.0672568 ns);
             tpd_CI_CO : VitalDelayType01 := (0.0437235 ns, 0.051416 ns);
             tpd_CI_S : VitalDelayType01 := (0.0658145 ns, 0.0656792 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFXL : entity is TRUE;
end ADDFXL;

architecture behavioral of ADDFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDHX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0383212 ns, 0.0335497 ns);
             tpd_A_S : VitalDelayType01 := (0.0544676 ns, 0.0589239 ns);
             tpd_B_CO : VitalDelayType01 := (0.0370556 ns, 0.0313071 ns);
             tpd_B_S : VitalDelayType01 := (0.0407323 ns, 0.0457048 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDHX1 : entity is TRUE;
end ADDHX1;

architecture behavioral of ADDHX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE CO_zd : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          CO_zd := VitalAND2(A_ipd, B_ipd);

          S_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDHX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0534642 ns, 0.0449537 ns);
             tpd_A_S : VitalDelayType01 := (0.0684954 ns, 0.0759172 ns);
             tpd_B_CO : VitalDelayType01 := (0.0520084 ns, 0.0428409 ns);
             tpd_B_S : VitalDelayType01 := (0.0538109 ns, 0.0615146 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDHX2 : entity is TRUE;
end ADDHX2;

architecture behavioral of ADDHX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE CO_zd : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          CO_zd := VitalAND2(A_ipd, B_ipd);

          S_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDHX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0577123 ns, 0.0472312 ns);
             tpd_A_S : VitalDelayType01 := (0.0893692 ns, 0.0988295 ns);
             tpd_B_CO : VitalDelayType01 := (0.0562679 ns, 0.0453698 ns);
             tpd_B_S : VitalDelayType01 := (0.0669877 ns, 0.0750213 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDHX4 : entity is TRUE;
end ADDHX4;

architecture behavioral of ADDHX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE CO_zd : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          CO_zd := VitalAND2(A_ipd, B_ipd);

          S_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDHXL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0308144 ns, 0.0274714 ns);
             tpd_A_S : VitalDelayType01 := (0.0476992 ns, 0.0502702 ns);
             tpd_B_CO : VitalDelayType01 := (0.0296192 ns, 0.0251398 ns);
             tpd_B_S : VitalDelayType01 := (0.0342139 ns, 0.0376031 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDHXL : entity is TRUE;
end ADDHXL;

architecture behavioral of ADDHXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE CO_zd : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          CO_zd := VitalAND2(A_ipd, B_ipd);

          S_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.038334 ns, 0.0334986 ns);
             tpd_B_Y : VitalDelayType01 := (0.0370208 ns, 0.0312211 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2X1 : entity is TRUE;
end AND2X1;

architecture behavioral of AND2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0534085 ns, 0.0448728 ns);
             tpd_B_Y : VitalDelayType01 := (0.0519979 ns, 0.0427199 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2X2 : entity is TRUE;
end AND2X2;

architecture behavioral of AND2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0576221 ns, 0.0473363 ns);
             tpd_B_Y : VitalDelayType01 := (0.0561185 ns, 0.0452248 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2X4 : entity is TRUE;
end AND2X4;

architecture behavioral of AND2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0488223 ns, 0.0409136 ns);
             tpd_B_Y : VitalDelayType01 := (0.0474093 ns, 0.0389867 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2X6 : entity is TRUE;
end AND2X6;

architecture behavioral of AND2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0576006 ns, 0.0473984 ns);
             tpd_B_Y : VitalDelayType01 := (0.0561716 ns, 0.0456084 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2X8 : entity is TRUE;
end AND2X8;

architecture behavioral of AND2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0308888 ns, 0.027432 ns);
             tpd_B_Y : VitalDelayType01 := (0.0296217 ns, 0.0251615 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2XL : entity is TRUE;
end AND2XL;

architecture behavioral of AND2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0543924 ns, 0.0375047 ns);
             tpd_B_Y : VitalDelayType01 := (0.053251 ns, 0.035708 ns);
             tpd_C_Y : VitalDelayType01 := (0.0496025 ns, 0.0330779 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3X1 : entity is TRUE;
end AND3X1;

architecture behavioral of AND3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0756617 ns, 0.0487763 ns);
             tpd_B_Y : VitalDelayType01 := (0.0745503 ns, 0.0469935 ns);
             tpd_C_Y : VitalDelayType01 := (0.0710005 ns, 0.0446178 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3X2 : entity is TRUE;
end AND3X2;

architecture behavioral of AND3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0815105 ns, 0.0511439 ns);
             tpd_B_Y : VitalDelayType01 := (0.0802031 ns, 0.049189 ns);
             tpd_C_Y : VitalDelayType01 := (0.0767402 ns, 0.0469408 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3X4 : entity is TRUE;
end AND3X4;

architecture behavioral of AND3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0685276 ns, 0.044586 ns);
             tpd_B_Y : VitalDelayType01 := (0.0673837 ns, 0.0428471 ns);
             tpd_C_Y : VitalDelayType01 := (0.0636223 ns, 0.0403257 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3X6 : entity is TRUE;
end AND3X6;

architecture behavioral of AND3X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0808422 ns, 0.0510043 ns);
             tpd_B_Y : VitalDelayType01 := (0.0796813 ns, 0.0492276 ns);
             tpd_C_Y : VitalDelayType01 := (0.0760082 ns, 0.0468542 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3X8 : entity is TRUE;
end AND3X8;

architecture behavioral of AND3X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0441351 ns, 0.0314044 ns);
             tpd_B_Y : VitalDelayType01 := (0.0427084 ns, 0.0296336 ns);
             tpd_C_Y : VitalDelayType01 := (0.0394052 ns, 0.0271369 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3XL : entity is TRUE;
end AND3XL;

architecture behavioral of AND3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0723266 ns, 0.0403143 ns);
             tpd_B_Y : VitalDelayType01 := (0.0711062 ns, 0.0390711 ns);
             tpd_C_Y : VitalDelayType01 := (0.0672689 ns, 0.0367823 ns);
             tpd_D_Y : VitalDelayType01 := (0.0618276 ns, 0.0342558 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4X1 : entity is TRUE;
end AND4X1;

architecture behavioral of AND4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0998699 ns, 0.0518184 ns);
             tpd_B_Y : VitalDelayType01 := (0.0983334 ns, 0.0501098 ns);
             tpd_C_Y : VitalDelayType01 := (0.0947909 ns, 0.0478858 ns);
             tpd_D_Y : VitalDelayType01 := (0.089671 ns, 0.0455368 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4X2 : entity is TRUE;
end AND4X2;

architecture behavioral of AND4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.107529 ns, 0.0541654 ns);
             tpd_B_Y : VitalDelayType01 := (0.106189 ns, 0.0526518 ns);
             tpd_C_Y : VitalDelayType01 := (0.102729 ns, 0.0504514 ns);
             tpd_D_Y : VitalDelayType01 := (0.0970808 ns, 0.0479886 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4X4 : entity is TRUE;
end AND4X4;

architecture behavioral of AND4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0918866 ns, 0.0478729 ns);
             tpd_B_Y : VitalDelayType01 := (0.0906008 ns, 0.0464581 ns);
             tpd_C_Y : VitalDelayType01 := (0.0869205 ns, 0.0442308 ns);
             tpd_D_Y : VitalDelayType01 := (0.0808422 ns, 0.041624 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4X6 : entity is TRUE;
end AND4X6;

architecture behavioral of AND4X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.107861 ns, 0.0544008 ns);
             tpd_B_Y : VitalDelayType01 := (0.106542 ns, 0.0529042 ns);
             tpd_C_Y : VitalDelayType01 := (0.102847 ns, 0.0506066 ns);
             tpd_D_Y : VitalDelayType01 := (0.0968196 ns, 0.0480733 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4X8 : entity is TRUE;
end AND4X8;

architecture behavioral of AND4X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0584264 ns, 0.0336785 ns);
             tpd_B_Y : VitalDelayType01 := (0.0571513 ns, 0.0325878 ns);
             tpd_C_Y : VitalDelayType01 := (0.0539648 ns, 0.0307225 ns);
             tpd_D_Y : VitalDelayType01 := (0.0489245 ns, 0.028302 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4XL : entity is TRUE;
end AND4XL;

architecture behavioral of AND4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO21X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0444978 ns, 0.0555363 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0429352 ns, 0.0511213 ns);
             tpd_B0_Y : VitalDelayType01 := (0.027845 ns, 0.0426644 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO21X1 : entity is TRUE;
end AO21X1;

architecture behavioral of AO21X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          Y_zd := VitalOR2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO21X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0598914 ns, 0.0756633 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0582722 ns, 0.0716814 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0364933 ns, 0.0606757 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO21X2 : entity is TRUE;
end AO21X2;

architecture behavioral of AO21X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          Y_zd := VitalOR2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO21X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0638459 ns, 0.0796518 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0623723 ns, 0.0758976 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0388128 ns, 0.0644023 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO21X4 : entity is TRUE;
end AO21X4;

architecture behavioral of AO21X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          Y_zd := VitalOR2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO21XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0371639 ns, 0.0457617 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0357495 ns, 0.0413065 ns);
             tpd_B0_Y : VitalDelayType01 := (0.02339 ns, 0.0338367 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO21XL : entity is TRUE;
end AO21XL;

architecture behavioral of AO21XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          Y_zd := VitalOR2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO22X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0487901 ns, 0.0575789 ns);
             tpd_A1_Y : VitalDelayType01 := (0.047372 ns, 0.0541079 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0410387 ns, 0.0483306 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0394072 ns, 0.0444551 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO22X1 : entity is TRUE;
end AO22X1;

architecture behavioral of AO22X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          Y_zd := VitalOR2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO22X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0642146 ns, 0.0752972 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0627475 ns, 0.0720822 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0561035 ns, 0.0660533 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0544176 ns, 0.0625241 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO22X2 : entity is TRUE;
end AO22X2;

architecture behavioral of AO22X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          Y_zd := VitalOR2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO22X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0685656 ns, 0.0791598 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0668979 ns, 0.0757644 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0602132 ns, 0.0699251 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0586713 ns, 0.066584 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO22X4 : entity is TRUE;
end AO22X4;

architecture behavioral of AO22X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          Y_zd := VitalOR2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO22XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0412843 ns, 0.0488522 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0396982 ns, 0.0449536 ns);
             tpd_B0_Y : VitalDelayType01 := (0.033585 ns, 0.0393399 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0321579 ns, 0.035566 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO22XL : entity is TRUE;
end AO22XL;

architecture behavioral of AO22XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          Y_zd := VitalOR2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI211X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0467913 ns, 0.0216708 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0404846 ns, 0.0202833 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0350531 ns, 0.0127928 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0274677 ns, 0.0107033 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI211X1 : entity is TRUE;
end AOI211X1;

architecture behavioral of AOI211X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          n2_var := VitalOR2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI211X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0467289 ns, 0.0213384 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0402678 ns, 0.0198454 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0352523 ns, 0.0126778 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0262451 ns, 0.0103032 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI211X2 : entity is TRUE;
end AOI211X2;

architecture behavioral of AOI211X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          n2_var := VitalOR2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI211X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0463952 ns, 0.0212603 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0400786 ns, 0.0198413 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0349372 ns, 0.0126598 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0262777 ns, 0.0103456 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI211X4 : entity is TRUE;
end AOI211X4;

architecture behavioral of AOI211X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          n2_var := VitalOR2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI211XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0465347 ns, 0.0209453 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0402259 ns, 0.01963 ns);
             tpd_B0_Y : VitalDelayType01 := (0.034636 ns, 0.0124107 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0271388 ns, 0.0103144 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI211XL : entity is TRUE;
end AOI211XL;

architecture behavioral of AOI211XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          n2_var := VitalOR2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI21X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0294322 ns, 0.0192187 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0250943 ns, 0.017843 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0190775 ns, 0.00954808 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI21X1 : entity is TRUE;
end AOI21X1;

architecture behavioral of AOI21X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI21X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0289331 ns, 0.0188608 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0246666 ns, 0.0175206 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0186995 ns, 0.00930388 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI21X2 : entity is TRUE;
end AOI21X2;

architecture behavioral of AOI21X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI21X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0288874 ns, 0.0188548 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0245545 ns, 0.0174841 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0187955 ns, 0.00934935 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI21X4 : entity is TRUE;
end AOI21X4;

architecture behavioral of AOI21X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI21XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0293015 ns, 0.0186524 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0247481 ns, 0.0172441 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0188027 ns, 0.00913332 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI21XL : entity is TRUE;
end AOI21XL;

architecture behavioral of AOI21XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI221X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0539912 ns, 0.0242401 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0483219 ns, 0.0228026 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0455254 ns, 0.0221441 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0400507 ns, 0.0207214 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0293607 ns, 0.0113549 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI221X1 : entity is TRUE;
end AOI221X1;

architecture behavioral of AOI221X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI221X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0518925 ns, 0.022806 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0462501 ns, 0.0214631 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0434003 ns, 0.0208977 ns);
             tpd_B1_Y : VitalDelayType01 := (0.037797 ns, 0.0195137 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0274034 ns, 0.0105493 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI221X2 : entity is TRUE;
end AOI221X2;

architecture behavioral of AOI221X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI221X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0520963 ns, 0.0228951 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0462482 ns, 0.0214693 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0437111 ns, 0.0210533 ns);
             tpd_B1_Y : VitalDelayType01 := (0.037611 ns, 0.0194638 ns);
             tpd_C0_Y : VitalDelayType01 := (0.027789 ns, 0.0106001 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI221X4 : entity is TRUE;
end AOI221X4;

architecture behavioral of AOI221X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI221XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0540342 ns, 0.0235314 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0484309 ns, 0.0221787 ns);
             tpd_B0_Y : VitalDelayType01 := (0.045372 ns, 0.0215674 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0398603 ns, 0.0202009 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0289465 ns, 0.0109914 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI221XL : entity is TRUE;
end AOI221XL;

architecture behavioral of AOI221XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI222X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0597849 ns, 0.0287043 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0549104 ns, 0.0272374 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0519086 ns, 0.0253517 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0467263 ns, 0.0237575 ns);
             tpd_C0_Y : VitalDelayType01 := (0.036404 ns, 0.0187399 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0317066 ns, 0.0174334 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI222X1 : entity is TRUE;
end AOI222X1;

architecture behavioral of AOI222X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(C0_ipd, C1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(B0_ipd, B1_ipd);
          n4_var := VitalOR2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI222X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0579621 ns, 0.0276099 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0531286 ns, 0.0261897 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0500139 ns, 0.0243447 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0448226 ns, 0.0228035 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0351747 ns, 0.0179881 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0304281 ns, 0.0167099 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI222X2 : entity is TRUE;
end AOI222X2;

architecture behavioral of AOI222X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(C0_ipd, C1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(B0_ipd, B1_ipd);
          n4_var := VitalOR2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI222X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0582611 ns, 0.0276599 ns);
             tpd_A1_Y : VitalDelayType01 := (0.053219 ns, 0.0261699 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0503392 ns, 0.0244698 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0448235 ns, 0.0227436 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0356296 ns, 0.0180961 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0308025 ns, 0.0167716 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI222X4 : entity is TRUE;
end AOI222X4;

architecture behavioral of AOI222X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(C0_ipd, C1_ipd);
          n1_var := VitalAND2(A0_ipd, A1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(B0_ipd, B1_ipd);
          n4_var := VitalOR2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI222XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0600053 ns, 0.0278473 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0549567 ns, 0.0264889 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0518768 ns, 0.0246313 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0467468 ns, 0.0231094 ns);
             tpd_C0_Y : VitalDelayType01 := (0.036274 ns, 0.0182872 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0312568 ns, 0.0168863 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI222XL : entity is TRUE;
end AOI222XL;

architecture behavioral of AOI222XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(C0_ipd, C1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(B0_ipd, B1_ipd);
          n4_var := VitalOR2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI22X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0338242 ns, 0.0230646 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0299092 ns, 0.021488 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0246656 ns, 0.016433 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0209691 ns, 0.0150831 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI22X1 : entity is TRUE;
end AOI22X1;

architecture behavioral of AOI22X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI22X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0333163 ns, 0.0228104 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0296138 ns, 0.0213639 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0245582 ns, 0.0163785 ns);
             tpd_B1_Y : VitalDelayType01 := (0.021058 ns, 0.0151357 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI22X2 : entity is TRUE;
end AOI22X2;

architecture behavioral of AOI22X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI22X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0332365 ns, 0.0227914 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0294918 ns, 0.021325 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0246854 ns, 0.0164706 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0210996 ns, 0.0151765 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI22X4 : entity is TRUE;
end AOI22X4;

architecture behavioral of AOI22X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI22XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0337427 ns, 0.0224153 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0297003 ns, 0.0208563 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0243761 ns, 0.0158682 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0206506 ns, 0.0145591 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI22XL : entity is TRUE;
end AOI22XL;

architecture behavioral of AOI22XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB1X1 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0351783 ns, 0.0487144 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0330438 ns, 0.044763 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0228687 ns, 0.0111979 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB1X1 : entity is TRUE;
end AOI2BB1X1;

architecture behavioral of AOI2BB1X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB1X2 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0436626 ns, 0.069597 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0414358 ns, 0.0656463 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0229298 ns, 0.010684 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB1X2 : entity is TRUE;
end AOI2BB1X2;

architecture behavioral of AOI2BB1X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB1X4 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0460659 ns, 0.0738529 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0438136 ns, 0.069853 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0234158 ns, 0.0107823 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB1X4 : entity is TRUE;
end AOI2BB1X4;

architecture behavioral of AOI2BB1X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB1XL is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0306165 ns, 0.0385124 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0284689 ns, 0.0345167 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0222729 ns, 0.010892 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB1XL : entity is TRUE;
end AOI2BB1XL;

architecture behavioral of AOI2BB1XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB2X1 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0478094 ns, 0.0461695 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0445385 ns, 0.0436465 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0240945 ns, 0.0161867 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0205036 ns, 0.0149271 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB2X1 : entity is TRUE;
end AOI2BB2X1;

architecture behavioral of AOI2BB2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB2X2 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0573574 ns, 0.0597623 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0540979 ns, 0.0565736 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0241657 ns, 0.016179 ns);
             tpd_B1_Y : VitalDelayType01 := (0.020537 ns, 0.0149 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB2X2 : entity is TRUE;
end AOI2BB2X2;

architecture behavioral of AOI2BB2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB2X4 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0598954 ns, 0.0623773 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0566033 ns, 0.059112 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0242934 ns, 0.0163055 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0205351 ns, 0.0149522 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB2X4 : entity is TRUE;
end AOI2BB2X4;

architecture behavioral of AOI2BB2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB2XL is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0429313 ns, 0.0388706 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0396115 ns, 0.0367822 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0238948 ns, 0.0156195 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0202552 ns, 0.0144572 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB2XL : entity is TRUE;
end AOI2BB2XL;

architecture behavioral of AOI2BB2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI31X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0343187 ns, 0.0292268 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0312745 ns, 0.0280835 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0264396 ns, 0.0245324 ns);
             tpd_B0_Y : VitalDelayType01 := (0.020456 ns, 0.00953554 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI31X1 : entity is TRUE;
end AOI31X1;

architecture behavioral of AOI31X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI31X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0343825 ns, 0.0290675 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0313459 ns, 0.0279048 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0265072 ns, 0.0242094 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0201449 ns, 0.00925 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI31X2 : entity is TRUE;
end AOI31X2;

architecture behavioral of AOI31X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI31X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0350871 ns, 0.0301885 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0315636 ns, 0.028565 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0266222 ns, 0.0247898 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0206679 ns, 0.00946806 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI31X4 : entity is TRUE;
end AOI31X4;

architecture behavioral of AOI31X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI31XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0346352 ns, 0.0287362 ns);
             tpd_A1_Y : VitalDelayType01 := (0.031179 ns, 0.027325 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0263355 ns, 0.023803 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0205078 ns, 0.00922613 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI31XL : entity is TRUE;
end AOI31XL;

architecture behavioral of AOI31XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI32X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0383017 ns, 0.0350862 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0354517 ns, 0.033789 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0313351 ns, 0.0300954 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0259925 ns, 0.0164717 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0225029 ns, 0.0151504 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI32X1 : entity is TRUE;
end AOI32X1;

architecture behavioral of AOI32X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI32X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0383073 ns, 0.0349412 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0354439 ns, 0.03368 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0313486 ns, 0.0299665 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0259165 ns, 0.0163096 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0225828 ns, 0.0150671 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI32X2 : entity is TRUE;
end AOI32X2;

architecture behavioral of AOI32X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI32X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0382606 ns, 0.0347598 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0352627 ns, 0.0334628 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0312327 ns, 0.0297982 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0260179 ns, 0.0163211 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0226095 ns, 0.0150708 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI32X4 : entity is TRUE;
end AOI32X4;

architecture behavioral of AOI32X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI32XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0384909 ns, 0.0344467 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0355175 ns, 0.0331233 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0313403 ns, 0.0295276 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0259126 ns, 0.0160433 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0224903 ns, 0.0148449 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI32XL : entity is TRUE;
end AOI32XL;

architecture behavioral of AOI32XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI33X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0431843 ns, 0.0405298 ns);
             tpd_A1_Y : VitalDelayType01 := (0.040595 ns, 0.0393607 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0364721 ns, 0.0355698 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0314522 ns, 0.0261917 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0288632 ns, 0.0250869 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0248606 ns, 0.0214195 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI33X1 : entity is TRUE;
end AOI33X1;

architecture behavioral of AOI33X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n2_var, B2_ipd);
          n4_var := VitalOR2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI33X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0432996 ns, 0.0404364 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0404973 ns, 0.0391549 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0365345 ns, 0.0353369 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0310732 ns, 0.0256648 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0285074 ns, 0.0245497 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0246032 ns, 0.0209432 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI33X2 : entity is TRUE;
end AOI33X2;

architecture behavioral of AOI33X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n2_var, B2_ipd);
          n4_var := VitalOR2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI33X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0433169 ns, 0.0402047 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0403891 ns, 0.0388708 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0365033 ns, 0.0352153 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0313612 ns, 0.0258033 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0285348 ns, 0.0245181 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0246294 ns, 0.0209375 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI33X4 : entity is TRUE;
end AOI33X4;

architecture behavioral of AOI33X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n2_var, B2_ipd);
          n4_var := VitalOR2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI33XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0431294 ns, 0.0395169 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0404381 ns, 0.0384266 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0362598 ns, 0.034628 ns);
             tpd_B0_Y : VitalDelayType01 := (0.031243 ns, 0.0253875 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0286673 ns, 0.0243578 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0246486 ns, 0.0207702 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI33XL : entity is TRUE;
end AOI33XL;

architecture behavioral of AOI33XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n2_var, B2_ipd);
          n4_var := VitalOR2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BMXIX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_M0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_M1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_X2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_PPN : VitalDelayType01 := (0.0839952 ns, 0.0997595 ns);
             tpd_M0_PPN : VitalDelayType01 := (0.0847751 ns, 0.0933482 ns);
             tpd_M1_PPN : VitalDelayType01 := (0.0853613 ns, 0.0927669 ns);
             tpd_S_PPN : VitalDelayType01 := (0.0849801 ns, 0.0990988 ns);
             tpd_X2_PPN : VitalDelayType01 := (0.0640247 ns, 0.0624317 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         M0 : in std_ulogic := 'U' ;
         M1 : in std_ulogic := 'U' ;
         S : in std_ulogic := 'U' ;
         X2 : in std_ulogic := 'U' ;
         PPN : out std_ulogic);

   attribute VITAL_LEVEL0 of BMXIX2 : entity is TRUE;
end BMXIX2;

architecture behavioral of BMXIX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL M0_ipd : std_ulogic := 'X';
   SIGNAL M1_ipd : std_ulogic := 'X';
   SIGNAL S_ipd : std_ulogic := 'X';
   SIGNAL X2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( M0_ipd, M0, tipd_M0 );
   VitalWireDelay( M1_ipd, M1, tipd_M1 );
   VitalWireDelay( S_ipd, S, tipd_S );
   VitalWireDelay( X2_ipd, X2, tipd_X2 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, M0_ipd, M1_ipd, S_ipd, X2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE PPN_zd : std_ulogic;

      -- path delay section variables
      VARIABLE PPN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(A_ipd, S_ipd, M0_ipd);
          n1_var := VitalMUX2(A_ipd, S_ipd, M1_ipd);
          PPN_zd := VitalMUX2(n0_var, n1_var, X2_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => PPN,
               OutSignalName => "PPN",
               OutTemp => PPN_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_PPN,
                             TRUE),
                      1 => ( M0_ipd'LAST_EVENT,
                             tpd_M0_PPN,
                             TRUE),
                      2 => ( M1_ipd'LAST_EVENT,
                             tpd_M1_PPN,
                             TRUE),
                      3 => ( S_ipd'LAST_EVENT,
                             tpd_S_PPN,
                             TRUE),
                      4 => ( X2_ipd'LAST_EVENT,
                             tpd_X2_PPN,
                             TRUE)),
               GlitchData => PPN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BMXIX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_M0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_M1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_X2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_PPN : VitalDelayType01 := (0.124722 ns, 0.151545 ns);
             tpd_M0_PPN : VitalDelayType01 := (0.124939 ns, 0.144424 ns);
             tpd_M1_PPN : VitalDelayType01 := (0.125961 ns, 0.144979 ns);
             tpd_S_PPN : VitalDelayType01 := (0.1256 ns, 0.150808 ns);
             tpd_X2_PPN : VitalDelayType01 := (0.0978392 ns, 0.106005 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         M0 : in std_ulogic := 'U' ;
         M1 : in std_ulogic := 'U' ;
         S : in std_ulogic := 'U' ;
         X2 : in std_ulogic := 'U' ;
         PPN : out std_ulogic);

   attribute VITAL_LEVEL0 of BMXIX4 : entity is TRUE;
end BMXIX4;

architecture behavioral of BMXIX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL M0_ipd : std_ulogic := 'X';
   SIGNAL M1_ipd : std_ulogic := 'X';
   SIGNAL S_ipd : std_ulogic := 'X';
   SIGNAL X2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( M0_ipd, M0, tipd_M0 );
   VitalWireDelay( M1_ipd, M1, tipd_M1 );
   VitalWireDelay( S_ipd, S, tipd_S );
   VitalWireDelay( X2_ipd, X2, tipd_X2 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, M0_ipd, M1_ipd, S_ipd, X2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE PPN_zd : std_ulogic;

      -- path delay section variables
      VARIABLE PPN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(A_ipd, S_ipd, M0_ipd);
          n1_var := VitalMUX2(A_ipd, S_ipd, M1_ipd);
          PPN_zd := VitalMUX2(n0_var, n1_var, X2_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => PPN,
               OutSignalName => "PPN",
               OutTemp => PPN_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_PPN,
                             TRUE),
                      1 => ( M0_ipd'LAST_EVENT,
                             tpd_M0_PPN,
                             TRUE),
                      2 => ( M1_ipd'LAST_EVENT,
                             tpd_M1_PPN,
                             TRUE),
                      3 => ( S_ipd'LAST_EVENT,
                             tpd_S_PPN,
                             TRUE),
                      4 => ( X2_ipd'LAST_EVENT,
                             tpd_X2_PPN,
                             TRUE)),
               GlitchData => PPN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0375234 ns, 0.0438789 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX12 : entity is TRUE;
end BUFX12;

architecture behavioral of BUFX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX16 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0672579 ns, 0.0741763 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX16 : entity is TRUE;
end BUFX16;

architecture behavioral of BUFX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0349849 ns, 0.0413685 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX2 : entity is TRUE;
end BUFX2;

architecture behavioral of BUFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX20 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0376466 ns, 0.0440656 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX20 : entity is TRUE;
end BUFX20;

architecture behavioral of BUFX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0325072 ns, 0.0373961 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX3 : entity is TRUE;
end BUFX3;

architecture behavioral of BUFX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.037404 ns, 0.0438282 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX4 : entity is TRUE;
end BUFX4;

architecture behavioral of BUFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0321637 ns, 0.0370555 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX6 : entity is TRUE;
end BUFX6;

architecture behavioral of BUFX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0372804 ns, 0.0436187 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX8 : entity is TRUE;
end BUFX8;

architecture behavioral of BUFX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0372942 ns, 0.0523079 ns);
             tpd_B_Y : VitalDelayType01 := (0.0356505 ns, 0.0475096 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X12 : entity is TRUE;
end CLKAND2X12;

architecture behavioral of CLKAND2X12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0350946 ns, 0.0495833 ns);
             tpd_B_Y : VitalDelayType01 := (0.033693 ns, 0.0448908 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X2 : entity is TRUE;
end CLKAND2X2;

architecture behavioral of CLKAND2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0325344 ns, 0.0454181 ns);
             tpd_B_Y : VitalDelayType01 := (0.0311253 ns, 0.0406468 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X3 : entity is TRUE;
end CLKAND2X3;

architecture behavioral of CLKAND2X3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0366753 ns, 0.0516712 ns);
             tpd_B_Y : VitalDelayType01 := (0.035274 ns, 0.047186 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X4 : entity is TRUE;
end CLKAND2X4;

architecture behavioral of CLKAND2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0327427 ns, 0.0458679 ns);
             tpd_B_Y : VitalDelayType01 := (0.0312183 ns, 0.0409273 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X6 : entity is TRUE;
end CLKAND2X6;

architecture behavioral of CLKAND2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0370868 ns, 0.052241 ns);
             tpd_B_Y : VitalDelayType01 := (0.03553 ns, 0.0474862 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X8 : entity is TRUE;
end CLKAND2X8;

architecture behavioral of CLKAND2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0375234 ns, 0.0438789 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX12 : entity is TRUE;
end CLKBUFX12;

architecture behavioral of CLKBUFX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX16 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0672579 ns, 0.0741763 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX16 : entity is TRUE;
end CLKBUFX16;

architecture behavioral of CLKBUFX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0349849 ns, 0.0413685 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX2 : entity is TRUE;
end CLKBUFX2;

architecture behavioral of CLKBUFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX20 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0376466 ns, 0.0440656 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX20 : entity is TRUE;
end CLKBUFX20;

architecture behavioral of CLKBUFX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0325072 ns, 0.0373961 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX3 : entity is TRUE;
end CLKBUFX3;

architecture behavioral of CLKBUFX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.037404 ns, 0.0438282 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX4 : entity is TRUE;
end CLKBUFX4;

architecture behavioral of CLKBUFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0321637 ns, 0.0370555 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX6 : entity is TRUE;
end CLKBUFX6;

architecture behavioral of CLKBUFX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0372804 ns, 0.0436187 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX8 : entity is TRUE;
end CLKBUFX8;

architecture behavioral of CLKBUFX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0122513 ns, 0.0083635 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX1 : entity is TRUE;
end CLKINVX1;

architecture behavioral of CLKINVX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0118211 ns, 0.00803667 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX12 : entity is TRUE;
end CLKINVX12;

architecture behavioral of CLKINVX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX16 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0417481 ns, 0.0278282 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX16 : entity is TRUE;
end CLKINVX16;

architecture behavioral of CLKINVX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0116902 ns, 0.00791128 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX2 : entity is TRUE;
end CLKINVX2;

architecture behavioral of CLKINVX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX20 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0119454 ns, 0.00816591 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX20 : entity is TRUE;
end CLKINVX20;

architecture behavioral of CLKINVX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0119939 ns, 0.00820648 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX3 : entity is TRUE;
end CLKINVX3;

architecture behavioral of CLKINVX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0117121 ns, 0.00791109 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX4 : entity is TRUE;
end CLKINVX4;

architecture behavioral of CLKINVX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0120282 ns, 0.00820151 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX6 : entity is TRUE;
end CLKINVX6;

architecture behavioral of CLKINVX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.011924 ns, 0.00812566 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX8 : entity is TRUE;
end CLKINVX8;

architecture behavioral of CLKINVX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.16298 ns, 0.205882 ns);
             tpd_B_Y : VitalDelayType01 := (0.162255 ns, 0.206297 ns);
             tpd_S0_Y : VitalDelayType01 := (0.161801 ns, 0.198861 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X12 : entity is TRUE;
end CLKMX2X12;

architecture behavioral of CLKMX2X12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.05978 ns, 0.0743784 ns);
             tpd_B_Y : VitalDelayType01 := (0.058953 ns, 0.0752722 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0599859 ns, 0.0685441 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X2 : entity is TRUE;
end CLKMX2X2;

architecture behavioral of CLKMX2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0565513 ns, 0.0674845 ns);
             tpd_B_Y : VitalDelayType01 := (0.0550455 ns, 0.0696471 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0592075 ns, 0.0643121 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X3 : entity is TRUE;
end CLKMX2X3;

architecture behavioral of CLKMX2X3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0739285 ns, 0.0900676 ns);
             tpd_B_Y : VitalDelayType01 := (0.0725703 ns, 0.0912288 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0752541 ns, 0.0854749 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X4 : entity is TRUE;
end CLKMX2X4;

architecture behavioral of CLKMX2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.096803 ns, 0.119641 ns);
             tpd_B_Y : VitalDelayType01 := (0.0953833 ns, 0.120628 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0979384 ns, 0.11462 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X6 : entity is TRUE;
end CLKMX2X6;

architecture behavioral of CLKMX2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.119197 ns, 0.148592 ns);
             tpd_B_Y : VitalDelayType01 := (0.117562 ns, 0.1493 ns);
             tpd_S0_Y : VitalDelayType01 := (0.119932 ns, 0.143431 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X8 : entity is TRUE;
end CLKMX2X8;

architecture behavioral of CLKMX2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKXOR2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0544797 ns, 0.0588579 ns);
             tpd_B_Y : VitalDelayType01 := (0.0404423 ns, 0.0453891 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKXOR2X1 : entity is TRUE;
end CLKXOR2X1;

architecture behavioral of CLKXOR2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKXOR2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0683789 ns, 0.0758252 ns);
             tpd_B_Y : VitalDelayType01 := (0.0537603 ns, 0.0615725 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKXOR2X2 : entity is TRUE;
end CLKXOR2X2;

architecture behavioral of CLKXOR2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKXOR2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0910867 ns, 0.101416 ns);
             tpd_B_Y : VitalDelayType01 := (0.0715332 ns, 0.081298 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKXOR2X4 : entity is TRUE;
end CLKXOR2X4;

architecture behavioral of CLKXOR2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKXOR2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.13798 ns, 0.158028 ns);
             tpd_B_Y : VitalDelayType01 := (0.117434 ns, 0.137348 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKXOR2X8 : entity is TRUE;
end CLKXOR2X8;

architecture behavioral of CLKXOR2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.07979 ns;
             tpw_CK_negedge : VitalDelayType := 0.0861309 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0886721 ns, 0.104821 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFHQX1 : entity is TRUE;
end DFFHQX1;

architecture behavioral of DFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0840154 ns;
             tpw_CK_negedge : VitalDelayType := 0.0859138 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.095934 ns, 0.113386 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFHQX2 : entity is TRUE;
end DFFHQX2;

architecture behavioral of DFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0003 := VitalINV(P0002);

          Q_zd := VitalINV(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0911395 ns;
             tpw_CK_negedge : VitalDelayType := 0.0863892 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.105983 ns, 0.11844 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFHQX4 : entity is TRUE;
end DFFHQX4;

architecture behavioral of DFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.105765 ns;
             tpw_CK_negedge : VitalDelayType := 0.0861889 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.126183 ns, 0.133577 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFHQX8 : entity is TRUE;
end DFFHQX8;

architecture behavioral of DFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFNSRX1 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := 0 ns;
             tpw_CKN_posedge : VitalDelayType := 0.0665792 ns;
             tpw_CKN_negedge : VitalDelayType := 0.0863082 ns;
             tpw_RN_negedge : VitalDelayType := 0.0985365 ns;
             tpw_SN_negedge : VitalDelayType := 0.0715601 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.104458 ns, 0.0967505 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.121461 ns, 0.127143 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.122412 ns);
             tpd_RN_QN : VitalDelayType01 := (0.147128 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0939095 ns, 0.103884 ns);
             tpd_SN_QN : VitalDelayType01 := (0.128666 ns, 0.116383 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFNSRX1 : entity is TRUE;
end DFFNSRX1;

architecture behavioral of DFFNSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0002 := VitalINV(P0001);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFNSRX2 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := 0 ns;
             tpw_CKN_posedge : VitalDelayType := 0.067782 ns;
             tpw_CKN_negedge : VitalDelayType := 0.0984476 ns;
             tpw_RN_negedge : VitalDelayType := 0.110107 ns;
             tpw_SN_negedge : VitalDelayType := 0.0831179 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.110628 ns, 0.102363 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.140529 ns, 0.148673 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.129401 ns);
             tpd_RN_QN : VitalDelayType01 := (0.167733 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.101091 ns, 0.110648 ns);
             tpd_SN_QN : VitalDelayType01 := (0.149005 ns, 0.138622 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFNSRX2 : entity is TRUE;
end DFFNSRX2;

architecture behavioral of DFFNSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0002 := VitalINV(P0001);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFNSRX4 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := 0 ns;
             tpw_CKN_posedge : VitalDelayType := 0.0672303 ns;
             tpw_CKN_negedge : VitalDelayType := 0.113252 ns;
             tpw_RN_negedge : VitalDelayType := 0.118292 ns;
             tpw_SN_negedge : VitalDelayType := 0.0934854 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.126546 ns, 0.118454 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.159944 ns, 0.167636 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.145029 ns);
             tpd_RN_QN : VitalDelayType01 := (0.186671 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.116985 ns, 0.126934 ns);
             tpd_SN_QN : VitalDelayType01 := (0.168543 ns, 0.15713 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFNSRX4 : entity is TRUE;
end DFFNSRX4;

architecture behavioral of DFFNSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFNSRXL is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := 0 ns;
             tpw_CKN_posedge : VitalDelayType := 0.0666098 ns;
             tpw_CKN_negedge : VitalDelayType := 0.078553 ns;
             tpw_RN_negedge : VitalDelayType := 0.0911142 ns;
             tpw_SN_negedge : VitalDelayType := 0.0643392 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.0978604 ns, 0.0890716 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.10629 ns, 0.112085 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.114742 ns);
             tpd_RN_QN : VitalDelayType01 := (0.131996 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0876756 ns, 0.0961962 ns);
             tpd_SN_QN : VitalDelayType01 := (0.113443 ns, 0.101791 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFNSRXL : entity is TRUE;
end DFFNSRXL;

architecture behavioral of DFFNSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0002 := VitalINV(P0001);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0740839 ns;
             tpw_CK_negedge : VitalDelayType := 0.0773653 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0866432 ns, 0.098853 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFQX1 : entity is TRUE;
end DFFQX1;

architecture behavioral of DFFQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0787501 ns;
             tpw_CK_negedge : VitalDelayType := 0.0773564 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0946365 ns, 0.104632 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFQX2 : entity is TRUE;
end DFFQX2;

architecture behavioral of DFFQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0003 := VitalINV(P0002);

          Q_zd := VitalINV(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0888563 ns;
             tpw_CK_negedge : VitalDelayType := 0.0775651 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.108139 ns, 0.113667 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFQX4 : entity is TRUE;
end DFFQX4;

architecture behavioral of DFFQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFQXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0708856 ns;
             tpw_CK_negedge : VitalDelayType := 0.0774734 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0812 ns, 0.0923513 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFQXL : entity is TRUE;
end DFFQXL;

architecture behavioral of DFFQXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFQXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFQXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0811407 ns;
             tpw_CK_negedge : VitalDelayType := 0.0859117 ns;
             tpw_RN_negedge : VitalDelayType := 0.0517668 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.102619 ns, 0.106859 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0353314 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRHQX1 : entity is TRUE;
end DFFRHQX1;

architecture behavioral of DFFRHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0853867 ns;
             tpw_CK_negedge : VitalDelayType := 0.0861439 ns;
             tpw_RN_negedge : VitalDelayType := 0.0559069 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.114022 ns, 0.115383 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0430912 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRHQX2 : entity is TRUE;
end DFFRHQX2;

architecture behavioral of DFFRHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0002 := VitalINV(P0001);

          Q_zd := VitalINV(P0002);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.092464 ns;
             tpw_CK_negedge : VitalDelayType := 0.0861052 ns;
             tpw_RN_negedge : VitalDelayType := 0.0572117 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.0947578 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.12151 ns, 0.120246 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0397395 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRHQX4 : entity is TRUE;
end DFFRHQX4;

architecture behavioral of DFFRHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.110366 ns;
             tpw_CK_negedge : VitalDelayType := 0.0868222 ns;
             tpw_RN_negedge : VitalDelayType := 0.0637818 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.14283 ns, 0.136029 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0401252 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRHQX8 : entity is TRUE;
end DFFRHQX8;

architecture behavioral of DFFRHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX8",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0915955 ns;
             tpw_CK_negedge : VitalDelayType := 0.0776875 ns;
             tpw_RN_negedge : VitalDelayType := 0.0559464 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.10938 ns, 0.106458 ns);
             tpd_CK_QN : VitalDelayType01 := (0.13061 ns, 0.134309 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0453571 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0701339 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRX1 : entity is TRUE;
end DFFRX1;

architecture behavioral of DFFRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.105751 ns;
             tpw_CK_negedge : VitalDelayType := 0.0773296 ns;
             tpw_RN_negedge : VitalDelayType := 0.0600879 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.116739 ns, 0.1103 ns);
             tpd_CK_QN : VitalDelayType01 := (0.147649 ns, 0.158753 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0458961 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0841165 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRX2 : entity is TRUE;
end DFFRX2;

architecture behavioral of DFFRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.118218 ns;
             tpw_CK_negedge : VitalDelayType := 0.0772603 ns;
             tpw_RN_negedge : VitalDelayType := 0.0613778 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.129286 ns, 0.119845 ns);
             tpd_CK_QN : VitalDelayType01 := (0.161339 ns, 0.173265 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0423771 ns);
             tpd_RN_QN : VitalDelayType01 := (0.084066 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRX4 : entity is TRUE;
end DFFRX4;

architecture behavioral of DFFRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0829737 ns;
             tpw_CK_negedge : VitalDelayType := 0.0777029 ns;
             tpw_RN_negedge : VitalDelayType := 0.0534688 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.10183 ns, 0.100275 ns);
             tpd_CK_QN : VitalDelayType01 := (0.117074 ns, 0.11704 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0393369 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0564572 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRXL : entity is TRUE;
end DFFRXL;

architecture behavioral of DFFRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRXL",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0832506 ns;
             tpw_CK_negedge : VitalDelayType := 0.0903268 ns;
             tpw_SN_negedge : VitalDelayType := 0.0497967 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0887132 ns, 0.11147 ns);
             tpd_SN_Q : VitalDelayType01 := (0.077601 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSHQX1 : entity is TRUE;
end DFFSHQX1;

architecture behavioral of DFFSHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0878007 ns;
             tpw_CK_negedge : VitalDelayType := 0.0903505 ns;
             tpw_SN_negedge : VitalDelayType := 0.0539253 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00101252 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0959683 ns, 0.120639 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0855698 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSHQX2 : entity is TRUE;
end DFFSHQX2;

architecture behavioral of DFFSHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0963074 ns;
             tpw_CK_negedge : VitalDelayType := 0.0906484 ns;
             tpw_SN_negedge : VitalDelayType := 0.0596715 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.106152 ns, 0.128417 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0952859 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSHQX4 : entity is TRUE;
end DFFSHQX4;

architecture behavioral of DFFSHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.113248 ns;
             tpw_CK_negedge : VitalDelayType := 0.0903799 ns;
             tpw_SN_negedge : VitalDelayType := 0.0719597 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.126682 ns, 0.148236 ns);
             tpd_SN_Q : VitalDelayType01 := (0.116786 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSHQX8 : entity is TRUE;
end DFFSHQX8;

architecture behavioral of DFFSHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX8",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0840513 ns;
             tpw_CK_negedge : VitalDelayType := 0.0908845 ns;
             tpw_RN_negedge : VitalDelayType := 0.0886179 ns;
             tpw_SN_negedge : VitalDelayType := 0.0551137 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0932619 ns, 0.11033 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.117991 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0833998 ns, 0.0934143 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRHQX1 : entity is TRUE;
end DFFSRHQX1;

architecture behavioral of DFFSRHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE N35 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N35 := n0_vec(1);

          P0002 := VitalINV(N35);

          Q_zd := VitalINV(P0002);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0893961 ns;
             tpw_CK_negedge : VitalDelayType := 0.090629 ns;
             tpw_RN_negedge : VitalDelayType := 0.0939308 ns;
             tpw_SN_negedge : VitalDelayType := 0.0594899 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.102734 ns, 0.120451 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.128687 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0924683 ns, 0.104101 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRHQX2 : entity is TRUE;
end DFFSRHQX2;

architecture behavioral of DFFSRHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0987426 ns;
             tpw_CK_negedge : VitalDelayType := 0.0910002 ns;
             tpw_RN_negedge : VitalDelayType := 0.0982997 ns;
             tpw_SN_negedge : VitalDelayType := 0.0653576 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.115733 ns, 0.128064 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.139018 ns);
             tpd_SN_Q : VitalDelayType01 := (0.102465 ns, 0.114516 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRHQX4 : entity is TRUE;
end DFFSRHQX4;

architecture behavioral of DFFSRHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.117156 ns;
             tpw_CK_negedge : VitalDelayType := 0.0909526 ns;
             tpw_RN_negedge : VitalDelayType := 0.110385 ns;
             tpw_SN_negedge : VitalDelayType := 0.0778408 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.140851 ns, 0.147698 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.163208 ns);
             tpd_SN_Q : VitalDelayType01 := (0.125103 ns, 0.138712 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRHQX8 : entity is TRUE;
end DFFSRHQX8;

architecture behavioral of DFFSRHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0941408 ns;
             tpw_CK_negedge : VitalDelayType := 0.0826867 ns;
             tpw_RN_negedge : VitalDelayType := 0.10018 ns;
             tpw_SN_negedge : VitalDelayType := 0.0716285 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0978786 ns, 0.111883 ns);
             tpd_CK_QN : VitalDelayType01 := (0.136624 ns, 0.120473 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.123096 ns);
             tpd_RN_QN : VitalDelayType01 := (0.147857 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0939671 ns, 0.104136 ns);
             tpd_SN_QN : VitalDelayType01 := (0.128973 ns, 0.116398 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRX1 : entity is TRUE;
end DFFSRX1;

architecture behavioral of DFFSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.10589 ns;
             tpw_CK_negedge : VitalDelayType := 0.0824436 ns;
             tpw_RN_negedge : VitalDelayType := 0.108862 ns;
             tpw_SN_negedge : VitalDelayType := 0.0824712 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.106469 ns, 0.117377 ns);
             tpd_CK_QN : VitalDelayType01 := (0.155513 ns, 0.144285 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.128611 ns);
             tpd_RN_QN : VitalDelayType01 := (0.166918 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.10034 ns, 0.109754 ns);
             tpd_SN_QN : VitalDelayType01 := (0.148075 ns, 0.137906 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRX2 : entity is TRUE;
end DFFSRX2;

architecture behavioral of DFFSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE QBINT : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          QBINT := VitalINV(P0000);

          Q_zd := VitalINV(QBINT);

          QN_zd := VitalBUF(QBINT);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.120888 ns;
             tpw_CK_negedge : VitalDelayType := 0.0825207 ns;
             tpw_RN_negedge : VitalDelayType := 0.117638 ns;
             tpw_SN_negedge : VitalDelayType := 0.0933438 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.124543 ns, 0.130408 ns);
             tpd_CK_QN : VitalDelayType01 := (0.1718 ns, 0.165496 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.144994 ns);
             tpd_RN_QN : VitalDelayType01 := (0.186565 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.116966 ns, 0.12683 ns);
             tpd_SN_QN : VitalDelayType01 := (0.168402 ns, 0.157091 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRX4 : entity is TRUE;
end DFFSRX4;

architecture behavioral of DFFSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0869551 ns;
             tpw_CK_negedge : VitalDelayType := 0.082741 ns;
             tpw_RN_negedge : VitalDelayType := 0.0927041 ns;
             tpw_SN_negedge : VitalDelayType := 0.0645441 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0921021 ns, 0.105013 ns);
             tpd_CK_QN : VitalDelayType01 := (0.122275 ns, 0.106213 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.115672 ns);
             tpd_RN_QN : VitalDelayType01 := (0.132995 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0880739 ns, 0.0967497 ns);
             tpd_SN_QN : VitalDelayType01 := (0.114037 ns, 0.102225 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRXL : entity is TRUE;
end DFFSRXL;

architecture behavioral of DFFSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0932341 ns;
             tpw_CK_negedge : VitalDelayType := 0.0817486 ns;
             tpw_SN_negedge : VitalDelayType := 0.0664013 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0919432 ns, 0.112556 ns);
             tpd_CK_QN : VitalDelayType01 := (0.137289 ns, 0.113914 ns);
             tpd_SN_Q : VitalDelayType01 := (0.087913 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.10977 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSX1 : entity is TRUE;
end DFFSX1;

architecture behavioral of DFFSX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.104478 ns;
             tpw_CK_negedge : VitalDelayType := 0.0827615 ns;
             tpw_SN_negedge : VitalDelayType := 0.0770248 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0985781 ns, 0.117834 ns);
             tpd_CK_QN : VitalDelayType01 := (0.155918 ns, 0.135318 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0940791 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.130679 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSX2 : entity is TRUE;
end DFFSX2;

architecture behavioral of DFFSX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.118141 ns;
             tpw_CK_negedge : VitalDelayType := 0.0816303 ns;
             tpw_SN_negedge : VitalDelayType := 0.0867257 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.0010083 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.112631 ns, 0.130756 ns);
             tpd_CK_QN : VitalDelayType01 := (0.17221 ns, 0.152011 ns);
             tpd_SN_Q : VitalDelayType01 := (0.108736 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.147869 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSX4 : entity is TRUE;
end DFFSX4;

architecture behavioral of DFFSX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0861506 ns;
             tpw_CK_negedge : VitalDelayType := 0.0817485 ns;
             tpw_SN_negedge : VitalDelayType := 0.0597956 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0868682 ns, 0.105828 ns);
             tpd_CK_QN : VitalDelayType01 := (0.123082 ns, 0.100754 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0826296 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.096476 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSXL : entity is TRUE;
end DFFSXL;

architecture behavioral of DFFSXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSXL",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFTRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0894864 ns;
             tpw_CK_negedge : VitalDelayType := 0.070594 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0922823 ns, 0.105771 ns);
             tpd_CK_QN : VitalDelayType01 := (0.129767 ns, 0.114082 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFTRX1 : entity is TRUE;
end DFFTRX1;

architecture behavioral of DFFTRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX1",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFTRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalAND2(D_dly, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFTRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0996885 ns;
             tpw_CK_negedge : VitalDelayType := 0.0706783 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00101119 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0986104 ns, 0.10939 ns);
             tpd_CK_QN : VitalDelayType01 := (0.146492 ns, 0.135133 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFTRX2 : entity is TRUE;
end DFFTRX2;

architecture behavioral of DFFTRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX2",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFTRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalAND2(D_dly, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFTRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.111695 ns;
             tpw_CK_negedge : VitalDelayType := 0.0703846 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.113289 ns, 0.118732 ns);
             tpd_CK_QN : VitalDelayType01 := (0.158664 ns, 0.152469 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFTRX4 : entity is TRUE;
end DFFTRX4;

architecture behavioral of DFFTRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX4",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFTRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalAND2(D_dly, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFTRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0826822 ns;
             tpw_CK_negedge : VitalDelayType := 0.0703809 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0870894 ns, 0.0995152 ns);
             tpd_CK_QN : VitalDelayType01 := (0.116219 ns, 0.100889 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFTRXL : entity is TRUE;
end DFFTRXL;

architecture behavioral of DFFTRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRXL",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFTRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalAND2(D_dly, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0892575 ns;
             tpw_CK_negedge : VitalDelayType := 0.0773277 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0923074 ns, 0.105306 ns);
             tpd_CK_QN : VitalDelayType01 := (0.129306 ns, 0.114179 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFX1 : entity is TRUE;
end DFFX1;

architecture behavioral of DFFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0996783 ns;
             tpw_CK_negedge : VitalDelayType := 0.0777039 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0987012 ns, 0.109157 ns);
             tpd_CK_QN : VitalDelayType01 := (0.146469 ns, 0.135352 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFX2 : entity is TRUE;
end DFFX2;

architecture behavioral of DFFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.11086 ns;
             tpw_CK_negedge : VitalDelayType := 0.0774738 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.112214 ns, 0.117964 ns);
             tpd_CK_QN : VitalDelayType01 := (0.157851 ns, 0.151359 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFX4 : entity is TRUE;
end DFFX4;

architecture behavioral of DFFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0823066 ns;
             tpw_CK_negedge : VitalDelayType := 0.0775143 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0868736 ns, 0.0989398 ns);
             tpd_CK_QN : VitalDelayType01 := (0.115701 ns, 0.100684 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFXL : entity is TRUE;
end DFFXL;

architecture behavioral of DFFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY1X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0732881 ns, 0.0699428 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY1X1 : entity is TRUE;
end DLY1X1;

architecture behavioral of DLY1X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY1X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0990587 ns, 0.0937423 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY1X4 : entity is TRUE;
end DLY1X4;

architecture behavioral of DLY1X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.134092 ns, 0.130496 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY2X1 : entity is TRUE;
end DLY2X1;

architecture behavioral of DLY2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.160119 ns, 0.154686 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY2X4 : entity is TRUE;
end DLY2X4;

architecture behavioral of DLY2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.195218 ns, 0.191712 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY3X1 : entity is TRUE;
end DLY3X1;

architecture behavioral of DLY3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.221026 ns, 0.215412 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY3X4 : entity is TRUE;
end DLY3X4;

architecture behavioral of DLY3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.252652 ns, 0.248653 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY4X1 : entity is TRUE;
end DLY4X1;

architecture behavioral of DLY4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.27762 ns, 0.272436 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY4X4 : entity is TRUE;
end DLY4X4;

architecture behavioral of DLY4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0821974 ns;
             tpw_CK_negedge : VitalDelayType := 0.0799898 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0929119 ns, 0.108773 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFHQX1 : entity is TRUE;
end EDFFHQX1;

architecture behavioral of EDFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0001);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0861964 ns;
             tpw_CK_negedge : VitalDelayType := 0.0799942 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.098839 ns, 0.113758 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFHQX2 : entity is TRUE;
end EDFFHQX2;

architecture behavioral of EDFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0001);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0930515 ns;
             tpw_CK_negedge : VitalDelayType := 0.0796989 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.109416 ns, 0.120811 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFHQX4 : entity is TRUE;
end EDFFHQX4;

architecture behavioral of EDFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.10662 ns;
             tpw_CK_negedge : VitalDelayType := 0.0801876 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.127569 ns, 0.134412 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFHQX8 : entity is TRUE;
end EDFFHQX8;

architecture behavioral of EDFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX8",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFTRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0898612 ns;
             tpw_CK_negedge : VitalDelayType := 0.0773401 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.141625 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0944691 ns, 0.103935 ns);
             tpd_CK_QN : VitalDelayType01 := (0.126723 ns, 0.115725 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFTRX1 : entity is TRUE;
end EDFFTRX1;

architecture behavioral of EDFFTRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX1",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFTRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n0_D := VitalAND2(n7_var, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          E_EQ_1_AN_RN_EQ_1 := VitalAND2(E_dly, RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFTRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.101157 ns;
             tpw_CK_negedge : VitalDelayType := 0.0781716 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.141625 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.101006 ns, 0.109822 ns);
             tpd_CK_QN : VitalDelayType01 := (0.145912 ns, 0.136846 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFTRX2 : entity is TRUE;
end EDFFTRX2;

architecture behavioral of EDFFTRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX2",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFTRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n0_D := VitalAND2(n7_var, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          E_EQ_1_AN_RN_EQ_1 := VitalAND2(E_dly, RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFTRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.111901 ns;
             tpw_CK_negedge : VitalDelayType := 0.0777975 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.141625 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.114169 ns, 0.119625 ns);
             tpd_CK_QN : VitalDelayType01 := (0.159888 ns, 0.153901 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFTRX4 : entity is TRUE;
end EDFFTRX4;

architecture behavioral of EDFFTRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX4",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFTRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n0_D := VitalAND2(n7_var, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          E_EQ_1_AN_RN_EQ_1 := VitalAND2(E_dly, RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFTRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0845917 ns;
             tpw_CK_negedge : VitalDelayType := 0.0773574 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.141625 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0907831 ns, 0.102971 ns);
             tpd_CK_QN : VitalDelayType01 := (0.120252 ns, 0.10495 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFTRXL : entity is TRUE;
end EDFFTRXL;

architecture behavioral of EDFFTRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRXL",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRXL",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFTRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n0_D := VitalAND2(n7_var, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          E_EQ_1_AN_RN_EQ_1 := VitalAND2(E_dly, RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0891711 ns;
             tpw_CK_negedge : VitalDelayType := 0.0739508 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0932917 ns, 0.102369 ns);
             tpd_CK_QN : VitalDelayType01 := (0.124881 ns, 0.114257 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFX1 : entity is TRUE;
end EDFFX1;

architecture behavioral of EDFFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.100011 ns;
             tpw_CK_negedge : VitalDelayType := 0.0739402 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0996358 ns, 0.108093 ns);
             tpd_CK_QN : VitalDelayType01 := (0.143741 ns, 0.135264 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFX2 : entity is TRUE;
end EDFFX2;

architecture behavioral of EDFFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.111881 ns;
             tpw_CK_negedge : VitalDelayType := 0.0738449 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.113906 ns, 0.119261 ns);
             tpd_CK_QN : VitalDelayType01 := (0.159543 ns, 0.153409 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFX4 : entity is TRUE;
end EDFFX4;

architecture behavioral of EDFFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.083993 ns;
             tpw_CK_negedge : VitalDelayType := 0.0741684 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.089675 ns, 0.1012 ns);
             tpd_CK_QN : VitalDelayType01 := (0.118175 ns, 0.103618 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFXL : entity is TRUE;
end EDFFXL;

architecture behavioral of EDFFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFXL",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity HOLDX1 is
   generic (
             tipd_Y : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         Y : inout std_ulogic);

   attribute VITAL_LEVEL0 of HOLDX1 : entity is TRUE;
end HOLDX1;

architecture behavioral of HOLDX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL Y_ipd : std_ulogic := 'X';
   SIGNAL io_wire_0 : std_ulogic := 'X';
   CONSTANT ResultMapping : VitalResultMapType := ('W', 'W', 'L', 'H');

begin

--functionality section
   VitalBUF (io_wire_0, Y);
   VitalBUF (Y,
            io_wire_0,
            ( 0 ps, 0 ps),
            ResultMapping );

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0122513 ns, 0.0083635 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX1 : entity is TRUE;
end INVX1;

architecture behavioral of INVX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0118211 ns, 0.00803667 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX12 : entity is TRUE;
end INVX12;

architecture behavioral of INVX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX16 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0417481 ns, 0.0278282 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX16 : entity is TRUE;
end INVX16;

architecture behavioral of INVX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0116902 ns, 0.00791128 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX2 : entity is TRUE;
end INVX2;

architecture behavioral of INVX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX20 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0119454 ns, 0.00816591 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX20 : entity is TRUE;
end INVX20;

architecture behavioral of INVX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0119939 ns, 0.00820648 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX3 : entity is TRUE;
end INVX3;

architecture behavioral of INVX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0117121 ns, 0.00791109 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX4 : entity is TRUE;
end INVX4;

architecture behavioral of INVX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0120282 ns, 0.00820151 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX6 : entity is TRUE;
end INVX6;

architecture behavioral of INVX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.011924 ns, 0.00812566 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX8 : entity is TRUE;
end INVX8;

architecture behavioral of INVX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVXL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0120288 ns, 0.00791776 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVXL : entity is TRUE;
end INVXL;

architecture behavioral of INVXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MDFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.080135 ns;
             tpw_CK_negedge : VitalDelayType := 0.0808533 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0887055 ns, 0.105421 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of MDFFHQX1 : entity is TRUE;
end MDFFHQX1;

architecture behavioral of MDFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly)

      --timing checks section variables
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE S0_EQ_1 : std_ulogic;
      VARIABLE S0_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX1",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX1",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX1",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/MDFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(D1_dly, D0_dly, S0_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0002 := VitalINV(N30);

          Q_zd := VitalINV(P0002);

          S0_EQ_1 := VitalBUF(S0_dly);

          S0_EQ_0 := VitalINV(S0_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MDFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0841769 ns;
             tpw_CK_negedge : VitalDelayType := 0.0808993 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0956888 ns, 0.113769 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of MDFFHQX2 : entity is TRUE;
end MDFFHQX2;

architecture behavioral of MDFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly)

      --timing checks section variables
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE S0_EQ_1 : std_ulogic;
      VARIABLE S0_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX2",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX2",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX2",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/MDFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(D1_dly, D0_dly, S0_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0002 := VitalINV(N30);

          Q_zd := VitalINV(P0002);

          S0_EQ_1 := VitalBUF(S0_dly);

          S0_EQ_0 := VitalINV(S0_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MDFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0915236 ns;
             tpw_CK_negedge : VitalDelayType := 0.0808553 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.106012 ns, 0.119027 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of MDFFHQX4 : entity is TRUE;
end MDFFHQX4;

architecture behavioral of MDFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly)

      --timing checks section variables
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE S0_EQ_1 : std_ulogic;
      VARIABLE S0_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX4",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX4",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX4",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/MDFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(D1_dly, D0_dly, S0_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          S0_EQ_1 := VitalBUF(S0_dly);

          S0_EQ_0 := VitalINV(S0_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MDFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.106611 ns;
             tpw_CK_negedge : VitalDelayType := 0.0807687 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.127071 ns, 0.134439 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of MDFFHQX8 : entity is TRUE;
end MDFFHQX8;

architecture behavioral of MDFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly)

      --timing checks section variables
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE S0_EQ_1 : std_ulogic;
      VARIABLE S0_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX8",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX8",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX8",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/MDFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(D1_dly, D0_dly, S0_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          S0_EQ_1 := VitalBUF(S0_dly);

          S0_EQ_0 := VitalINV(S0_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0446295 ns, 0.0540951 ns);
             tpd_B_Y : VitalDelayType01 := (0.0437592 ns, 0.0549944 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0451192 ns, 0.0485915 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2X1 : entity is TRUE;
end MX2X1;

architecture behavioral of MX2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.05978 ns, 0.0743784 ns);
             tpd_B_Y : VitalDelayType01 := (0.058953 ns, 0.0752722 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0599859 ns, 0.0685441 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2X2 : entity is TRUE;
end MX2X2;

architecture behavioral of MX2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0739285 ns, 0.0900676 ns);
             tpd_B_Y : VitalDelayType01 := (0.0725703 ns, 0.0912288 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0752541 ns, 0.0854749 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2X4 : entity is TRUE;
end MX2X4;

architecture behavioral of MX2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.096803 ns, 0.119641 ns);
             tpd_B_Y : VitalDelayType01 := (0.0953833 ns, 0.120628 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0979384 ns, 0.11462 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2X6 : entity is TRUE;
end MX2X6;

architecture behavioral of MX2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.119197 ns, 0.148592 ns);
             tpd_B_Y : VitalDelayType01 := (0.117562 ns, 0.1493 ns);
             tpd_S0_Y : VitalDelayType01 := (0.119932 ns, 0.143431 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2X8 : entity is TRUE;
end MX2X8;

architecture behavioral of MX2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.037012 ns, 0.043849 ns);
             tpd_B_Y : VitalDelayType01 := (0.0362318 ns, 0.0448205 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0378944 ns, 0.0388433 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2XL : entity is TRUE;
end MX2XL;

architecture behavioral of MX2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0670374 ns, 0.077409 ns);
             tpd_B_Y : VitalDelayType01 := (0.0661553 ns, 0.0783607 ns);
             tpd_C_Y : VitalDelayType01 := (0.0445292 ns, 0.0559161 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0673687 ns, 0.0717158 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0450268 ns, 0.0488436 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX3X1 : entity is TRUE;
end MX3X1;

architecture behavioral of MX3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(C_ipd, n0_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0855857 ns, 0.0993499 ns);
             tpd_B_Y : VitalDelayType01 := (0.0845727 ns, 0.100119 ns);
             tpd_C_Y : VitalDelayType01 := (0.0594443 ns, 0.0758963 ns);
             tpd_S0_Y : VitalDelayType01 := (0.085768 ns, 0.0934075 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0609076 ns, 0.0682585 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX3X2 : entity is TRUE;
end MX3X2;

architecture behavioral of MX3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(C_ipd, n0_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.126055 ns, 0.150968 ns);
             tpd_B_Y : VitalDelayType01 := (0.124884 ns, 0.151472 ns);
             tpd_C_Y : VitalDelayType01 := (0.0637167 ns, 0.0808245 ns);
             tpd_S0_Y : VitalDelayType01 := (0.125946 ns, 0.144484 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0807296 ns, 0.0927112 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX3X4 : entity is TRUE;
end MX3X4;

architecture behavioral of MX3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(C_ipd, n0_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0574268 ns, 0.065264 ns);
             tpd_B_Y : VitalDelayType01 := (0.0565867 ns, 0.066189 ns);
             tpd_C_Y : VitalDelayType01 := (0.0369417 ns, 0.0457181 ns);
             tpd_S0_Y : VitalDelayType01 := (0.057836 ns, 0.0596669 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0372472 ns, 0.0393045 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX3XL : entity is TRUE;
end MX3XL;

architecture behavioral of MX3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(C_ipd, n0_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0665425 ns, 0.0770544 ns);
             tpd_B_Y : VitalDelayType01 := (0.0656259 ns, 0.0777713 ns);
             tpd_C_Y : VitalDelayType01 := (0.0655408 ns, 0.0767135 ns);
             tpd_D_Y : VitalDelayType01 := (0.064503 ns, 0.0775861 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0696008 ns, 0.0733161 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0459215 ns, 0.0429633 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX4X1 : entity is TRUE;
end MX4X1;

architecture behavioral of MX4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(n0_var, n1_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0850965 ns, 0.0991056 ns);
             tpd_B_Y : VitalDelayType01 := (0.0843747 ns, 0.0996594 ns);
             tpd_C_Y : VitalDelayType01 := (0.0860214 ns, 0.100949 ns);
             tpd_D_Y : VitalDelayType01 := (0.0840453 ns, 0.100782 ns);
             tpd_S0_Y : VitalDelayType01 := (0.088487 ns, 0.0960291 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0640966 ns, 0.062311 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX4X2 : entity is TRUE;
end MX4X2;

architecture behavioral of MX4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(n0_var, n1_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.125524 ns, 0.150647 ns);
             tpd_B_Y : VitalDelayType01 := (0.124682 ns, 0.150998 ns);
             tpd_C_Y : VitalDelayType01 := (0.126446 ns, 0.152292 ns);
             tpd_D_Y : VitalDelayType01 := (0.124304 ns, 0.151766 ns);
             tpd_S0_Y : VitalDelayType01 := (0.128356 ns, 0.146946 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0975379 ns, 0.10545 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX4X4 : entity is TRUE;
end MX4X4;

architecture behavioral of MX4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(n0_var, n1_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0577042 ns, 0.0657339 ns);
             tpd_B_Y : VitalDelayType01 := (0.0563264 ns, 0.0658588 ns);
             tpd_C_Y : VitalDelayType01 := (0.0566742 ns, 0.0653482 ns);
             tpd_D_Y : VitalDelayType01 := (0.0555934 ns, 0.0661197 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0608217 ns, 0.0619871 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0376166 ns, 0.0340659 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX4XL : entity is TRUE;
end MX4XL;

architecture behavioral of MX4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(n0_var, n1_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0285342 ns, 0.0207032 ns);
             tpd_B_Y : VitalDelayType01 := (0.0302704 ns, 0.0188726 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0267579 ns, 0.0247425 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2X1 : entity is TRUE;
end MXI2X1;

architecture behavioral of MXI2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0773474 ns, 0.0697431 ns);
             tpd_B_Y : VitalDelayType01 := (0.078608 ns, 0.0693028 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0718542 ns, 0.0705216 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2X2 : entity is TRUE;
end MXI2X2;

architecture behavioral of MXI2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.092924 ns, 0.0812376 ns);
             tpd_B_Y : VitalDelayType01 := (0.0941273 ns, 0.0807719 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0870287 ns, 0.0817718 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2X4 : entity is TRUE;
end MXI2X4;

architecture behavioral of MXI2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.111267 ns, 0.0923225 ns);
             tpd_B_Y : VitalDelayType01 := (0.112062 ns, 0.0913505 ns);
             tpd_S0_Y : VitalDelayType01 := (0.105538 ns, 0.0926556 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2X6 : entity is TRUE;
end MXI2X6;

architecture behavioral of MXI2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.118667 ns, 0.100087 ns);
             tpd_B_Y : VitalDelayType01 := (0.119538 ns, 0.0991129 ns);
             tpd_S0_Y : VitalDelayType01 := (0.112937 ns, 0.10045 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2X8 : entity is TRUE;
end MXI2X8;

architecture behavioral of MXI2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0278434 ns, 0.0190482 ns);
             tpd_B_Y : VitalDelayType01 := (0.0289995 ns, 0.018294 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0236344 ns, 0.0205974 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2XL : entity is TRUE;
end MXI2XL;

architecture behavioral of MXI2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0848661 ns, 0.0818798 ns);
             tpd_B_Y : VitalDelayType01 := (0.0860801 ns, 0.081168 ns);
             tpd_C_Y : VitalDelayType01 := (0.0610179 ns, 0.0664595 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0795913 ns, 0.0825357 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0459398 ns, 0.0496297 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI3X1 : entity is TRUE;
end MXI3X1;

architecture behavioral of MXI3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n1_var := VitalMUX2(C_ipd, n0_var, S1_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.10081 ns, 0.102053 ns);
             tpd_B_Y : VitalDelayType01 := (0.101696 ns, 0.101386 ns);
             tpd_C_Y : VitalDelayType01 := (0.076721 ns, 0.08748 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0951544 ns, 0.102672 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0606034 ns, 0.0689514 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI3X2 : entity is TRUE;
end MXI3X2;

architecture behavioral of MXI3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n1_var := VitalMUX2(C_ipd, n0_var, S1_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.120257 ns, 0.12119 ns);
             tpd_B_Y : VitalDelayType01 := (0.121574 ns, 0.120664 ns);
             tpd_C_Y : VitalDelayType01 := (0.0923904 ns, 0.103994 ns);
             tpd_S0_Y : VitalDelayType01 := (0.114969 ns, 0.122079 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0754539 ns, 0.0855239 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI3X4 : entity is TRUE;
end MXI3X4;

architecture behavioral of MXI3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n1_var := VitalMUX2(C_ipd, n0_var, S1_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.076484 ns, 0.0712191 ns);
             tpd_B_Y : VitalDelayType01 := (0.0775395 ns, 0.0704394 ns);
             tpd_C_Y : VitalDelayType01 := (0.0531788 ns, 0.0560354 ns);
             tpd_S0_Y : VitalDelayType01 := (0.071219 ns, 0.0719133 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0384799 ns, 0.0396805 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI3XL : entity is TRUE;
end MXI3XL;

architecture behavioral of MXI3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n1_var := VitalMUX2(C_ipd, n0_var, S1_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0841519 ns, 0.0809765 ns);
             tpd_B_Y : VitalDelayType01 := (0.0853781 ns, 0.0805579 ns);
             tpd_C_Y : VitalDelayType01 := (0.0832799 ns, 0.0815775 ns);
             tpd_D_Y : VitalDelayType01 := (0.0845736 ns, 0.0811034 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0814091 ns, 0.085448 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0453846 ns, 0.0486814 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI4X1 : entity is TRUE;
end MXI4X1;

architecture behavioral of MXI4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n2_var := VitalMUX2(n0_var, n1_var, S1_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.101413 ns, 0.102384 ns);
             tpd_B_Y : VitalDelayType01 := (0.102724 ns, 0.101939 ns);
             tpd_C_Y : VitalDelayType01 := (0.101924 ns, 0.103776 ns);
             tpd_D_Y : VitalDelayType01 := (0.102119 ns, 0.102464 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0987605 ns, 0.106677 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0603345 ns, 0.0684999 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI4X2 : entity is TRUE;
end MXI4X2;

architecture behavioral of MXI4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n2_var := VitalMUX2(n0_var, n1_var, S1_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.122953 ns, 0.123889 ns);
             tpd_B_Y : VitalDelayType01 := (0.124182 ns, 0.123114 ns);
             tpd_C_Y : VitalDelayType01 := (0.120276 ns, 0.122629 ns);
             tpd_D_Y : VitalDelayType01 := (0.120637 ns, 0.121611 ns);
             tpd_S0_Y : VitalDelayType01 := (0.1191 ns, 0.127391 ns);
             tpd_S1_Y : VitalDelayType01 := (0.076263 ns, 0.0859542 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI4X4 : entity is TRUE;
end MXI4X4;

architecture behavioral of MXI4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n2_var := VitalMUX2(n0_var, n1_var, S1_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.076839 ns, 0.0712278 ns);
             tpd_B_Y : VitalDelayType01 := (0.0781814 ns, 0.0706454 ns);
             tpd_C_Y : VitalDelayType01 := (0.0752638 ns, 0.0711808 ns);
             tpd_D_Y : VitalDelayType01 := (0.0767518 ns, 0.0709102 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0738845 ns, 0.0756062 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0380443 ns, 0.0388617 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI4XL : entity is TRUE;
end MXI4XL;

architecture behavioral of MXI4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n2_var := VitalMUX2(n0_var, n1_var, S1_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0303279 ns, 0.036171 ns);
             tpd_B_Y : VitalDelayType01 := (0.0135536 ns, 0.013541 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2BX1 : entity is TRUE;
end NAND2BX1;

architecture behavioral of NAND2BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.039951 ns, 0.048364 ns);
             tpd_B_Y : VitalDelayType01 := (0.0133792 ns, 0.0132797 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2BX2 : entity is TRUE;
end NAND2BX2;

architecture behavioral of NAND2BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0425106 ns, 0.0509602 ns);
             tpd_B_Y : VitalDelayType01 := (0.0133912 ns, 0.0133102 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2BX4 : entity is TRUE;
end NAND2BX4;

architecture behavioral of NAND2BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0253449 ns, 0.0298737 ns);
             tpd_B_Y : VitalDelayType01 := (0.0133544 ns, 0.0129481 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2BXL : entity is TRUE;
end NAND2BXL;

architecture behavioral of NAND2BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0158546 ns, 0.01495 ns);
             tpd_B_Y : VitalDelayType01 := (0.0136534 ns, 0.0135748 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2X1 : entity is TRUE;
end NAND2X1;

architecture behavioral of NAND2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0156159 ns, 0.0146124 ns);
             tpd_B_Y : VitalDelayType01 := (0.0135115 ns, 0.0133707 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2X2 : entity is TRUE;
end NAND2X2;

architecture behavioral of NAND2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0156932 ns, 0.0146887 ns);
             tpd_B_Y : VitalDelayType01 := (0.0135493 ns, 0.0134068 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2X4 : entity is TRUE;
end NAND2X4;

architecture behavioral of NAND2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0158417 ns, 0.0149863 ns);
             tpd_B_Y : VitalDelayType01 := (0.0136214 ns, 0.0135596 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2X6 : entity is TRUE;
end NAND2X6;

architecture behavioral of NAND2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0159097 ns, 0.0150083 ns);
             tpd_B_Y : VitalDelayType01 := (0.0136107 ns, 0.0135244 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2X8 : entity is TRUE;
end NAND2X8;

architecture behavioral of NAND2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0155862 ns, 0.0142423 ns);
             tpd_B_Y : VitalDelayType01 := (0.0133916 ns, 0.0130138 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2XL : entity is TRUE;
end NAND2XL;

architecture behavioral of NAND2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.033886 ns, 0.0450776 ns);
             tpd_B_Y : VitalDelayType01 := (0.0175358 ns, 0.0224417 ns);
             tpd_C_Y : VitalDelayType01 := (0.0153246 ns, 0.0192536 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3BX1 : entity is TRUE;
end NAND3BX1;

architecture behavioral of NAND3BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0437342 ns, 0.0562765 ns);
             tpd_B_Y : VitalDelayType01 := (0.017216 ns, 0.0218594 ns);
             tpd_C_Y : VitalDelayType01 := (0.0148722 ns, 0.0183449 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3BX2 : entity is TRUE;
end NAND3BX2;

architecture behavioral of NAND3BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.046412 ns, 0.0588323 ns);
             tpd_B_Y : VitalDelayType01 := (0.0172059 ns, 0.0218302 ns);
             tpd_C_Y : VitalDelayType01 := (0.0149136 ns, 0.0183113 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3BX4 : entity is TRUE;
end NAND3BX4;

architecture behavioral of NAND3BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0288292 ns, 0.0389123 ns);
             tpd_B_Y : VitalDelayType01 := (0.0174401 ns, 0.0216789 ns);
             tpd_C_Y : VitalDelayType01 := (0.015187 ns, 0.0186473 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3BXL : entity is TRUE;
end NAND3BXL;

architecture behavioral of NAND3BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0190124 ns, 0.0237703 ns);
             tpd_B_Y : VitalDelayType01 := (0.0175955 ns, 0.0225276 ns);
             tpd_C_Y : VitalDelayType01 := (0.0153984 ns, 0.0193276 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3X1 : entity is TRUE;
end NAND3X1;

architecture behavioral of NAND3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0186018 ns, 0.0231052 ns);
             tpd_B_Y : VitalDelayType01 := (0.0173156 ns, 0.0220272 ns);
             tpd_C_Y : VitalDelayType01 := (0.0149587 ns, 0.0185029 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3X2 : entity is TRUE;
end NAND3X2;

architecture behavioral of NAND3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0187031 ns, 0.0232324 ns);
             tpd_B_Y : VitalDelayType01 := (0.0173144 ns, 0.0219767 ns);
             tpd_C_Y : VitalDelayType01 := (0.0150365 ns, 0.0184674 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3X4 : entity is TRUE;
end NAND3X4;

architecture behavioral of NAND3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.018804 ns, 0.0233593 ns);
             tpd_B_Y : VitalDelayType01 := (0.0173541 ns, 0.0220646 ns);
             tpd_C_Y : VitalDelayType01 := (0.0150453 ns, 0.0186145 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3X6 : entity is TRUE;
end NAND3X6;

architecture behavioral of NAND3X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0189139 ns, 0.023505 ns);
             tpd_B_Y : VitalDelayType01 := (0.0174248 ns, 0.022107 ns);
             tpd_C_Y : VitalDelayType01 := (0.015086 ns, 0.0186499 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3X8 : entity is TRUE;
end NAND3X8;

architecture behavioral of NAND3X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0190034 ns, 0.0232556 ns);
             tpd_B_Y : VitalDelayType01 := (0.0175035 ns, 0.0219559 ns);
             tpd_C_Y : VitalDelayType01 := (0.0152109 ns, 0.0186093 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3XL : entity is TRUE;
end NAND3XL;

architecture behavioral of NAND3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BBX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0358307 ns, 0.0564972 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0353623 ns, 0.0542108 ns);
             tpd_C_Y : VitalDelayType01 := (0.0186915 ns, 0.0297757 ns);
             tpd_D_Y : VitalDelayType01 := (0.0163491 ns, 0.024623 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BBX1 : entity is TRUE;
end NAND4BBX1;

architecture behavioral of NAND4BBX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C_ipd);
          n4_var := VitalAND2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BBX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0465256 ns, 0.0695131 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0458641 ns, 0.066329 ns);
             tpd_C_Y : VitalDelayType01 := (0.0187822 ns, 0.0302193 ns);
             tpd_D_Y : VitalDelayType01 := (0.0160928 ns, 0.0241087 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BBX2 : entity is TRUE;
end NAND4BBX2;

architecture behavioral of NAND4BBX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C_ipd);
          n4_var := VitalAND2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BBX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0492964 ns, 0.071921 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0485744 ns, 0.0687632 ns);
             tpd_C_Y : VitalDelayType01 := (0.0189389 ns, 0.0303172 ns);
             tpd_D_Y : VitalDelayType01 := (0.0163226 ns, 0.0244555 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BBX4 : entity is TRUE;
end NAND4BBX4;

architecture behavioral of NAND4BBX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C_ipd);
          n4_var := VitalAND2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BBXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0308867 ns, 0.0501262 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0302194 ns, 0.047948 ns);
             tpd_C_Y : VitalDelayType01 := (0.0185258 ns, 0.0287702 ns);
             tpd_D_Y : VitalDelayType01 := (0.0161979 ns, 0.0238156 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BBXL : entity is TRUE;
end NAND4BBXL;

architecture behavioral of NAND4BBXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C_ipd);
          n4_var := VitalAND2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0362062 ns, 0.0559056 ns);
             tpd_B_Y : VitalDelayType01 := (0.020365 ns, 0.0333077 ns);
             tpd_C_Y : VitalDelayType01 := (0.0187058 ns, 0.0298075 ns);
             tpd_D_Y : VitalDelayType01 := (0.0164058 ns, 0.0247871 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BX1 : entity is TRUE;
end NAND4BX1;

architecture behavioral of NAND4BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          n3_var := VitalAND2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.04697 ns, 0.068597 ns);
             tpd_B_Y : VitalDelayType01 := (0.0204264 ns, 0.0339556 ns);
             tpd_C_Y : VitalDelayType01 := (0.0188629 ns, 0.0305406 ns);
             tpd_D_Y : VitalDelayType01 := (0.0161986 ns, 0.0243207 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BX2 : entity is TRUE;
end NAND4BX2;

architecture behavioral of NAND4BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          n3_var := VitalAND2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0497203 ns, 0.070769 ns);
             tpd_B_Y : VitalDelayType01 := (0.0204514 ns, 0.0339667 ns);
             tpd_C_Y : VitalDelayType01 := (0.0188793 ns, 0.0306457 ns);
             tpd_D_Y : VitalDelayType01 := (0.0162506 ns, 0.0245489 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BX4 : entity is TRUE;
end NAND4BX4;

architecture behavioral of NAND4BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          n3_var := VitalAND2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0310245 ns, 0.0495579 ns);
             tpd_B_Y : VitalDelayType01 := (0.0202371 ns, 0.0322949 ns);
             tpd_C_Y : VitalDelayType01 := (0.0185486 ns, 0.0288433 ns);
             tpd_D_Y : VitalDelayType01 := (0.0162707 ns, 0.0239347 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BXL : entity is TRUE;
end NAND4BXL;

architecture behavioral of NAND4BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          n3_var := VitalAND2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0212061 ns, 0.0348898 ns);
             tpd_B_Y : VitalDelayType01 := (0.0204822 ns, 0.033491 ns);
             tpd_C_Y : VitalDelayType01 := (0.0188618 ns, 0.0300723 ns);
             tpd_D_Y : VitalDelayType01 := (0.0164741 ns, 0.0247545 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4X1 : entity is TRUE;
end NAND4X1;

architecture behavioral of NAND4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0210673 ns, 0.0350045 ns);
             tpd_B_Y : VitalDelayType01 := (0.0203822 ns, 0.0336962 ns);
             tpd_C_Y : VitalDelayType01 := (0.0187436 ns, 0.0299751 ns);
             tpd_D_Y : VitalDelayType01 := (0.0163165 ns, 0.0241755 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4X2 : entity is TRUE;
end NAND4X2;

architecture behavioral of NAND4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.02129 ns, 0.036057 ns);
             tpd_B_Y : VitalDelayType01 := (0.0205461 ns, 0.0342071 ns);
             tpd_C_Y : VitalDelayType01 := (0.0189798 ns, 0.0308072 ns);
             tpd_D_Y : VitalDelayType01 := (0.0163668 ns, 0.0246935 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4X4 : entity is TRUE;
end NAND4X4;

architecture behavioral of NAND4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0214046 ns, 0.0360371 ns);
             tpd_B_Y : VitalDelayType01 := (0.0206921 ns, 0.0345224 ns);
             tpd_C_Y : VitalDelayType01 := (0.0191069 ns, 0.0310684 ns);
             tpd_D_Y : VitalDelayType01 := (0.0165799 ns, 0.0250811 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4X6 : entity is TRUE;
end NAND4X6;

architecture behavioral of NAND4X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0213993 ns, 0.0361223 ns);
             tpd_B_Y : VitalDelayType01 := (0.0206875 ns, 0.0345828 ns);
             tpd_C_Y : VitalDelayType01 := (0.0190742 ns, 0.0310856 ns);
             tpd_D_Y : VitalDelayType01 := (0.0165539 ns, 0.0251384 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4X8 : entity is TRUE;
end NAND4X8;

architecture behavioral of NAND4X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0210611 ns, 0.0336138 ns);
             tpd_B_Y : VitalDelayType01 := (0.020281 ns, 0.0322945 ns);
             tpd_C_Y : VitalDelayType01 := (0.0186059 ns, 0.0288089 ns);
             tpd_D_Y : VitalDelayType01 := (0.0162786 ns, 0.0239244 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4XL : entity is TRUE;
end NAND4XL;

architecture behavioral of NAND4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0368578 ns, 0.0330872 ns);
             tpd_B_Y : VitalDelayType01 := (0.0183267 ns, 0.0092746 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2BX1 : entity is TRUE;
end NOR2BX1;

architecture behavioral of NOR2BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0458495 ns, 0.0453775 ns);
             tpd_B_Y : VitalDelayType01 := (0.0178179 ns, 0.00910514 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2BX2 : entity is TRUE;
end NOR2BX2;

architecture behavioral of NOR2BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0643237 ns, 0.0692287 ns);
             tpd_B_Y : VitalDelayType01 := (0.0177779 ns, 0.00910127 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2BX4 : entity is TRUE;
end NOR2BX4;

architecture behavioral of NOR2BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0319798 ns, 0.0266284 ns);
             tpd_B_Y : VitalDelayType01 := (0.0179987 ns, 0.00884629 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2BXL : entity is TRUE;
end NOR2BXL;

architecture behavioral of NOR2BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0225458 ns, 0.0114726 ns);
             tpd_B_Y : VitalDelayType01 := (0.0183344 ns, 0.00930679 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2X1 : entity is TRUE;
end NOR2X1;

architecture behavioral of NOR2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0220542 ns, 0.0111702 ns);
             tpd_B_Y : VitalDelayType01 := (0.0179057 ns, 0.00912848 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2X2 : entity is TRUE;
end NOR2X2;

architecture behavioral of NOR2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0221949 ns, 0.0112876 ns);
             tpd_B_Y : VitalDelayType01 := (0.017936 ns, 0.00915868 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2X4 : entity is TRUE;
end NOR2X4;

architecture behavioral of NOR2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0221504 ns, 0.0113893 ns);
             tpd_B_Y : VitalDelayType01 := (0.0179647 ns, 0.00919777 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2X6 : entity is TRUE;
end NOR2X6;

architecture behavioral of NOR2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0224652 ns, 0.0115022 ns);
             tpd_B_Y : VitalDelayType01 := (0.0180476 ns, 0.00925516 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2X8 : entity is TRUE;
end NOR2X8;

architecture behavioral of NOR2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0220182 ns, 0.0109108 ns);
             tpd_B_Y : VitalDelayType01 := (0.0180291 ns, 0.00882161 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2XL : entity is TRUE;
end NOR2XL;

architecture behavioral of NOR2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.052239 ns, 0.0349089 ns);
             tpd_B_Y : VitalDelayType01 := (0.0340508 ns, 0.0125594 ns);
             tpd_C_Y : VitalDelayType01 := (0.0254148 ns, 0.0104304 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3BX1 : entity is TRUE;
end NOR3BX1;

architecture behavioral of NOR3BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0610318 ns, 0.047584 ns);
             tpd_B_Y : VitalDelayType01 := (0.0337514 ns, 0.0122621 ns);
             tpd_C_Y : VitalDelayType01 := (0.0238392 ns, 0.0100001 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3BX2 : entity is TRUE;
end NOR3BX2;

architecture behavioral of NOR3BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.063807 ns, 0.0501067 ns);
             tpd_B_Y : VitalDelayType01 := (0.0337629 ns, 0.0122644 ns);
             tpd_C_Y : VitalDelayType01 := (0.0238337 ns, 0.00995443 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3BX4 : entity is TRUE;
end NOR3BX4;

architecture behavioral of NOR3BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0474409 ns, 0.028178 ns);
             tpd_B_Y : VitalDelayType01 := (0.033741 ns, 0.0121641 ns);
             tpd_C_Y : VitalDelayType01 := (0.025082 ns, 0.0100245 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3BXL : entity is TRUE;
end NOR3BXL;

architecture behavioral of NOR3BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0379541 ns, 0.0129422 ns);
             tpd_B_Y : VitalDelayType01 := (0.0343975 ns, 0.0126357 ns);
             tpd_C_Y : VitalDelayType01 := (0.0253602 ns, 0.0104488 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3X1 : entity is TRUE;
end NOR3X1;

architecture behavioral of NOR3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0368185 ns, 0.0125491 ns);
             tpd_B_Y : VitalDelayType01 := (0.0336168 ns, 0.0122227 ns);
             tpd_C_Y : VitalDelayType01 := (0.0240119 ns, 0.0100037 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3X2 : entity is TRUE;
end NOR3X2;

architecture behavioral of NOR3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0372644 ns, 0.0126496 ns);
             tpd_B_Y : VitalDelayType01 := (0.033675 ns, 0.0122392 ns);
             tpd_C_Y : VitalDelayType01 := (0.0240502 ns, 0.00999392 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3X4 : entity is TRUE;
end NOR3X4;

architecture behavioral of NOR3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0374779 ns, 0.0127137 ns);
             tpd_B_Y : VitalDelayType01 := (0.0337177 ns, 0.0123444 ns);
             tpd_C_Y : VitalDelayType01 := (0.0241258 ns, 0.0100716 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3X6 : entity is TRUE;
end NOR3X6;

architecture behavioral of NOR3X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0378571 ns, 0.0128016 ns);
             tpd_B_Y : VitalDelayType01 := (0.0340252 ns, 0.0123969 ns);
             tpd_C_Y : VitalDelayType01 := (0.0241466 ns, 0.0101291 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3X8 : entity is TRUE;
end NOR3X8;

architecture behavioral of NOR3X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0374105 ns, 0.0125068 ns);
             tpd_B_Y : VitalDelayType01 := (0.0337882 ns, 0.0121643 ns);
             tpd_C_Y : VitalDelayType01 := (0.0250485 ns, 0.0100359 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3XL : entity is TRUE;
end NOR3XL;

architecture behavioral of NOR3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BBX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0717939 ns, 0.0354165 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0668866 ns, 0.0356916 ns);
             tpd_C_Y : VitalDelayType01 := (0.0450259 ns, 0.0132047 ns);
             tpd_D_Y : VitalDelayType01 := (0.0311272 ns, 0.0109476 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BBX1 : entity is TRUE;
end NOR4BBX1;

architecture behavioral of NOR4BBX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C_ipd);
          n4_var := VitalOR2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BBX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0839562 ns, 0.0485572 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0764275 ns, 0.0487837 ns);
             tpd_C_Y : VitalDelayType01 := (0.0451401 ns, 0.0131661 ns);
             tpd_D_Y : VitalDelayType01 := (0.0296092 ns, 0.0108064 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BBX2 : entity is TRUE;
end NOR4BBX2;

architecture behavioral of NOR4BBX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C_ipd);
          n4_var := VitalOR2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BBX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0866278 ns, 0.051415 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0788199 ns, 0.0513841 ns);
             tpd_C_Y : VitalDelayType01 := (0.0451444 ns, 0.0134166 ns);
             tpd_D_Y : VitalDelayType01 := (0.0300375 ns, 0.0111389 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BBX4 : entity is TRUE;
end NOR4BBX4;

architecture behavioral of NOR4BBX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C_ipd);
          n4_var := VitalOR2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BBXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0664754 ns, 0.0285264 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0624405 ns, 0.0288391 ns);
             tpd_C_Y : VitalDelayType01 := (0.0441316 ns, 0.0127673 ns);
             tpd_D_Y : VitalDelayType01 := (0.0306931 ns, 0.0105877 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BBXL : entity is TRUE;
end NOR4BBXL;

architecture behavioral of NOR4BBXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C_ipd);
          n4_var := VitalOR2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0712461 ns, 0.035594 ns);
             tpd_B_Y : VitalDelayType01 := (0.0531303 ns, 0.0137255 ns);
             tpd_C_Y : VitalDelayType01 := (0.0448738 ns, 0.0131556 ns);
             tpd_D_Y : VitalDelayType01 := (0.0311429 ns, 0.0110078 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BX1 : entity is TRUE;
end NOR4BX1;

architecture behavioral of NOR4BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          n3_var := VitalOR2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0823293 ns, 0.0488118 ns);
             tpd_B_Y : VitalDelayType01 := (0.0542039 ns, 0.01364 ns);
             tpd_C_Y : VitalDelayType01 := (0.0458836 ns, 0.0131771 ns);
             tpd_D_Y : VitalDelayType01 := (0.0297971 ns, 0.0107997 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BX2 : entity is TRUE;
end NOR4BX2;

architecture behavioral of NOR4BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          n3_var := VitalOR2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0842639 ns, 0.0512722 ns);
             tpd_B_Y : VitalDelayType01 := (0.0540342 ns, 0.0136685 ns);
             tpd_C_Y : VitalDelayType01 := (0.0456975 ns, 0.0131629 ns);
             tpd_D_Y : VitalDelayType01 := (0.0300986 ns, 0.0108552 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BX4 : entity is TRUE;
end NOR4BX4;

architecture behavioral of NOR4BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          n3_var := VitalOR2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0660339 ns, 0.0286014 ns);
             tpd_B_Y : VitalDelayType01 := (0.0524155 ns, 0.0132479 ns);
             tpd_C_Y : VitalDelayType01 := (0.0442297 ns, 0.0127616 ns);
             tpd_D_Y : VitalDelayType01 := (0.0306401 ns, 0.0106097 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BXL : entity is TRUE;
end NOR4BXL;

architecture behavioral of NOR4BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          n3_var := VitalOR2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.056618 ns, 0.0134727 ns);
             tpd_B_Y : VitalDelayType01 := (0.0535044 ns, 0.0137557 ns);
             tpd_C_Y : VitalDelayType01 := (0.0452252 ns, 0.0132165 ns);
             tpd_D_Y : VitalDelayType01 := (0.0311443 ns, 0.0110368 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4X1 : entity is TRUE;
end NOR4X1;

architecture behavioral of NOR4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0557218 ns, 0.0132707 ns);
             tpd_B_Y : VitalDelayType01 := (0.0527243 ns, 0.0135542 ns);
             tpd_C_Y : VitalDelayType01 := (0.0448199 ns, 0.0130705 ns);
             tpd_D_Y : VitalDelayType01 := (0.0301444 ns, 0.010899 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4X2 : entity is TRUE;
end NOR4X2;

architecture behavioral of NOR4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0579821 ns, 0.0133479 ns);
             tpd_B_Y : VitalDelayType01 := (0.0542097 ns, 0.0136579 ns);
             tpd_C_Y : VitalDelayType01 := (0.0458316 ns, 0.0132381 ns);
             tpd_D_Y : VitalDelayType01 := (0.0301758 ns, 0.0109263 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4X4 : entity is TRUE;
end NOR4X4;

architecture behavioral of NOR4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.057967 ns, 0.0135996 ns);
             tpd_B_Y : VitalDelayType01 := (0.0543036 ns, 0.013929 ns);
             tpd_C_Y : VitalDelayType01 := (0.0459328 ns, 0.0133707 ns);
             tpd_D_Y : VitalDelayType01 := (0.0307125 ns, 0.0111467 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4X6 : entity is TRUE;
end NOR4X6;

architecture behavioral of NOR4X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0578628 ns, 0.0135794 ns);
             tpd_B_Y : VitalDelayType01 := (0.054203 ns, 0.0138927 ns);
             tpd_C_Y : VitalDelayType01 := (0.0458151 ns, 0.0133673 ns);
             tpd_D_Y : VitalDelayType01 := (0.0305612 ns, 0.011107 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4X8 : entity is TRUE;
end NOR4X8;

architecture behavioral of NOR4X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0561404 ns, 0.0129989 ns);
             tpd_B_Y : VitalDelayType01 := (0.0529702 ns, 0.0132907 ns);
             tpd_C_Y : VitalDelayType01 := (0.0444779 ns, 0.0127868 ns);
             tpd_D_Y : VitalDelayType01 := (0.0306349 ns, 0.0106176 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4XL : entity is TRUE;
end NOR4XL;

architecture behavioral of NOR4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA21X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0446063 ns, 0.0559128 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0404445 ns, 0.0520299 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0368864 ns, 0.0320082 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA21X1 : entity is TRUE;
end OA21X1;

architecture behavioral of OA21X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          Y_zd := VitalAND2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA21X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0596074 ns, 0.0759162 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0553921 ns, 0.0721286 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0501721 ns, 0.0435123 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA21X2 : entity is TRUE;
end OA21X2;

architecture behavioral of OA21X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          Y_zd := VitalAND2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA21X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0639268 ns, 0.0795896 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0594271 ns, 0.0758223 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0539193 ns, 0.0458308 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA21X4 : entity is TRUE;
end OA21X4;

architecture behavioral of OA21X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          Y_zd := VitalAND2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA21XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0370506 ns, 0.0456152 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0328273 ns, 0.0415005 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0302428 ns, 0.0259657 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA21XL : entity is TRUE;
end OA21XL;

architecture behavioral of OA21XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          Y_zd := VitalAND2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA22X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0461484 ns, 0.060029 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0422396 ns, 0.0555719 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0417953 ns, 0.0516399 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0381039 ns, 0.047442 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA22X1 : entity is TRUE;
end OA22X1;

architecture behavioral of OA22X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          Y_zd := VitalAND2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA22X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0595656 ns, 0.0799836 ns);
             tpd_A1_Y : VitalDelayType01 := (0.055754 ns, 0.0758242 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0552789 ns, 0.0722676 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0514456 ns, 0.068109 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA22X2 : entity is TRUE;
end OA22X2;

architecture behavioral of OA22X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          Y_zd := VitalAND2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA22X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0634029 ns, 0.0838431 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0595175 ns, 0.0797375 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0591191 ns, 0.0763956 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0552962 ns, 0.0724505 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA22X4 : entity is TRUE;
end OA22X4;

architecture behavioral of OA22X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          Y_zd := VitalAND2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA22XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0389888 ns, 0.0492622 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0354022 ns, 0.0453647 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0347105 ns, 0.0409942 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0312245 ns, 0.0370627 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA22XL : entity is TRUE;
end OA22XL;

architecture behavioral of OA22XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          Y_zd := VitalAND2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI211X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0354048 ns, 0.0308811 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0315843 ns, 0.0256318 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0179528 ns, 0.0240662 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0157141 ns, 0.021277 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI211X1 : entity is TRUE;
end OAI211X1;

architecture behavioral of OAI211X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          n2_var := VitalAND2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI211X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0348969 ns, 0.0304826 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0310342 ns, 0.025467 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0178634 ns, 0.0240787 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0154161 ns, 0.020581 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI211X2 : entity is TRUE;
end OAI211X2;

architecture behavioral of OAI211X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          n2_var := VitalAND2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI211X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0352485 ns, 0.0308712 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0309095 ns, 0.0254446 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0178212 ns, 0.0241895 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0153758 ns, 0.0208846 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI211X4 : entity is TRUE;
end OAI211X4;

architecture behavioral of OAI211X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          n2_var := VitalAND2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI211XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0353118 ns, 0.0299157 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0314469 ns, 0.024886 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0177539 ns, 0.0232057 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0155123 ns, 0.0205584 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI211XL : entity is TRUE;
end OAI211XL;

architecture behavioral of OAI211XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          n2_var := VitalAND2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI21X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0294197 ns, 0.0197907 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0254351 ns, 0.0164239 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0140111 ns, 0.0143665 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI21X1 : entity is TRUE;
end OAI21X1;

architecture behavioral of OAI21X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI21X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0290524 ns, 0.0195188 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0250395 ns, 0.0162939 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0138068 ns, 0.0141782 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI21X2 : entity is TRUE;
end OAI21X2;

architecture behavioral of OAI21X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI21X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.029235 ns, 0.0196493 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0249647 ns, 0.0162597 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0138608 ns, 0.0143385 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI21X4 : entity is TRUE;
end OAI21X4;

architecture behavioral of OAI21X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI21XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0292382 ns, 0.0191561 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0252529 ns, 0.0158678 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0137969 ns, 0.0137848 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI21XL : entity is TRUE;
end OAI21XL;

architecture behavioral of OAI21XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI221X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0399989 ns, 0.0355825 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0361632 ns, 0.0309113 ns);
             tpd_B0_Y : VitalDelayType01 := (0.034698 ns, 0.0318251 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0308132 ns, 0.027332 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0166908 ns, 0.0237515 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI221X1 : entity is TRUE;
end OAI221X1;

architecture behavioral of OAI221X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI221X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0379679 ns, 0.0338719 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0341601 ns, 0.02926 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0326355 ns, 0.0301376 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0287436 ns, 0.025598 ns);
             tpd_C0_Y : VitalDelayType01 := (0.015602 ns, 0.0222778 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI221X2 : entity is TRUE;
end OAI221X2;

architecture behavioral of OAI221X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI221X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0380124 ns, 0.0339896 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0341148 ns, 0.0292289 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0326255 ns, 0.0302125 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0286924 ns, 0.0255638 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0156728 ns, 0.0224525 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI221X4 : entity is TRUE;
end OAI221X4;

architecture behavioral of OAI221X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI221XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0392127 ns, 0.0337833 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0353597 ns, 0.029209 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0337128 ns, 0.0300929 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0298323 ns, 0.025674 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0160426 ns, 0.0222466 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI221XL : entity is TRUE;
end OAI221XL;

architecture behavioral of OAI221XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI222X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.044321 ns, 0.03905 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0404744 ns, 0.0348555 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0390212 ns, 0.0357926 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0345842 ns, 0.0314041 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0302656 ns, 0.0291847 ns);
             tpd_C1_Y : VitalDelayType01 := (0.026394 ns, 0.0253379 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI222X1 : entity is TRUE;
end OAI222X1;

architecture behavioral of OAI222X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(C0_ipd, C1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalOR2(B0_ipd, B1_ipd);
          n4_var := VitalAND2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI222X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.042694 ns, 0.0377769 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0385933 ns, 0.0334962 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0369898 ns, 0.0344323 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0326374 ns, 0.0299925 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0286585 ns, 0.0281196 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0247756 ns, 0.0242937 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI222X2 : entity is TRUE;
end OAI222X2;

architecture behavioral of OAI222X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(C0_ipd, C1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalOR2(B0_ipd, B1_ipd);
          n4_var := VitalAND2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI222X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0425222 ns, 0.037794 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0385947 ns, 0.0335033 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0370349 ns, 0.0344393 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0325585 ns, 0.0299353 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0287991 ns, 0.0283093 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0248328 ns, 0.0243136 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI222X4 : entity is TRUE;
end OAI222X4;

architecture behavioral of OAI222X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(C0_ipd, C1_ipd);
          n1_var := VitalOR2(A0_ipd, A1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalOR2(B0_ipd, B1_ipd);
          n4_var := VitalAND2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI222XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0444508 ns, 0.0380083 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0405965 ns, 0.0339181 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0389561 ns, 0.0347603 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0345175 ns, 0.0303654 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0299496 ns, 0.0281862 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0260303 ns, 0.0243591 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI222XL : entity is TRUE;
end OAI222XL;

architecture behavioral of OAI222XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(C0_ipd, C1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalOR2(B0_ipd, B1_ipd);
          n4_var := VitalAND2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI22X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0336785 ns, 0.022395 ns);
             tpd_A1_Y : VitalDelayType01 := (0.029406 ns, 0.0192737 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0253927 ns, 0.0185398 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0211717 ns, 0.0155313 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI22X1 : entity is TRUE;
end OAI22X1;

architecture behavioral of OAI22X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI22X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0332502 ns, 0.0220687 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0292175 ns, 0.0191873 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0253175 ns, 0.0183985 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0212542 ns, 0.0156489 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI22X2 : entity is TRUE;
end OAI22X2;

architecture behavioral of OAI22X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI22X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0332057 ns, 0.0219882 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0290639 ns, 0.0190712 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0253392 ns, 0.0184503 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0213008 ns, 0.0156686 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI22X4 : entity is TRUE;
end OAI22X4;

architecture behavioral of OAI22X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI22XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0338283 ns, 0.0217889 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0295206 ns, 0.0187312 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0250303 ns, 0.0178611 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0210936 ns, 0.0150088 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI22XL : entity is TRUE;
end OAI22XL;

architecture behavioral of OAI22XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB1X1 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0399424 ns, 0.0383268 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0386155 ns, 0.035858 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0155325 ns, 0.0152123 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB1X1 : entity is TRUE;
end OAI2BB1X1;

architecture behavioral of OAI2BB1X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB1X2 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0554066 ns, 0.0501362 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0540129 ns, 0.0478736 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0149234 ns, 0.0151303 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB1X2 : entity is TRUE;
end OAI2BB1X2;

architecture behavioral of OAI2BB1X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB1X4 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0595555 ns, 0.0526743 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0580915 ns, 0.0504118 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0150981 ns, 0.0154258 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB1X4 : entity is TRUE;
end OAI2BB1X4;

architecture behavioral of OAI2BB1X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB1XL is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0324186 ns, 0.0320472 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0311532 ns, 0.0296884 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0153639 ns, 0.0143949 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB1XL : entity is TRUE;
end OAI2BB1XL;

architecture behavioral of OAI2BB1XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB2X1 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0495153 ns, 0.0441423 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0436332 ns, 0.0409298 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0249349 ns, 0.0182112 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0208631 ns, 0.0151595 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB2X1 : entity is TRUE;
end OAI2BB2X1;

architecture behavioral of OAI2BB2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB2X2 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0604372 ns, 0.0570011 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0527052 ns, 0.0536553 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0248154 ns, 0.0180273 ns);
             tpd_B1_Y : VitalDelayType01 := (0.020782 ns, 0.01513 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB2X2 : entity is TRUE;
end OAI2BB2X2;

architecture behavioral of OAI2BB2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB2X4 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0636527 ns, 0.059862 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0550536 ns, 0.0562027 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0248594 ns, 0.0181969 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0207956 ns, 0.0152904 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB2X4 : entity is TRUE;
end OAI2BB2X4;

architecture behavioral of OAI2BB2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB2XL is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0442083 ns, 0.037386 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0393834 ns, 0.034395 ns);
             tpd_B0_Y : VitalDelayType01 := (0.024585 ns, 0.017564 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0206805 ns, 0.0146521 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB2XL : entity is TRUE;
end OAI2BB2XL;

architecture behavioral of OAI2BB2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI31X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0469097 ns, 0.0222291 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0437069 ns, 0.0209695 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0345893 ns, 0.0171379 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0139899 ns, 0.0150219 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI31X1 : entity is TRUE;
end OAI31X1;

architecture behavioral of OAI31X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI31X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0473623 ns, 0.0221171 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0440452 ns, 0.0209839 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0343343 ns, 0.0171172 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0138354 ns, 0.0147876 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI31X2 : entity is TRUE;
end OAI31X2;

architecture behavioral of OAI31X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI31X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0475502 ns, 0.0223338 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0438586 ns, 0.0209625 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0341459 ns, 0.0170241 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0138309 ns, 0.0149731 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI31X4 : entity is TRUE;
end OAI31X4;

architecture behavioral of OAI31X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI31XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0466538 ns, 0.021446 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0434329 ns, 0.0203063 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0343166 ns, 0.0165542 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0137771 ns, 0.0144048 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI31XL : entity is TRUE;
end OAI31XL;

architecture behavioral of OAI31XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI32X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0535898 ns, 0.024839 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0501693 ns, 0.0235547 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0408973 ns, 0.0200974 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0255264 ns, 0.0194551 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0215211 ns, 0.0164375 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI32X1 : entity is TRUE;
end OAI32X1;

architecture behavioral of OAI32X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI32X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0533137 ns, 0.0244496 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0498973 ns, 0.0232862 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0403476 ns, 0.0198422 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0252059 ns, 0.0190985 ns);
             tpd_B1_Y : VitalDelayType01 := (0.021206 ns, 0.0162877 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI32X2 : entity is TRUE;
end OAI32X2;

architecture behavioral of OAI32X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI32X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0536666 ns, 0.0246517 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0498246 ns, 0.0233155 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0401787 ns, 0.0197876 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0253205 ns, 0.0194077 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0212765 ns, 0.0163791 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI32X4 : entity is TRUE;
end OAI32X4;

architecture behavioral of OAI32X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI32XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0542255 ns, 0.024302 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0503808 ns, 0.0230379 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0406322 ns, 0.0195669 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0254361 ns, 0.0189579 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0211995 ns, 0.0158471 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI32XL : entity is TRUE;
end OAI32XL;

architecture behavioral of OAI32XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI33X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0590275 ns, 0.0272881 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0558145 ns, 0.0259038 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0463883 ns, 0.0223134 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0419994 ns, 0.022149 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0387793 ns, 0.0208272 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0296095 ns, 0.0174972 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI33X1 : entity is TRUE;
end OAI33X1;

architecture behavioral of OAI33X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n2_var, B2_ipd);
          n4_var := VitalAND2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI33X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0602306 ns, 0.0274186 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0564004 ns, 0.025873 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0465832 ns, 0.0222471 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0421268 ns, 0.0221882 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0386345 ns, 0.0207388 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0298696 ns, 0.0175211 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI33X2 : entity is TRUE;
end OAI33X2;

architecture behavioral of OAI33X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n2_var, B2_ipd);
          n4_var := VitalAND2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI33X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0605961 ns, 0.0280594 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0565934 ns, 0.0264009 ns);
             tpd_A2_Y : VitalDelayType01 := (0.047009 ns, 0.0227392 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0432939 ns, 0.0227946 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0393986 ns, 0.0212163 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0296394 ns, 0.0177003 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI33X4 : entity is TRUE;
end OAI33X4;

architecture behavioral of OAI33X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n2_var, B2_ipd);
          n4_var := VitalAND2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI33XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0591503 ns, 0.0266458 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0559398 ns, 0.0253076 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0462759 ns, 0.0217377 ns);
             tpd_B0_Y : VitalDelayType01 := (0.042035 ns, 0.0215137 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0387355 ns, 0.0202588 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0291403 ns, 0.0168591 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI33XL : entity is TRUE;
end OAI33XL;

architecture behavioral of OAI33XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n2_var, B2_ipd);
          n4_var := VitalAND2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0292741 ns, 0.04791 ns);
             tpd_B_Y : VitalDelayType01 := (0.0270786 ns, 0.0439077 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2X1 : entity is TRUE;
end OR2X1;

architecture behavioral of OR2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0380359 ns, 0.0684593 ns);
             tpd_B_Y : VitalDelayType01 := (0.0357337 ns, 0.0645197 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2X2 : entity is TRUE;
end OR2X2;

architecture behavioral of OR2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0405344 ns, 0.0728019 ns);
             tpd_B_Y : VitalDelayType01 := (0.0382714 ns, 0.0688736 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2X4 : entity is TRUE;
end OR2X4;

architecture behavioral of OR2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.035356 ns, 0.0611867 ns);
             tpd_B_Y : VitalDelayType01 := (0.0333486 ns, 0.0571581 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2X6 : entity is TRUE;
end OR2X6;

architecture behavioral of OR2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0404739 ns, 0.0726358 ns);
             tpd_B_Y : VitalDelayType01 := (0.0384641 ns, 0.0687332 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2X8 : entity is TRUE;
end OR2X8;

architecture behavioral of OR2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0245496 ns, 0.03763 ns);
             tpd_B_Y : VitalDelayType01 := (0.0224637 ns, 0.0336438 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2XL : entity is TRUE;
end OR2XL;

architecture behavioral of OR2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0317499 ns, 0.0715565 ns);
             tpd_B_Y : VitalDelayType01 := (0.0306402 ns, 0.068006 ns);
             tpd_C_Y : VitalDelayType01 := (0.0281892 ns, 0.0587292 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3X1 : entity is TRUE;
end OR3X1;

architecture behavioral of OR3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0408121 ns, 0.100802 ns);
             tpd_B_Y : VitalDelayType01 := (0.0393844 ns, 0.0975107 ns);
             tpd_C_Y : VitalDelayType01 := (0.0368185 ns, 0.0883464 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3X2 : entity is TRUE;
end OR3X2;

architecture behavioral of OR3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0433932 ns, 0.106789 ns);
             tpd_B_Y : VitalDelayType01 := (0.0418214 ns, 0.103298 ns);
             tpd_C_Y : VitalDelayType01 := (0.0392493 ns, 0.0944337 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3X4 : entity is TRUE;
end OR3X4;

architecture behavioral of OR3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0378177 ns, 0.0899681 ns);
             tpd_B_Y : VitalDelayType01 := (0.0364118 ns, 0.0864649 ns);
             tpd_C_Y : VitalDelayType01 := (0.0338734 ns, 0.0769921 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3X6 : entity is TRUE;
end OR3X6;

architecture behavioral of OR3X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0431016 ns, 0.106459 ns);
             tpd_B_Y : VitalDelayType01 := (0.041509 ns, 0.102991 ns);
             tpd_C_Y : VitalDelayType01 := (0.038942 ns, 0.093584 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3X8 : entity is TRUE;
end OR3X8;

architecture behavioral of OR3X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.026878 ns, 0.056866 ns);
             tpd_B_Y : VitalDelayType01 := (0.0259913 ns, 0.0535292 ns);
             tpd_C_Y : VitalDelayType01 := (0.023596 ns, 0.0442013 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3XL : entity is TRUE;
end OR3XL;

architecture behavioral of OR3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0328208 ns, 0.0976237 ns);
             tpd_B_Y : VitalDelayType01 := (0.0324489 ns, 0.0938923 ns);
             tpd_C_Y : VitalDelayType01 := (0.0310647 ns, 0.0857685 ns);
             tpd_D_Y : VitalDelayType01 := (0.0287397 ns, 0.0721898 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4X1 : entity is TRUE;
end OR4X1;

architecture behavioral of OR4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0424076 ns, 0.137274 ns);
             tpd_B_Y : VitalDelayType01 := (0.0416738 ns, 0.133768 ns);
             tpd_C_Y : VitalDelayType01 := (0.0398086 ns, 0.124612 ns);
             tpd_D_Y : VitalDelayType01 := (0.0372995 ns, 0.110347 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4X2 : entity is TRUE;
end OR4X2;

architecture behavioral of OR4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0449993 ns, 0.143993 ns);
             tpd_B_Y : VitalDelayType01 := (0.0443457 ns, 0.140782 ns);
             tpd_C_Y : VitalDelayType01 := (0.042477 ns, 0.132371 ns);
             tpd_D_Y : VitalDelayType01 := (0.0397583 ns, 0.118406 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4X4 : entity is TRUE;
end OR4X4;

architecture behavioral of OR4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0395237 ns, 0.12245 ns);
             tpd_B_Y : VitalDelayType01 := (0.0390146 ns, 0.119308 ns);
             tpd_C_Y : VitalDelayType01 := (0.0373734 ns, 0.111142 ns);
             tpd_D_Y : VitalDelayType01 := (0.0348269 ns, 0.0965232 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4X6 : entity is TRUE;
end OR4X6;

architecture behavioral of OR4X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0449962 ns, 0.144053 ns);
             tpd_B_Y : VitalDelayType01 := (0.0443372 ns, 0.140935 ns);
             tpd_C_Y : VitalDelayType01 := (0.0425147 ns, 0.132629 ns);
             tpd_D_Y : VitalDelayType01 := (0.0399497 ns, 0.118084 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4X8 : entity is TRUE;
end OR4X8;

architecture behavioral of OR4X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0278747 ns, 0.0794024 ns);
             tpd_B_Y : VitalDelayType01 := (0.0277933 ns, 0.0762684 ns);
             tpd_C_Y : VitalDelayType01 := (0.0265789 ns, 0.0674853 ns);
             tpd_D_Y : VitalDelayType01 := (0.0241209 ns, 0.0528915 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4XL : entity is TRUE;
end OR4XL;

architecture behavioral of OR4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.080135 ns;
             tpw_CK_negedge : VitalDelayType := 0.0808533 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0887055 ns, 0.105421 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFHQX1 : entity is TRUE;
end SDFFHQX1;

architecture behavioral of SDFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0002 := VitalINV(N30);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0841769 ns;
             tpw_CK_negedge : VitalDelayType := 0.0808993 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0956888 ns, 0.113769 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFHQX2 : entity is TRUE;
end SDFFHQX2;

architecture behavioral of SDFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0002 := VitalINV(N30);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0915236 ns;
             tpw_CK_negedge : VitalDelayType := 0.0808553 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.106012 ns, 0.119027 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFHQX4 : entity is TRUE;
end SDFFHQX4;

architecture behavioral of SDFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.106611 ns;
             tpw_CK_negedge : VitalDelayType := 0.0807687 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.127071 ns, 0.134439 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFHQX8 : entity is TRUE;
end SDFFHQX8;

architecture behavioral of SDFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFNSRX1 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CKN : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := 0 ns;
             tpw_CKN_posedge : VitalDelayType := 0.0667452 ns;
             tpw_CKN_negedge : VitalDelayType := 0.0861821 ns;
             tpw_RN_negedge : VitalDelayType := 0.0984279 ns;
             tpw_SN_negedge : VitalDelayType := 0.0713768 ns;
             tsetup_SI_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_SI_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SI_CKN_posedge_negedge : VitalDelayType := 0 ns;
             thold_SI_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tsetup_SE_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_SE_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SE_CKN_posedge_negedge : VitalDelayType := 0.0468749 ns;
             thold_SE_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.104347 ns, 0.0963315 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.121063 ns, 0.127003 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.122153 ns);
             tpd_RN_QN : VitalDelayType01 := (0.146921 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0933884 ns, 0.103438 ns);
             tpd_SN_QN : VitalDelayType01 := (0.128222 ns, 0.115843 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFNSRX1 : entity is TRUE;
end SDFFNSRX1;

architecture behavioral of SDFFNSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CKN );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SI_CKN_posedge_negedge,
                    SetupLow       => tsetup_SI_CKN_negedge_negedge,
                    HoldHigh       => thold_SI_CKN_posedge_negedge,
                    HoldLow        => thold_SI_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_SI_CKN,
                    Violation      => Tviol_SI_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SE_CKN_posedge_negedge,
                    SetupLow       => tsetup_SE_CKN_negedge_negedge,
                    HoldHigh       => thold_SE_CKN_posedge_negedge,
                    HoldLow        => thold_SE_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_SE_CKN,
                    Violation      => Tviol_SE_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_SI_CKN OR
                        Tviol_SE_CKN OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFNSRX2 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CKN : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := 0 ns;
             tpw_CKN_posedge : VitalDelayType := 0.0668018 ns;
             tpw_CKN_negedge : VitalDelayType := 0.0994694 ns;
             tpw_RN_negedge : VitalDelayType := 0.109541 ns;
             tpw_SN_negedge : VitalDelayType := 0.0828468 ns;
             tsetup_SI_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_SI_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SI_CKN_posedge_negedge : VitalDelayType := 0 ns;
             thold_SI_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tsetup_SE_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_SE_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SE_CKN_posedge_negedge : VitalDelayType := 0.0468749 ns;
             thold_SE_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.111814 ns, 0.103453 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.141673 ns, 0.149812 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.129203 ns);
             tpd_RN_QN : VitalDelayType01 := (0.167612 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.10098 ns, 0.110572 ns);
             tpd_SN_QN : VitalDelayType01 := (0.148957 ns, 0.138481 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFNSRX2 : entity is TRUE;
end SDFFNSRX2;

architecture behavioral of SDFFNSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CKN );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SI_CKN_posedge_negedge,
                    SetupLow       => tsetup_SI_CKN_negedge_negedge,
                    HoldHigh       => thold_SI_CKN_posedge_negedge,
                    HoldLow        => thold_SI_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_SI_CKN,
                    Violation      => Tviol_SI_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SE_CKN_posedge_negedge,
                    SetupLow       => tsetup_SE_CKN_negedge_negedge,
                    HoldHigh       => thold_SE_CKN_posedge_negedge,
                    HoldLow        => thold_SE_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_SE_CKN,
                    Violation      => Tviol_SE_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_SI_CKN OR
                        Tviol_SE_CKN OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0000 := VitalINV(P0002);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFNSRX4 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CKN : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := 0 ns;
             tpw_CKN_posedge : VitalDelayType := 0.0665139 ns;
             tpw_CKN_negedge : VitalDelayType := 0.113515 ns;
             tpw_RN_negedge : VitalDelayType := 0.117731 ns;
             tpw_SN_negedge : VitalDelayType := 0.093335 ns;
             tsetup_SI_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_SI_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SI_CKN_posedge_negedge : VitalDelayType := 0 ns;
             thold_SI_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tsetup_SE_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_SE_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SE_CKN_posedge_negedge : VitalDelayType := 0.0468749 ns;
             thold_SE_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.12726 ns, 0.118322 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.159784 ns, 0.168346 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.144806 ns);
             tpd_RN_QN : VitalDelayType01 := (0.186399 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.116856 ns, 0.126751 ns);
             tpd_SN_QN : VitalDelayType01 := (0.168326 ns, 0.156968 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFNSRX4 : entity is TRUE;
end SDFFNSRX4;

architecture behavioral of SDFFNSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CKN );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SI_CKN_posedge_negedge,
                    SetupLow       => tsetup_SI_CKN_negedge_negedge,
                    HoldHigh       => thold_SI_CKN_posedge_negedge,
                    HoldLow        => thold_SI_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_SI_CKN,
                    Violation      => Tviol_SI_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SE_CKN_posedge_negedge,
                    SetupLow       => tsetup_SE_CKN_negedge_negedge,
                    HoldHigh       => thold_SE_CKN_posedge_negedge,
                    HoldLow        => thold_SE_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_SE_CKN,
                    Violation      => Tviol_SE_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_SI_CKN OR
                        Tviol_SE_CKN OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0000 := VitalINV(P0002);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFNSRXL is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CKN : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := 0 ns;
             tpw_CKN_posedge : VitalDelayType := 0.0666336 ns;
             tpw_CKN_negedge : VitalDelayType := 0.0794423 ns;
             tpw_RN_negedge : VitalDelayType := 0.091179 ns;
             tpw_SN_negedge : VitalDelayType := 0.0645911 ns;
             tsetup_SI_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_SI_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SI_CKN_posedge_negedge : VitalDelayType := 0 ns;
             thold_SI_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tsetup_SE_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_SE_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SE_CKN_posedge_negedge : VitalDelayType := 0.0468749 ns;
             thold_SE_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.0989575 ns, 0.0900159 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.107282 ns, 0.113184 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.115373 ns);
             tpd_RN_QN : VitalDelayType01 := (0.132693 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0880546 ns, 0.0967637 ns);
             tpd_SN_QN : VitalDelayType01 := (0.114086 ns, 0.102216 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFNSRXL : entity is TRUE;
end SDFFNSRXL;

architecture behavioral of SDFFNSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CKN );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SI_CKN_posedge_negedge,
                    SetupLow       => tsetup_SI_CKN_negedge_negedge,
                    HoldHigh       => thold_SI_CKN_posedge_negedge,
                    HoldLow        => thold_SI_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_SI_CKN,
                    Violation      => Tviol_SI_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SE_CKN_posedge_negedge,
                    SetupLow       => tsetup_SE_CKN_negedge_negedge,
                    HoldHigh       => thold_SE_CKN_posedge_negedge,
                    HoldLow        => thold_SE_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_SE_CKN,
                    Violation      => Tviol_SE_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_SI_CKN OR
                        Tviol_SE_CKN OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0740262 ns;
             tpw_CK_negedge : VitalDelayType := 0.0741207 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0860483 ns, 0.0990464 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFQX1 : entity is TRUE;
end SDFFQX1;

architecture behavioral of SDFFQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0790205 ns;
             tpw_CK_negedge : VitalDelayType := 0.074399 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0945996 ns, 0.105089 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFQX2 : entity is TRUE;
end SDFFQX2;

architecture behavioral of SDFFQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0892668 ns;
             tpw_CK_negedge : VitalDelayType := 0.0742985 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.108321 ns, 0.114112 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFQX4 : entity is TRUE;
end SDFFQX4;

architecture behavioral of SDFFQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFQXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0706737 ns;
             tpw_CK_negedge : VitalDelayType := 0.0742208 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.080471 ns, 0.0924073 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFQXL : entity is TRUE;
end SDFFQXL;

architecture behavioral of SDFFQXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFQXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0814899 ns;
             tpw_CK_negedge : VitalDelayType := 0.0795704 ns;
             tpw_RN_negedge : VitalDelayType := 0.0516294 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.102978 ns, 0.107409 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0356611 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRHQX1 : entity is TRUE;
end SDFFRHQX1;

architecture behavioral of SDFFRHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0857658 ns;
             tpw_CK_negedge : VitalDelayType := 0.0795366 ns;
             tpw_RN_negedge : VitalDelayType := 0.0556315 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.114258 ns, 0.115947 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.043363 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRHQX2 : entity is TRUE;
end SDFFRHQX2;

architecture behavioral of SDFFRHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0923334 ns;
             tpw_CK_negedge : VitalDelayType := 0.0807832 ns;
             tpw_RN_negedge : VitalDelayType := 0.0582489 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.0947558 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.121167 ns, 0.120493 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0398858 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRHQX4 : entity is TRUE;
end SDFFRHQX4;

architecture behavioral of SDFFRHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0003 := VitalINV(P0002);

          Q_zd := VitalINV(P0003);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.11047 ns;
             tpw_CK_negedge : VitalDelayType := 0.0800553 ns;
             tpw_RN_negedge : VitalDelayType := 0.0636882 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.142893 ns, 0.136307 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0402582 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRHQX8 : entity is TRUE;
end SDFFRHQX8;

architecture behavioral of SDFFRHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0930882 ns;
             tpw_CK_negedge : VitalDelayType := 0.0740788 ns;
             tpw_RN_negedge : VitalDelayType := 0.0560952 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.111092 ns, 0.108031 ns);
             tpd_CK_QN : VitalDelayType01 := (0.13217 ns, 0.136017 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0453745 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0701619 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRX1 : entity is TRUE;
end SDFFRX1;

architecture behavioral of SDFFRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.106305 ns;
             tpw_CK_negedge : VitalDelayType := 0.0736885 ns;
             tpw_RN_negedge : VitalDelayType := 0.0592289 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.117379 ns, 0.111126 ns);
             tpd_CK_QN : VitalDelayType01 := (0.148617 ns, 0.159329 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0450425 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0832709 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRX2 : entity is TRUE;
end SDFFRX2;

architecture behavioral of SDFFRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE QBINT : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          QBINT := VitalINV(N30);

          Q_zd := VitalINV(QBINT);

          QN_zd := VitalBUF(QBINT);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.118452 ns;
             tpw_CK_negedge : VitalDelayType := 0.0739311 ns;
             tpw_RN_negedge : VitalDelayType := 0.061204 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.0947499 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.129353 ns, 0.120361 ns);
             tpd_CK_QN : VitalDelayType01 := (0.161705 ns, 0.173441 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0423763 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0838686 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRX4 : entity is TRUE;
end SDFFRX4;

architecture behavioral of SDFFRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0840213 ns;
             tpw_CK_negedge : VitalDelayType := 0.0737271 ns;
             tpw_RN_negedge : VitalDelayType := 0.0534661 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.103146 ns, 0.101389 ns);
             tpd_CK_QN : VitalDelayType01 := (0.118226 ns, 0.118292 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.039351 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0564726 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRXL : entity is TRUE;
end SDFFRXL;

architecture behavioral of SDFFRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0944119 ns;
             tpw_CK_negedge : VitalDelayType := 0.0793863 ns;
             tpw_RN_negedge : VitalDelayType := 0.0983408 ns;
             tpw_SN_negedge : VitalDelayType := 0.0713549 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0977341 ns, 0.112302 ns);
             tpd_CK_QN : VitalDelayType01 := (0.137026 ns, 0.120243 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.122183 ns);
             tpd_RN_QN : VitalDelayType01 := (0.146898 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0934154 ns, 0.103436 ns);
             tpd_SN_QN : VitalDelayType01 := (0.128151 ns, 0.115883 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRX1 : entity is TRUE;
end SDFFSRX1;

architecture behavioral of SDFFSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0834175 ns;
             tpw_CK_negedge : VitalDelayType := 0.0844571 ns;
             tpw_SN_negedge : VitalDelayType := 0.0496721 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00101386 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0887422 ns, 0.111683 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0774705 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSHQX1 : entity is TRUE;
end SDFFSHQX1;

architecture behavioral of SDFFSHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE N35 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N35 := n0_vec(1);

          P0001 := VitalINV(N35);

          Q_zd := VitalINV(P0001);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0879306 ns;
             tpw_CK_negedge : VitalDelayType := 0.0845109 ns;
             tpw_SN_negedge : VitalDelayType := 0.0534733 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0959064 ns, 0.120872 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0851092 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSHQX2 : entity is TRUE;
end SDFFSHQX2;

architecture behavioral of SDFFSHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0964462 ns;
             tpw_CK_negedge : VitalDelayType := 0.084713 ns;
             tpw_SN_negedge : VitalDelayType := 0.0591193 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.106357 ns, 0.128472 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0946638 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSHQX4 : entity is TRUE;
end SDFFSHQX4;

architecture behavioral of SDFFSHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.113938 ns;
             tpw_CK_negedge : VitalDelayType := 0.0846079 ns;
             tpw_SN_negedge : VitalDelayType := 0.0718825 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.126816 ns, 0.148865 ns);
             tpd_SN_Q : VitalDelayType01 := (0.116688 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSHQX8 : entity is TRUE;
end SDFFSHQX8;

architecture behavioral of SDFFSHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0846334 ns;
             tpw_CK_negedge : VitalDelayType := 0.0853831 ns;
             tpw_RN_negedge : VitalDelayType := 0.0878526 ns;
             tpw_SN_negedge : VitalDelayType := 0.0551644 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0940194 ns, 0.111017 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.118112 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0836285 ns, 0.0934457 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRHQX1 : entity is TRUE;
end SDFFSRHQX1;

architecture behavioral of SDFFSRHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0893833 ns;
             tpw_CK_negedge : VitalDelayType := 0.0853188 ns;
             tpw_RN_negedge : VitalDelayType := 0.093076 ns;
             tpw_SN_negedge : VitalDelayType := 0.0592329 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100986 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.102506 ns, 0.120508 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.128333 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0920863 ns, 0.103498 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRHQX2 : entity is TRUE;
end SDFFSRHQX2;

architecture behavioral of SDFFSRHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0985549 ns;
             tpw_CK_negedge : VitalDelayType := 0.0851402 ns;
             tpw_RN_negedge : VitalDelayType := 0.0982729 ns;
             tpw_SN_negedge : VitalDelayType := 0.0653858 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.115321 ns, 0.127983 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.138919 ns);
             tpd_SN_Q : VitalDelayType01 := (0.102512 ns, 0.114423 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRHQX4 : entity is TRUE;
end SDFFSRHQX4;

architecture behavioral of SDFFSRHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.117997 ns;
             tpw_CK_negedge : VitalDelayType := 0.085409 ns;
             tpw_RN_negedge : VitalDelayType := 0.109796 ns;
             tpw_SN_negedge : VitalDelayType := 0.0778659 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100808 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.142015 ns, 0.14866 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.163786 ns);
             tpd_SN_Q : VitalDelayType01 := (0.125327 ns, 0.139039 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRHQX8 : entity is TRUE;
end SDFFSRHQX8;

architecture behavioral of SDFFSRHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0003 := VitalINV(P0002);

          Q_zd := VitalINV(P0003);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.106032 ns;
             tpw_CK_negedge : VitalDelayType := 0.0795332 ns;
             tpw_RN_negedge : VitalDelayType := 0.108639 ns;
             tpw_SN_negedge : VitalDelayType := 0.0825568 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.106722 ns, 0.117367 ns);
             tpd_CK_QN : VitalDelayType01 := (0.15551 ns, 0.144572 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.128528 ns);
             tpd_RN_QN : VitalDelayType01 := (0.166821 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.100569 ns, 0.109851 ns);
             tpd_SN_QN : VitalDelayType01 := (0.148196 ns, 0.138132 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRX2 : entity is TRUE;
end SDFFSRX2;

architecture behavioral of SDFFSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE QBINT : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          QBINT := VitalINV(P0000);

          Q_zd := VitalINV(QBINT);

          QN_zd := VitalBUF(QBINT);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.121208 ns;
             tpw_CK_negedge : VitalDelayType := 0.0796753 ns;
             tpw_RN_negedge : VitalDelayType := 0.117541 ns;
             tpw_SN_negedge : VitalDelayType := 0.0932882 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.124794 ns, 0.13075 ns);
             tpd_CK_QN : VitalDelayType01 := (0.172207 ns, 0.165761 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.144929 ns);
             tpd_RN_QN : VitalDelayType01 := (0.18653 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.116926 ns, 0.126752 ns);
             tpd_SN_QN : VitalDelayType01 := (0.168392 ns, 0.157089 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRX4 : entity is TRUE;
end SDFFSRX4;

architecture behavioral of SDFFSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0000 := VitalINV(P0002);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.087357 ns;
             tpw_CK_negedge : VitalDelayType := 0.0794292 ns;
             tpw_RN_negedge : VitalDelayType := 0.0910053 ns;
             tpw_SN_negedge : VitalDelayType := 0.0644732 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0921172 ns, 0.105597 ns);
             tpd_CK_QN : VitalDelayType01 := (0.12283 ns, 0.10619 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.115064 ns);
             tpd_RN_QN : VitalDelayType01 := (0.132334 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0877849 ns, 0.0963179 ns);
             tpd_SN_QN : VitalDelayType01 := (0.11359 ns, 0.101898 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRXL : entity is TRUE;
end SDFFSRXL;

architecture behavioral of SDFFSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0935288 ns;
             tpw_CK_negedge : VitalDelayType := 0.0789258 ns;
             tpw_SN_negedge : VitalDelayType := 0.0654064 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0922798 ns, 0.113038 ns);
             tpd_CK_QN : VitalDelayType01 := (0.137572 ns, 0.114234 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0869806 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.108865 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSX1 : entity is TRUE;
end SDFFSX1;

architecture behavioral of SDFFSX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE N35 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N35 := n0_vec(1);

          P0002 := VitalINV(N35);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.104838 ns;
             tpw_CK_negedge : VitalDelayType := 0.078939 ns;
             tpw_SN_negedge : VitalDelayType := 0.0765067 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0990892 ns, 0.118084 ns);
             tpd_CK_QN : VitalDelayType01 := (0.156253 ns, 0.136046 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0935652 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.130411 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSX2 : entity is TRUE;
end SDFFSX2;

architecture behavioral of SDFFSX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.119345 ns;
             tpw_CK_negedge : VitalDelayType := 0.0787015 ns;
             tpw_SN_negedge : VitalDelayType := 0.0882047 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.113295 ns, 0.131677 ns);
             tpd_CK_QN : VitalDelayType01 := (0.174035 ns, 0.153794 ns);
             tpd_SN_Q : VitalDelayType01 := (0.110033 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.150225 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSX4 : entity is TRUE;
end SDFFSX4;

architecture behavioral of SDFFSX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0864478 ns;
             tpw_CK_negedge : VitalDelayType := 0.0788597 ns;
             tpw_SN_negedge : VitalDelayType := 0.0587397 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.087318 ns, 0.106263 ns);
             tpd_CK_QN : VitalDelayType01 := (0.123334 ns, 0.101132 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0817668 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.0955598 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSXL : entity is TRUE;
end SDFFSXL;

architecture behavioral of SDFFSXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE N35 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N35 := n0_vec(1);

          P0002 := VitalINV(N35);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFTRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0892989 ns;
             tpw_CK_negedge : VitalDelayType := 0.0726511 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0917369 ns, 0.105636 ns);
             tpd_CK_QN : VitalDelayType01 := (0.129661 ns, 0.113513 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFTRX1 : entity is TRUE;
end SDFFTRX1;

architecture behavioral of SDFFTRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX1",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFTRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalAND2(D_dly, RN_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          n2_var := VitalINV(SE_dly);
          D_EQ_1_AN_SE_EQ_0 := VitalAND2(D_dly, n2_var);

          n3_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFTRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.099671 ns;
             tpw_CK_negedge : VitalDelayType := 0.0728778 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0984587 ns, 0.109344 ns);
             tpd_CK_QN : VitalDelayType01 := (0.14656 ns, 0.134996 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFTRX2 : entity is TRUE;
end SDFFTRX2;

architecture behavioral of SDFFTRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX2",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFTRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalAND2(D_dly, RN_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          n2_var := VitalINV(SE_dly);
          D_EQ_1_AN_SE_EQ_0 := VitalAND2(D_dly, n2_var);

          n3_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFTRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.111943 ns;
             tpw_CK_negedge : VitalDelayType := 0.0726875 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.113643 ns, 0.11899 ns);
             tpd_CK_QN : VitalDelayType01 := (0.158878 ns, 0.152843 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFTRX4 : entity is TRUE;
end SDFFTRX4;

architecture behavioral of SDFFTRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX4",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFTRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalAND2(D_dly, RN_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          n2_var := VitalINV(SE_dly);
          D_EQ_1_AN_SE_EQ_0 := VitalAND2(D_dly, n2_var);

          n3_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFTRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.082506 ns;
             tpw_CK_negedge : VitalDelayType := 0.0726831 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0866383 ns, 0.0993789 ns);
             tpd_CK_QN : VitalDelayType01 := (0.116111 ns, 0.100393 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFTRXL : entity is TRUE;
end SDFFTRXL;

architecture behavioral of SDFFTRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRXL",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFTRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalAND2(D_dly, RN_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          n2_var := VitalINV(SE_dly);
          D_EQ_1_AN_SE_EQ_0 := VitalAND2(D_dly, n2_var);

          n3_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0892889 ns;
             tpw_CK_negedge : VitalDelayType := 0.0742809 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0917779 ns, 0.10561 ns);
             tpd_CK_QN : VitalDelayType01 := (0.129605 ns, 0.113504 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFX1 : entity is TRUE;
end SDFFX1;

architecture behavioral of SDFFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.100043 ns;
             tpw_CK_negedge : VitalDelayType := 0.0740538 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0990963 ns, 0.109746 ns);
             tpd_CK_QN : VitalDelayType01 := (0.146854 ns, 0.135671 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFX2 : entity is TRUE;
end SDFFX2;

architecture behavioral of SDFFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.111891 ns;
             tpw_CK_negedge : VitalDelayType := 0.0741683 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.113497 ns, 0.118936 ns);
             tpd_CK_QN : VitalDelayType01 := (0.158888 ns, 0.152688 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFX4 : entity is TRUE;
end SDFFX4;

architecture behavioral of SDFFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0826486 ns;
             tpw_CK_negedge : VitalDelayType := 0.0743668 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0869422 ns, 0.0995601 ns);
             tpd_CK_QN : VitalDelayType01 := (0.116289 ns, 0.100713 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFXL : entity is TRUE;
end SDFFXL;

architecture behavioral of SDFFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0832748 ns;
             tpw_CK_negedge : VitalDelayType := 0.0796863 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0946969 ns, 0.112053 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFHQX1 : entity is TRUE;
end SEDFFHQX1;

architecture behavioral of SEDFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.086647 ns;
             tpw_CK_negedge : VitalDelayType := 0.0796429 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.099788 ns, 0.116332 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFHQX2 : entity is TRUE;
end SEDFFHQX2;

architecture behavioral of SEDFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0940599 ns;
             tpw_CK_negedge : VitalDelayType := 0.0801002 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.111135 ns, 0.123324 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFHQX4 : entity is TRUE;
end SEDFFHQX4;

architecture behavioral of SEDFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.110039 ns;
             tpw_CK_negedge : VitalDelayType := 0.0803697 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.132731 ns, 0.140756 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFHQX8 : entity is TRUE;
end SEDFFHQX8;

architecture behavioral of SEDFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX8",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0001);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0001 := VitalINV(P0003);

          Q_zd := VitalINV(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFTRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0916653 ns;
             tpw_CK_negedge : VitalDelayType := 0.0738159 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.141625 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0966416 ns, 0.109192 ns);
             tpd_CK_QN : VitalDelayType01 := (0.133857 ns, 0.118726 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFTRX1 : entity is TRUE;
end SEDFFTRX1;

architecture behavioral of SEDFFTRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n8_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n9_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n10_var : std_ulogic;
      VARIABLE n11_var : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n8_var := VitalAND2(n7_var, RN_dly);
          n0_D := VitalMUX2(SI_dly, n8_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n9_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n9_var);

          n10_var := VitalAND2(E_dly, RN_dly);
          n11_var := VitalINV(SE_dly);
          E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 := VitalAND2(n10_var, n11_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFTRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.101354 ns;
             tpw_CK_negedge : VitalDelayType := 0.0742339 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.141625 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.10187 ns, 0.111899 ns);
             tpd_CK_QN : VitalDelayType01 := (0.149732 ns, 0.138661 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFTRX2 : entity is TRUE;
end SEDFFTRX2;

architecture behavioral of SEDFFTRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n8_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n9_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n10_var : std_ulogic;
      VARIABLE n11_var : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n8_var := VitalAND2(n7_var, RN_dly);
          n0_D := VitalMUX2(SI_dly, n8_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0000 := VitalINV(P0003);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n9_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n9_var);

          n10_var := VitalAND2(E_dly, RN_dly);
          n11_var := VitalINV(SE_dly);
          E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 := VitalAND2(n10_var, n11_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFTRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.11226 ns;
             tpw_CK_negedge : VitalDelayType := 0.0740508 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.141625 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.114714 ns, 0.120069 ns);
             tpd_CK_QN : VitalDelayType01 := (0.160234 ns, 0.154105 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFTRX4 : entity is TRUE;
end SEDFFTRX4;

architecture behavioral of SEDFFTRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n8_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n9_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n10_var : std_ulogic;
      VARIABLE n11_var : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n8_var := VitalAND2(n7_var, RN_dly);
          n0_D := VitalMUX2(SI_dly, n8_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0000 := VitalINV(P0003);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n9_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n9_var);

          n10_var := VitalAND2(E_dly, RN_dly);
          n11_var := VitalINV(SE_dly);
          E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 := VitalAND2(n10_var, n11_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFTRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0848386 ns;
             tpw_CK_negedge : VitalDelayType := 0.0738222 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.141625 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0917738 ns, 0.103144 ns);
             tpd_CK_QN : VitalDelayType01 := (0.120231 ns, 0.105699 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFTRXL : entity is TRUE;
end SEDFFTRXL;

architecture behavioral of SEDFFTRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n8_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n9_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n10_var : std_ulogic;
      VARIABLE n11_var : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n8_var := VitalAND2(n7_var, RN_dly);
          n0_D := VitalMUX2(SI_dly, n8_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n9_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n9_var);

          n10_var := VitalAND2(E_dly, RN_dly);
          n11_var := VitalINV(SE_dly);
          E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 := VitalAND2(n10_var, n11_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0925228 ns;
             tpw_CK_negedge : VitalDelayType := 0.0740429 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0918124 ns, 0.105123 ns);
             tpd_CK_QN : VitalDelayType01 := (0.136067 ns, 0.120806 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFX1 : entity is TRUE;
end SEDFFX1;

architecture behavioral of SEDFFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.103278 ns;
             tpw_CK_negedge : VitalDelayType := 0.0740333 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0993265 ns, 0.109317 ns);
             tpd_CK_QN : VitalDelayType01 := (0.152938 ns, 0.142908 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFX2 : entity is TRUE;
end SEDFFX2;

architecture behavioral of SEDFFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0002);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.113021 ns;
             tpw_CK_negedge : VitalDelayType := 0.0742113 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.112876 ns, 0.118397 ns);
             tpd_CK_QN : VitalDelayType01 := (0.16179 ns, 0.156004 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFX4 : entity is TRUE;
end SEDFFX4;

architecture behavioral of SEDFFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0003);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0860862 ns;
             tpw_CK_negedge : VitalDelayType := 0.0741132 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0868434 ns, 0.0991608 ns);
             tpd_CK_QN : VitalDelayType01 := (0.123106 ns, 0.108122 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFXL : entity is TRUE;
end SEDFFXL;

architecture behavioral of SEDFFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFXL",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SMDFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0806101 ns;
             tpw_CK_negedge : VitalDelayType := 0.0820732 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0893071 ns, 0.105951 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SMDFFHQX1 : entity is TRUE;
end SMDFFHQX1;

architecture behavioral of SMDFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE S0_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S0_EQ_0_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n1_var := VitalMUX2(D1_dly, D0_dly, S0_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n2_var := VitalINV(SE_dly);
          S0_EQ_1_AN_SE_EQ_0 := VitalAND2(S0_dly, n2_var);

          n3_var := VitalINV(S0_dly);
          n4_var := VitalINV(SE_dly);
          S0_EQ_0_AN_SE_EQ_0 := VitalAND2(n3_var, n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SMDFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0851355 ns;
             tpw_CK_negedge : VitalDelayType := 0.0825097 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.0947638 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0961203 ns, 0.112232 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SMDFFHQX2 : entity is TRUE;
end SMDFFHQX2;

architecture behavioral of SMDFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE S0_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S0_EQ_0_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n1_var := VitalMUX2(D1_dly, D0_dly, S0_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0001 := VitalINV(N30);

          Q_zd := VitalINV(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n2_var := VitalINV(SE_dly);
          S0_EQ_1_AN_SE_EQ_0 := VitalAND2(S0_dly, n2_var);

          n3_var := VitalINV(S0_dly);
          n4_var := VitalINV(SE_dly);
          S0_EQ_0_AN_SE_EQ_0 := VitalAND2(n3_var, n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SMDFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0917574 ns;
             tpw_CK_negedge : VitalDelayType := 0.082078 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100597 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.106523 ns, 0.119178 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SMDFFHQX4 : entity is TRUE;
end SMDFFHQX4;

architecture behavioral of SMDFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE S0_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S0_EQ_0_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n1_var := VitalMUX2(D1_dly, D0_dly, S0_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n2_var := VitalINV(SE_dly);
          S0_EQ_1_AN_SE_EQ_0 := VitalAND2(S0_dly, n2_var);

          n3_var := VitalINV(S0_dly);
          n4_var := VitalINV(SE_dly);
          S0_EQ_0_AN_SE_EQ_0 := VitalAND2(n3_var, n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SMDFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.107121 ns;
             tpw_CK_negedge : VitalDelayType := 0.0825549 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.127373 ns, 0.134841 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SMDFFHQX8 : entity is TRUE;
end SMDFFHQX8;

architecture behavioral of SMDFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE S0_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S0_EQ_0_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n1_var := VitalMUX2(D1_dly, D0_dly, S0_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n2_var := VitalINV(SE_dly);
          S0_EQ_1_AN_SE_EQ_0 := VitalAND2(S0_dly, n2_var);

          n3_var := VitalINV(S0_dly);
          n4_var := VitalINV(SE_dly);
          S0_EQ_0_AN_SE_EQ_0 := VitalAND2(n3_var, n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0312525 ns, 0.0341316 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0317868 ns, 0.0292776 ns, 0.0275026 ns, 0.0374619 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX1 : entity is TRUE;
end TBUFX1;

architecture behavioral of TBUFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0415941 ns, 0.0442067 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0574546 ns, 0.0396604 ns, 0.0415341 ns, 0.0562288 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX12 : entity is TRUE;
end TBUFX12;

architecture behavioral of TBUFX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX16 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0721652 ns, 0.0719466 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.082669 ns, 0.0724057 ns, 0.0570044 ns, 0.0930252 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX16 : entity is TRUE;
end TBUFX16;

architecture behavioral of TBUFX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0385103 ns, 0.0405355 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0371963 ns, 0.0364929 ns, 0.0388149 ns, 0.0435358 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX2 : entity is TRUE;
end TBUFX2;

architecture behavioral of TBUFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX20 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0433592 ns, 0.0454896 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.056967 ns, 0.0412361 ns, 0.0419457 ns, 0.0555982 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX20 : entity is TRUE;
end TBUFX20;

architecture behavioral of TBUFX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.036708 ns, 0.0390041 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0431691 ns, 0.0346518 ns, 0.034853 ns, 0.046235 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX3 : entity is TRUE;
end TBUFX3;

architecture behavioral of TBUFX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0407591 ns, 0.0428013 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0457946 ns, 0.0386897 ns, 0.0413067 ns, 0.0493498 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX4 : entity is TRUE;
end TBUFX4;

architecture behavioral of TBUFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0363338 ns, 0.040143 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0572712 ns, 0.0343128 ns, 0.0348077 ns, 0.05463 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX6 : entity is TRUE;
end TBUFX6;

architecture behavioral of TBUFX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0407402 ns, 0.0442147 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0606623 ns, 0.0387043 ns, 0.041563 ns, 0.0583893 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX8 : entity is TRUE;
end TBUFX8;

architecture behavioral of TBUFX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFXL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0269748 ns, 0.0302837 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0291507 ns, 0.0250494 ns, 0.0223097 ns, 0.033623 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFXL : entity is TRUE;
end TBUFXL;

architecture behavioral of TBUFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TIEHI is
   generic (

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TIEHI : entity is TRUE;
end TIEHI;

architecture behavioral of TIEHI is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL HIGH : std_ulogic := '1';
begin

   --functionality section
   VITALBUF (Y, HIGH);

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TIELO is
   generic (

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TIELO : entity is TRUE;
end TIELO;

architecture behavioral of TIELO is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL LOW : std_ulogic := '0';
begin

   --functionality section
   VITALBUF (Y, LOW);

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX12 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.132209 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.166612 ns, 0.146946 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX12 : entity is TRUE;
end TLATNCAX12;

architecture behavioral of TLATNCAX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE N0 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX12",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX12",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          N0 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX16 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.154089 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.0587499 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.0587499 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := 0.035 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.035 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.175774 ns, 0.153959 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX16 : entity is TRUE;
end TLATNCAX16;

architecture behavioral of TLATNCAX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX16",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX16",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.135977 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.243444 ns, 0.193531 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX2 : entity is TRUE;
end TLATNCAX2;

architecture behavioral of TLATNCAX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX20 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.175237 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.187762 ns, 0.163055 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX20 : entity is TRUE;
end TLATNCAX20;

architecture behavioral of TLATNCAX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX20",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX20",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX3 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.123592 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.197371 ns, 0.163225 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX3 : entity is TRUE;
end TLATNCAX3;

architecture behavioral of TLATNCAX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX3",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX3",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.119563 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.184731 ns, 0.155412 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX4 : entity is TRUE;
end TLATNCAX4;

architecture behavioral of TLATNCAX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE N0 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          N0 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX6 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.122543 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.164739 ns, 0.143556 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX6 : entity is TRUE;
end TLATNCAX6;

architecture behavioral of TLATNCAX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX6",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX6",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.122742 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100875 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.164032 ns, 0.144218 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX8 : entity is TRUE;
end TLATNCAX8;

architecture behavioral of TLATNCAX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX8",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNSRX1 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_GN_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0 ns;
             trecovery_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tpw_GN_negedge : VitalDelayType := 0.109438 ns;
             tpw_RN_negedge : VitalDelayType := 0.0860683 ns;
             tpw_SN_negedge : VitalDelayType := 0.0630692 ns;
             tsetup_RN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_RN_GN_posedge_posedge : VitalDelayType := 0 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := 0 ns;
             tpd_D_Q : VitalDelayType01 := (0.0957102 ns, 0.119858 ns);
             tpd_D_QN : VitalDelayType01 := (0.102967 ns, 0.0767811 ns);
             tpd_GN_Q : VitalDelayType01 := (0.148367 ns, 0.152218 ns);
             tpd_GN_QN : VitalDelayType01 := (0.135232 ns, 0.129358 ns);
             tpd_RN_Q : VitalDelayType01 := (0.134925 ns, 0.129475 ns);
             tpd_RN_QN : VitalDelayType01 := (0.112652 ns, 0.115869 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0691509 ns, 0.0780422 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0613111 ns, 0.0499541 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNSRX1 : entity is TRUE;
end TLATNSRX1;

architecture behavioral of TLATNSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( GN_dly, GN_ipd, tisd_GN_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_GN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_GN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_GN : std_ulogic := '0';
      VARIABLE TimeMarker_RN_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE GN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(GN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    Recovery       => trecovery_SN_GN_posedge_posedge,
                    Removal        => tremoval_SN_GN_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    TimingData     => TimeMarker_rec_GN_SN_posedge,
                    Violation      => Tviol_rec_GN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_RN_GN_posedge_posedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_GN_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    TimingData     => TimeMarker_RN_GN,
                    Violation      => Tviol_RN_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_GN_SN_posedge OR
                        Tviol_RN_GN OR
                        Tviol_D_GN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_GN_negedge );

          n1_var := VitalINV(GN_dly);
          n0_ENABLE := VitalAND2(n1_var, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);

          GN_EQ_1 := VitalBUF(GN_dly);

          n2_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n2_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNSRX2 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_GN_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0 ns;
             trecovery_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tpw_GN_negedge : VitalDelayType := 0.122029 ns;
             tpw_RN_negedge : VitalDelayType := 0.0974281 ns;
             tpw_SN_negedge : VitalDelayType := 0.0735219 ns;
             tsetup_RN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_RN_GN_posedge_posedge : VitalDelayType := 0 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := 0 ns;
             tpd_D_Q : VitalDelayType01 := (0.11007 ns, 0.140095 ns);
             tpd_D_QN : VitalDelayType01 := (0.12189 ns, 0.0897298 ns);
             tpd_GN_Q : VitalDelayType01 := (0.161678 ns, 0.171617 ns);
             tpd_GN_QN : VitalDelayType01 := (0.153294 ns, 0.141287 ns);
             tpd_RN_Q : VitalDelayType01 := (0.147963 ns, 0.147486 ns);
             tpd_RN_QN : VitalDelayType01 := (0.129327 ns, 0.127568 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0766519 ns, 0.090934 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0727965 ns, 0.0561033 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNSRX2 : entity is TRUE;
end TLATNSRX2;

architecture behavioral of TLATNSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( GN_dly, GN_ipd, tisd_GN_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_GN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_GN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_GN : std_ulogic := '0';
      VARIABLE TimeMarker_RN_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE GN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(GN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    Recovery       => trecovery_SN_GN_posedge_posedge,
                    Removal        => tremoval_SN_GN_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    TimingData     => TimeMarker_rec_GN_SN_posedge,
                    Violation      => Tviol_rec_GN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_RN_GN_posedge_posedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_GN_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    TimingData     => TimeMarker_RN_GN,
                    Violation      => Tviol_RN_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_GN_SN_posedge OR
                        Tviol_RN_GN OR
                        Tviol_D_GN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_GN_negedge );

          n1_var := VitalINV(GN_dly);
          n0_ENABLE := VitalAND2(n1_var, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);

          GN_EQ_1 := VitalBUF(GN_dly);

          n2_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n2_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNSRX4 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_GN_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0 ns;
             trecovery_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tpw_GN_negedge : VitalDelayType := 0.138736 ns;
             tpw_RN_negedge : VitalDelayType := 0.114344 ns;
             tpw_SN_negedge : VitalDelayType := 0.0810047 ns;
             tsetup_RN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_RN_GN_posedge_posedge : VitalDelayType := 0 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := 0 ns;
             tpd_D_Q : VitalDelayType01 := (0.123391 ns, 0.157469 ns);
             tpd_D_QN : VitalDelayType01 := (0.137615 ns, 0.101167 ns);
             tpd_GN_Q : VitalDelayType01 := (0.17523 ns, 0.190407 ns);
             tpd_GN_QN : VitalDelayType01 := (0.170517 ns, 0.153051 ns);
             tpd_RN_Q : VitalDelayType01 := (0.161995 ns, 0.166276 ns);
             tpd_RN_QN : VitalDelayType01 := (0.146425 ns, 0.139786 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0759879 ns, 0.0929116 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0731647 ns, 0.0538605 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNSRX4 : entity is TRUE;
end TLATNSRX4;

architecture behavioral of TLATNSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( GN_dly, GN_ipd, tisd_GN_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_GN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_GN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_GN : std_ulogic := '0';
      VARIABLE TimeMarker_RN_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE GN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(GN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    Recovery       => trecovery_SN_GN_posedge_posedge,
                    Removal        => tremoval_SN_GN_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    TimingData     => TimeMarker_rec_GN_SN_posedge,
                    Violation      => Tviol_rec_GN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_RN_GN_posedge_posedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_GN_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    TimingData     => TimeMarker_RN_GN,
                    Violation      => Tviol_RN_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_GN_SN_posedge OR
                        Tviol_RN_GN OR
                        Tviol_D_GN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_GN_negedge );

          n1_var := VitalINV(GN_dly);
          n0_ENABLE := VitalAND2(n1_var, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);

          GN_EQ_1 := VitalBUF(GN_dly);

          n2_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n2_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNSRXL is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_GN_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0 ns;
             trecovery_SN_GN_posedge_posedge : VitalDelayType := 0 ns;
             tremoval_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tpw_GN_negedge : VitalDelayType := 0.101093 ns;
             tpw_RN_negedge : VitalDelayType := 0.0776813 ns;
             tpw_SN_negedge : VitalDelayType := 0.0514044 ns;
             tsetup_RN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_RN_GN_posedge_posedge : VitalDelayType := 0 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := 0 ns;
             tpd_D_Q : VitalDelayType01 := (0.081927 ns, 0.103488 ns);
             tpd_D_QN : VitalDelayType01 := (0.088254 ns, 0.06514 ns);
             tpd_GN_Q : VitalDelayType01 := (0.134388 ns, 0.135592 ns);
             tpd_GN_QN : VitalDelayType01 := (0.120193 ns, 0.117487 ns);
             tpd_RN_Q : VitalDelayType01 := (0.121121 ns, 0.112612 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0974408 ns, 0.104209 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0555035 ns, 0.0618763 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0468049 ns, 0.0386002 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNSRXL : entity is TRUE;
end TLATNSRXL;

architecture behavioral of TLATNSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( GN_dly, GN_ipd, tisd_GN_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_GN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_GN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_GN : std_ulogic := '0';
      VARIABLE TimeMarker_RN_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE GN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(GN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    Recovery       => trecovery_SN_GN_posedge_posedge,
                    Removal        => tremoval_SN_GN_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    TimingData     => TimeMarker_rec_GN_SN_posedge,
                    Violation      => Tviol_rec_GN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_RN_GN_posedge_posedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_GN_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    TimingData     => TimeMarker_RN_GN,
                    Violation      => Tviol_RN_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_GN_SN_posedge OR
                        Tviol_RN_GN OR
                        Tviol_D_GN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_GN_negedge );

          n1_var := VitalINV(GN_dly);
          n0_ENABLE := VitalAND2(n1_var, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);

          GN_EQ_1 := VitalBUF(GN_dly);

          n2_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n2_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX12 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.119372 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.167229 ns, 0.146529 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX12 : entity is TRUE;
end TLATNTSCAX12;

architecture behavioral of TLATNTSCAX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE N5 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX12",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX12",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX12",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          N5 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX16 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.131973 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.0587499 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1525 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := 0.035 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.0587499 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.0587499 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1525 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := 0.035 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.0587499 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.176396 ns, 0.153966 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX16 : entity is TRUE;
end TLATNTSCAX16;

architecture behavioral of TLATNTSCAX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX16",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX16",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX16",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.130805 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.243701 ns, 0.192565 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX2 : entity is TRUE;
end TLATNTSCAX2;

architecture behavioral of TLATNTSCAX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX20 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.143583 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.188129 ns, 0.163043 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX20 : entity is TRUE;
end TLATNTSCAX20;

architecture behavioral of TLATNTSCAX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX20",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX20",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX20",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX3 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.116896 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.19761 ns, 0.16241 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX3 : entity is TRUE;
end TLATNTSCAX3;

architecture behavioral of TLATNTSCAX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX3",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX3",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX3",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.113422 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.185535 ns, 0.154857 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX4 : entity is TRUE;
end TLATNTSCAX4;

architecture behavioral of TLATNTSCAX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX6 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.112731 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.165209 ns, 0.142971 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX6 : entity is TRUE;
end TLATNTSCAX6;

architecture behavioral of TLATNTSCAX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE N5 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX6",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX6",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX6",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          N5 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.113137 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.164626 ns, 0.143474 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX8 : entity is TRUE;
end TLATNTSCAX8;

architecture behavioral of TLATNTSCAX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX8",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNX1 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_GN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_GN : VitalDelayType := DefDummyIcd;
             tpw_GN_negedge : VitalDelayType := 0.0793722 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := 0 ns;
             tpd_D_Q : VitalDelayType01 := (0.0942309 ns, 0.0984853 ns);
             tpd_D_QN : VitalDelayType01 := (0.0834531 ns, 0.0753783 ns);
             tpd_GN_Q : VitalDelayType01 := (0.110137 ns, 0.120692 ns);
             tpd_GN_QN : VitalDelayType01 := (0.105622 ns, 0.0912975 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNX1 : entity is TRUE;
end TLATNX1;

architecture behavioral of TLATNX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_GN );
   VitalSignalDelay( GN_dly, GN_ipd, ticd_GN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly)

      --timing checks section variables
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNX1",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_GN OR
                        PWviol_GN_negedge );

          n0_ENABLE := VitalINV(GN_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNX2 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_GN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_GN : VitalDelayType := DefDummyIcd;
             tpw_GN_negedge : VitalDelayType := 0.0877286 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := 0 ns;
             tpd_D_Q : VitalDelayType01 := (0.106916 ns, 0.112486 ns);
             tpd_D_QN : VitalDelayType01 := (0.0966596 ns, 0.0866575 ns);
             tpd_GN_Q : VitalDelayType01 := (0.122961 ns, 0.134259 ns);
             tpd_GN_QN : VitalDelayType01 := (0.118422 ns, 0.102705 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNX2 : entity is TRUE;
end TLATNX2;

architecture behavioral of TLATNX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_GN );
   VitalSignalDelay( GN_dly, GN_ipd, ticd_GN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly)

      --timing checks section variables
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNX2",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_GN OR
                        PWviol_GN_negedge );

          n0_ENABLE := VitalINV(GN_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNX4 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_GN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_GN : VitalDelayType := DefDummyIcd;
             tpw_GN_negedge : VitalDelayType := 0.102858 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := 0 ns;
             tpd_D_Q : VitalDelayType01 := (0.121333 ns, 0.133312 ns);
             tpd_D_QN : VitalDelayType01 := (0.115783 ns, 0.0993793 ns);
             tpd_GN_Q : VitalDelayType01 := (0.13759 ns, 0.154525 ns);
             tpd_GN_QN : VitalDelayType01 := (0.13698 ns, 0.115626 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNX4 : entity is TRUE;
end TLATNX4;

architecture behavioral of TLATNX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_GN );
   VitalSignalDelay( GN_dly, GN_ipd, ticd_GN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly)

      --timing checks section variables
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNX4",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_GN OR
                        PWviol_GN_negedge );

          n0_ENABLE := VitalINV(GN_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNXL is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_GN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_GN : VitalDelayType := DefDummyIcd;
             tpw_GN_negedge : VitalDelayType := 0.0742213 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := 0 ns;
             tpd_D_Q : VitalDelayType01 := (0.0813445 ns, 0.0885415 ns);
             tpd_D_QN : VitalDelayType01 := (0.0747664 ns, 0.0645331 ns);
             tpd_GN_Q : VitalDelayType01 := (0.0972955 ns, 0.109853 ns);
             tpd_GN_QN : VitalDelayType01 := (0.0960245 ns, 0.0804475 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNXL : entity is TRUE;
end TLATNXL;

architecture behavioral of TLATNXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_GN );
   VitalSignalDelay( GN_dly, GN_ipd, ticd_GN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly)

      --timing checks section variables
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNXL",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_GN OR
                        PWviol_GN_negedge );

          n0_ENABLE := VitalINV(GN_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATSRX1 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_G_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0 ns;
             trecovery_SN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_G_posedge_negedge : VitalDelayType := 0 ns;
             tpw_G_posedge : VitalDelayType := 0.092653 ns;
             tpw_RN_negedge : VitalDelayType := 0.0850788 ns;
             tpw_SN_negedge : VitalDelayType := 0.0626246 ns;
             tsetup_RN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_RN_G_posedge_negedge : VitalDelayType := 0 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := 0 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tpd_D_Q : VitalDelayType01 := (0.0957012 ns, 0.119557 ns);
             tpd_D_QN : VitalDelayType01 := (0.102767 ns, 0.076819 ns);
             tpd_G_Q : VitalDelayType01 := (0.131458 ns, 0.135347 ns);
             tpd_G_QN : VitalDelayType01 := (0.118387 ns, 0.112544 ns);
             tpd_RN_Q : VitalDelayType01 := (0.133168 ns, 0.128371 ns);
             tpd_RN_QN : VitalDelayType01 := (0.111638 ns, 0.114244 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0690536 ns, 0.0779755 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0612187 ns, 0.0499455 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATSRX1 : entity is TRUE;
end TLATSRX1;

architecture behavioral of TLATSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( G_dly, G_ipd, tisd_G_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_G_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_G_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_G : std_ulogic := '0';
      VARIABLE TimeMarker_RN_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE G_EQ_0 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(G_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    Recovery       => trecovery_SN_G_posedge_negedge,
                    Removal        => tremoval_SN_G_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    TimingData     => TimeMarker_rec_G_SN_posedge,
                    Violation      => Tviol_rec_G_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_RN_G_posedge_negedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_G_negedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    TimingData     => TimeMarker_RN_G,
                    Violation      => Tviol_RN_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_G_SN_posedge OR
                        Tviol_RN_G OR
                        Tviol_D_G OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_G_posedge );

          n0_ENABLE := VitalAND2(G_dly, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);

          G_EQ_0 := VitalINV(G_dly);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATSRX2 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_G_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0 ns;
             trecovery_SN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_G_posedge_negedge : VitalDelayType := 0 ns;
             tpw_G_posedge : VitalDelayType := 0.105492 ns;
             tpw_RN_negedge : VitalDelayType := 0.0963802 ns;
             tpw_SN_negedge : VitalDelayType := 0.0732308 ns;
             tsetup_RN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_RN_G_posedge_negedge : VitalDelayType := 0 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := 0 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tpd_D_Q : VitalDelayType01 := (0.109245 ns, 0.139345 ns);
             tpd_D_QN : VitalDelayType01 := (0.121267 ns, 0.0890111 ns);
             tpd_G_Q : VitalDelayType01 := (0.144198 ns, 0.154892 ns);
             tpd_G_QN : VitalDelayType01 := (0.13675 ns, 0.123936 ns);
             tpd_RN_Q : VitalDelayType01 := (0.145988 ns, 0.146242 ns);
             tpd_RN_QN : VitalDelayType01 := (0.128213 ns, 0.125704 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0766984 ns, 0.0908381 ns);
             tpd_SN_QN : VitalDelayType01 := (0.072841 ns, 0.0562284 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATSRX2 : entity is TRUE;
end TLATSRX2;

architecture behavioral of TLATSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( G_dly, G_ipd, tisd_G_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_G_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_G_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_G : std_ulogic := '0';
      VARIABLE TimeMarker_RN_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE G_EQ_0 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(G_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    Recovery       => trecovery_SN_G_posedge_negedge,
                    Removal        => tremoval_SN_G_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    TimingData     => TimeMarker_rec_G_SN_posedge,
                    Violation      => Tviol_rec_G_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_RN_G_posedge_negedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_G_negedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    TimingData     => TimeMarker_RN_G,
                    Violation      => Tviol_RN_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_G_SN_posedge OR
                        Tviol_RN_G OR
                        Tviol_D_G OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_G_posedge );

          n0_ENABLE := VitalAND2(G_dly, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);

          G_EQ_0 := VitalINV(G_dly);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATSRX4 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_G_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0 ns;
             trecovery_SN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_G_posedge_negedge : VitalDelayType := 0 ns;
             tpw_G_posedge : VitalDelayType := 0.12295 ns;
             tpw_RN_negedge : VitalDelayType := 0.114484 ns;
             tpw_SN_negedge : VitalDelayType := 0.0794341 ns;
             tsetup_RN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_RN_G_posedge_negedge : VitalDelayType := 0 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := 0 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tpd_D_Q : VitalDelayType01 := (0.124618 ns, 0.159412 ns);
             tpd_D_QN : VitalDelayType01 := (0.139175 ns, 0.102091 ns);
             tpd_G_Q : VitalDelayType01 := (0.159282 ns, 0.17553 ns);
             tpd_G_QN : VitalDelayType01 := (0.155261 ns, 0.136731 ns);
             tpd_RN_Q : VitalDelayType01 := (0.161094 ns, 0.166685 ns);
             tpd_RN_QN : VitalDelayType01 := (0.146508 ns, 0.13854 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0763557 ns, 0.0933461 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0732032 ns, 0.0539235 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATSRX4 : entity is TRUE;
end TLATSRX4;

architecture behavioral of TLATSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( G_dly, G_ipd, tisd_G_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_G_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_G_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_G : std_ulogic := '0';
      VARIABLE TimeMarker_RN_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE G_EQ_0 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(G_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    Recovery       => trecovery_SN_G_posedge_negedge,
                    Removal        => tremoval_SN_G_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    TimingData     => TimeMarker_rec_G_SN_posedge,
                    Violation      => Tviol_rec_G_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_RN_G_posedge_negedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_G_negedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    TimingData     => TimeMarker_RN_G,
                    Violation      => Tviol_RN_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_G_SN_posedge OR
                        Tviol_RN_G OR
                        Tviol_D_G OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_G_posedge );

          n0_ENABLE := VitalAND2(G_dly, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);

          G_EQ_0 := VitalINV(G_dly);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATSRXL is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_G_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0 ns;
             trecovery_SN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tpw_G_posedge : VitalDelayType := 0.0844632 ns;
             tpw_RN_negedge : VitalDelayType := 0.076925 ns;
             tpw_SN_negedge : VitalDelayType := 0.0510447 ns;
             tsetup_RN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_RN_G_posedge_negedge : VitalDelayType := 0 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := 0 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0 ns;
             tpd_D_Q : VitalDelayType01 := (0.0820545 ns, 0.103342 ns);
             tpd_D_QN : VitalDelayType01 := (0.0881525 ns, 0.0652532 ns);
             tpd_G_Q : VitalDelayType01 := (0.117813 ns, 0.118944 ns);
             tpd_G_QN : VitalDelayType01 := (0.103552 ns, 0.100943 ns);
             tpd_RN_Q : VitalDelayType01 := (0.119514 ns, 0.111799 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0966194 ns, 0.102645 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0555142 ns, 0.0618576 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0467797 ns, 0.0386159 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATSRXL : entity is TRUE;
end TLATSRXL;

architecture behavioral of TLATSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( G_dly, G_ipd, tisd_G_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_G_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_G_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_G : std_ulogic := '0';
      VARIABLE TimeMarker_RN_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE G_EQ_0 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(G_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    Recovery       => trecovery_SN_G_posedge_negedge,
                    Removal        => tremoval_SN_G_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    TimingData     => TimeMarker_rec_G_SN_posedge,
                    Violation      => Tviol_rec_G_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_RN_G_posedge_negedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_G_negedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    TimingData     => TimeMarker_RN_G,
                    Violation      => Tviol_RN_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_G_SN_posedge OR
                        Tviol_RN_G OR
                        Tviol_D_G OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_G_posedge );

          n0_ENABLE := VitalAND2(G_dly, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);

          G_EQ_0 := VitalINV(G_dly);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATX1 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_G : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_G : VitalDelayType := DefDummyIcd;
             tpw_G_posedge : VitalDelayType := 0.078562 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := 0 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0 ns;
             tpd_D_Q : VitalDelayType01 := (0.0947309 ns, 0.0994486 ns);
             tpd_D_QN : VitalDelayType01 := (0.0843972 ns, 0.0758901 ns);
             tpd_G_Q : VitalDelayType01 := (0.118714 ns, 0.102158 ns);
             tpd_G_QN : VitalDelayType01 := (0.0871115 ns, 0.0998897 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATX1 : entity is TRUE;
end TLATX1;

architecture behavioral of TLATX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_G );
   VitalSignalDelay( G_dly, G_ipd, ticd_G );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly)

      --timing checks section variables
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE QINT : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATX1",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_G OR
                        PWviol_G_posedge );

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, G_dly, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          QINT := n0_vec(1);

          P0000 := VitalINV(QINT);

          Q_zd := VitalBUF(QINT);

          QN_zd := VitalINV(QINT);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATX2 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_G : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_G : VitalDelayType := DefDummyIcd;
             tpw_G_posedge : VitalDelayType := 0.087271 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := 0 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tpd_D_Q : VitalDelayType01 := (0.107643 ns, 0.113452 ns);
             tpd_D_QN : VitalDelayType01 := (0.0976232 ns, 0.0873706 ns);
             tpd_G_Q : VitalDelayType01 := (0.131326 ns, 0.116032 ns);
             tpd_G_QN : VitalDelayType01 := (0.100181 ns, 0.111039 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATX2 : entity is TRUE;
end TLATX2;

architecture behavioral of TLATX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_G );
   VitalSignalDelay( G_dly, G_ipd, ticd_G );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly)

      --timing checks section variables
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATX2",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_G OR
                        PWviol_G_posedge );

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, G_dly, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATX4 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_G : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_G : VitalDelayType := DefDummyIcd;
             tpw_G_posedge : VitalDelayType := 0.101746 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := 0 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0 ns;
             tpd_D_Q : VitalDelayType01 := (0.121353 ns, 0.133466 ns);
             tpd_D_QN : VitalDelayType01 := (0.116263 ns, 0.0998144 ns);
             tpd_G_Q : VitalDelayType01 := (0.145176 ns, 0.135571 ns);
             tpd_G_QN : VitalDelayType01 := (0.118361 ns, 0.123598 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATX4 : entity is TRUE;
end TLATX4;

architecture behavioral of TLATX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_G );
   VitalSignalDelay( G_dly, G_ipd, ticd_G );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly)

      --timing checks section variables
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATX4",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_G OR
                        PWviol_G_posedge );

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, G_dly, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATXL is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_G : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_G : VitalDelayType := DefDummyIcd;
             tpw_G_posedge : VitalDelayType := 0.0717423 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := 0 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0 ns;
             tpd_D_Q : VitalDelayType01 := (0.0809391 ns, 0.0884872 ns);
             tpd_D_QN : VitalDelayType01 := (0.0747603 ns, 0.0643023 ns);
             tpd_G_Q : VitalDelayType01 := (0.104981 ns, 0.0912019 ns);
             tpd_G_QN : VitalDelayType01 := (0.0774327 ns, 0.0883315 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATXL : entity is TRUE;
end TLATXL;

architecture behavioral of TLATXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_G );
   VitalSignalDelay( G_dly, G_ipd, ticd_G );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly)

      --timing checks section variables
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE QINT : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATXL",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_G OR
                        PWviol_G_posedge );

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, G_dly, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          QINT := n0_vec(1);

          P0000 := VitalINV(QINT);

          Q_zd := VitalBUF(QINT);

          QN_zd := VitalINV(QINT);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0551025 ns, 0.0596771 ns);
             tpd_B_Y : VitalDelayType01 := (0.0444767 ns, 0.0406416 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR2X1 : entity is TRUE;
end XNOR2X1;

architecture behavioral of XNOR2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0689106 ns, 0.0766926 ns);
             tpd_B_Y : VitalDelayType01 := (0.0580305 ns, 0.0564464 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR2X2 : entity is TRUE;
end XNOR2X2;

architecture behavioral of XNOR2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0892724 ns, 0.0983765 ns);
             tpd_B_Y : VitalDelayType01 := (0.0713447 ns, 0.0693093 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR2X4 : entity is TRUE;
end XNOR2X4;

architecture behavioral of XNOR2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0482357 ns, 0.0508638 ns);
             tpd_B_Y : VitalDelayType01 := (0.0377557 ns, 0.0327326 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR2XL : entity is TRUE;
end XNOR2XL;

architecture behavioral of XNOR2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0817739 ns, 0.0826009 ns);
             tpd_B_Y : VitalDelayType01 := (0.0598282 ns, 0.0573621 ns);
             tpd_C_Y : VitalDelayType01 := (0.0396627 ns, 0.0381922 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR3X1 : entity is TRUE;
end XNOR3X1;

architecture behavioral of XNOR3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          n1_var := VitalXOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0824947 ns, 0.0726877 ns);
             tpd_B_Y : VitalDelayType01 := (0.0586457 ns, 0.0469871 ns);
             tpd_C_Y : VitalDelayType01 := (0.0396562 ns, 0.0305697 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR3XL : entity is TRUE;
end XNOR3XL;

architecture behavioral of XNOR3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          n1_var := VitalXOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0544797 ns, 0.0588579 ns);
             tpd_B_Y : VitalDelayType01 := (0.0404423 ns, 0.0453891 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR2X1 : entity is TRUE;
end XOR2X1;

architecture behavioral of XOR2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0683789 ns, 0.0758252 ns);
             tpd_B_Y : VitalDelayType01 := (0.0537603 ns, 0.0615725 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR2X2 : entity is TRUE;
end XOR2X2;

architecture behavioral of XOR2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0891832 ns, 0.0988535 ns);
             tpd_B_Y : VitalDelayType01 := (0.0666897 ns, 0.0750823 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR2X4 : entity is TRUE;
end XOR2X4;

architecture behavioral of XOR2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.04744 ns, 0.0499346 ns);
             tpd_B_Y : VitalDelayType01 := (0.0339087 ns, 0.0370908 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR2XL : entity is TRUE;
end XOR2XL;

architecture behavioral of XOR2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0814612 ns, 0.0818533 ns);
             tpd_B_Y : VitalDelayType01 := (0.0592519 ns, 0.0569775 ns);
             tpd_C_Y : VitalDelayType01 := (0.0399477 ns, 0.0383208 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR3X1 : entity is TRUE;
end XOR3X1;

architecture behavioral of XOR3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalXOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0830724 ns, 0.0732798 ns);
             tpd_B_Y : VitalDelayType01 := (0.0585692 ns, 0.0480943 ns);
             tpd_C_Y : VitalDelayType01 := (0.0394918 ns, 0.0308784 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR3XL : entity is TRUE;
end XOR3XL;

architecture behavioral of XOR3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalXOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


