// Verilog-AMS netlist generated by the AMS netlister, version ICOA5.2.51.500.7.
// Cadence Design Systems, Inc.

`include "disciplines.vams"
 
module PLL_ARST_DIG ( DUMP,COMP,VDD,REFCLK,PD,VSS ); 

output   DUMP;
input   COMP;
input   VDD;
input   REFCLK;
input  
 PD;
input   VSS;

 
 
 
nand2b_2x_hv (*
integer library_binding = "ether";
integer cds_net_set
[0:1] = { "DVSS","DVDD" };
integer DVSS = "VSS";
integer DVDD
 = "VDD";
 *)
I3 ( .AN( REFCLK ), .Y( net18 ), .B( SLEEPb ) );
 
clkbuf_12x_hv (*
integer library_binding = "ether";
integer 
cds_net_set[0:1] = { "DVDD","DVSS" };
integer DVDD = "VDD";
integer 
DVSS = "VSS";
 *)
I13 ( .Y( DUMP ), .A( net060 ) );
 
nor2_1x_hv (*
integer library_binding = "ether";
integer cds_net_set
[0:1] = { "DVSS","DVDD" };
integer DVSS = "VSS";
integer DVDD
 = "VDD";
 *)
I5 ( .Y( net15 ), .B( SLEEP ), .A( net20 ) );
 
dff_1x_hv (*
integer library_binding = "ether";
integer cds_net_set
[0:1] = { "DVDD","DVSS" };
integer DVDD = "VDD";
integer DVSS
 = "VSS";
 *)
I0 ( .QN( net021 ), .D( COMP ), .CK( net18 ), .Q( net20 ) );
 
inv_3x_hv (*
integer library_binding = "ether";
integer cds_net_set
[0:1] = { "DVSS","DVDD" };
integer DVSS = "VSS";
integer DVDD
 = "VDD";
 *)
I9 ( .Y( SLEEP ), .A( SLEEPb ) );
inv_3x_hv (*
integer library_binding = "ether";
integer cds_net_set
[0:1] = { "DVDD","DVSS" };
integer DVDD = "VDD";
integer DVSS
 = "VSS";
 *)
I8 ( .Y( SLEEPb ), .A( PD ) );
inv_3x_hv (*
integer library_binding = "ether";
integer cds_net_set
[0:1] = { "DVDD","DVSS" };
integer DVDD = "VDD";
integer DVSS
 = "VSS";
 *)
I12 ( .Y( net060 ), .A( net15 ) );

endmodule
