// Verilog-AMS netlist generated by the AMS netlister, version ICOA5.2.51.500.7.
// Cadence Design Systems, Inc.

`include "disciplines.vams"
 
module PLL_VCO_320MHZ_INV ( VDD,Y,VSS,A ); 

input   VDD;
output   Y;
input   VSS;
input   A;

 
 
 
gpdk090_nmos2v #(.ps(7.2u), .m(1 * 2), .as(1.8p), .l(280.0n), .pd(3.6u),
 .ad(900f), .w(3u)) (*
integer library_binding = "gpdk090";
integer 
passed_mfactor = "m";
 *)
NM0 ( Y, A, VSS, VSS );
 
gpdk090_pmos2v #(.ps(13.2u), .m(1 * 2), .as(3.6p), .l(280.0n), .pd(6.6u),
 .ad(1.8p), .w(6u)) (*
integer library_binding = "gpdk090";
integer 
passed_mfactor = "m";
 *)
PM0 ( Y, A, VDD, VDD );
 
gpdk090_nmoscap2v #(.m(1 * 1), .l(1.15u), .w(1.15u)) (*
integer 
library_binding = "gpdk090";
integer passed_mfactor = "m";
integer 
elaboration_binding = "C2[3:0]";
 *)
C2_3 ( VSS, Y, VSS, VSS ),
  C2_2 ( VSS, Y, VSS, VSS ),
  C2_1 ( VSS, Y, VSS, VSS ),
  C2_0 ( VSS, Y, VSS, VSS );

endmodule
