//Revision 9
//NOTE
// Default template for spectre
// Note:
//      Please remember to replace Top Cell Library, Cell, and View
//      fields with the actual names used by your design.
//END_NOTE

config adc_top_sim;
design ether_sims.adc_top_sim:schematic;
liblist ether_sims;

viewlist spectre, schematic, verilog, cmos_sch, behavioral, functional, ahdl;
stoplist spectre, verilog;


inst (ether_sims.adc_top_sim:schematic).ADC_TOP binding :verilogams;


endconfig
