//Revision 67
//NOTE
// Default template for AMS
// Note:
//      Please remember to replace the Library, Cell, and View fields
//      for the Top Cell with the actual names used by your design.
//END_NOTE

config pll_250MHz_ams_sim;
design ether_sims.pll_250MHz_ams_sim:schematic;

const digital behavioral, functional, schematic, symbol;
const analog veriloga, functional, schematic, symbol;
liblist ether, basic, analogLib;

viewlist verilogams, veriloga, verilog, behavioral, functional, schematic, cmos_sch, symbol, verilogams;
stoplist symbol;


cell ether.PLL_250MHZ_MDIV binding :verilog;
inst (ether.PLL_PFD:schematic).I12 binding :behavioral;
cell ether.PLL_250MHZ binding :schematic;
inst (ether.PLL_250MHZ:schematic).I84 binding :behavioral;
inst (ether.PLL_250MHZ:schematic).I34 binding :verilogams;
inst (ether.PLL_250MHZ:schematic).I32 binding :verilog;
inst (ether.PLL_250MHZ:schematic).I23 binding :verilogams;
inst (ether.PLL_250MHZ:schematic).I22 binding :veriloga;
inst (ether.PLL_250MHZ:schematic).I18 binding :verilogams;
inst (ether.PLL_250MHZ:schematic).I12 binding :verilogams;
inst (ether.PLL_250MHZ:schematic).I7 binding :behavioral;
inst (ether.PLL_250MHZ:schematic).I11 binding :veriloga;

inst (ether_sims.pll_250MHz_ams_sim:schematic).I29 binding :schematic;
cell ether_sims.PLL_VCO_250MHZ binding :verilogams;
cell ether_sims.PLL_PFD binding :verilog;
cell ether_sims.PLL_CP binding :verilogams;
cell ether_sims.PLL_ARST_DIG binding :verilog;
cell ether_sims.PLL_ARST binding :verilogams;
cell ether_sims.PLL_250MHZ_MDIV binding :verilog;
cell ether_sims.PLL_250MHZ_LF binding :verilogams;
cell ether_sims.PLL_250MHZ binding :schematic;


endconfig
