// Verilog-AMS netlist generated by the AMS netlister, version ICOA5.2.51.500.7.
// Cadence Design Systems, Inc.

`include "disciplines.vams"
 
module adc_lvlshft_1p0_to_2p5 ( CLK_1p0,BASE100TX_DIS_2p5,
BASE100TX_DIS_1p0,VDD_1p0,BASEFX_DIS_2p5,CLK_2p5,VDD_2p5,VSS,
BASEFX_DIS_1p0 ); 

input   CLK_1p0;
output   BASE100TX_DIS_2p5;
input  
 BASE100TX_DIS_1p0;
input   VDD_1p0;
output   BASEFX_DIS_2p5;
output  
 CLK_2p5;
input   VDD_2p5;
input   VSS;
input   BASEFX_DIS_1p0;

 
 
 
level_shifter_1p0_2p5 (*
integer library_binding = "ether";
 *)
I28 ( 
.IN( BASEFX_DIS_1p0 ), .VDD_1p0( VDD_1p0 ), .VDD_2p5( VDD_2p5 ), .OUT( 
BASEFX_DIS_2p5 ), .VSS( VSS ) );
level_shifter_1p0_2p5 (*
integer library_binding = "ether";
 *)
I2 ( .IN( 
BASE100TX_DIS_1p0 ), .VDD_1p0( VDD_1p0 ), .VDD_2p5( VDD_2p5 ), .OUT( 
BASE100TX_DIS_2p5 ), .VSS( VSS ) );
level_shifter_1p0_2p5 (*
integer library_binding = "ether";
 *)
I3 ( .IN( 
CLK_1p0 ), .VDD_1p0( VDD_1p0 ), .VDD_2p5( VDD_2p5 ), .OUT( CLK_2p5 ), 
.VSS( VSS ) );

endmodule
