// Verilog-AMS netlist generated by the AMS netlister, version ICOA5.2.51.500.7.
// Cadence Design Systems, Inc.

`include "disciplines.vams"
 
module NAND2BXL ( AN,.VDD(\VDD! ),Y,B,.VSS(\VSS! ) ); 

input   AN;
input  (*
integer inh_conn_prop_name = "VDD";
integer 
inh_conn_def_value = "cds_globals.\\VDD! ";
 *)
 \VDD! ;
output   Y;

input   B;
input  (*
integer inh_conn_prop_name = "VSS";
integer 
inh_conn_def_value = "cds_globals.\\VSS! ";
 *)
 \VSS! ;

wire n0;
wire n1;
wire (*
integer inh_conn_prop_name = "VDD";
integer inh_conn_def_value
 = "cds_globals.\\VDD! ";
 *)
\VDD! ;
wire AN;
wire Y;
wire B;
wire (*
integer inh_conn_prop_name = "VSS";
integer inh_conn_def_value
 = "cds_globals.\\VSS! ";
 *)
\VSS! ;
 
 
 
gpdk090_pmos1v #(.ps(920n), .m(1 * 1), .as(100.8f), .l(100n), .pd(920n),
 .ad(100.8f), .w(360n)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
mp1 ( Y, n0, \VDD! , \VDD!  );
gpdk090_pmos1v #(.ps(920n), .m(1 * 1), .as(100.8f), .l(100n), .pd(920n),
 .ad(100.8f), .w(360n)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
mp2 ( Y, B, \VDD! , \VDD!  );
gpdk090_pmos1v #(.ps(1.04u), .m(1 * 1), .as(69.6f), .l(1E-07), .pd(1.04u),
 .ad(69.6f), .w(120n)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
mp0 ( n0, AN, \VDD! , \VDD!  );
 
gpdk090_nmos1v #(.ps(800n), .m(1 * 1), .as(67.2f), .l(100n), .pd(800n),
 .ad(67.2f), .w(240n)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
mn2 ( Y, B, n1, \VSS!  );
gpdk090_nmos1v #(.ps(1.04u), .m(1 * 1), .as(69.6f), .l(1E-07), .pd(1.04u),
 .ad(69.6f), .w(120n)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
mn0 ( n0, AN, \VSS! , \VSS!  );
gpdk090_nmos1v #(.ps(800n), .m(1 * 1), .as(67.2f), .l(100n), .pd(800n),
 .ad(67.2f), .w(240n)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
mn1 ( n1, n0, \VSS! , \VSS!  );

endmodule
