// Verilog-AMS netlist generated by the AMS netlister, version ICOA5.2.51.500.7.
// Cadence Design Systems, Inc.

`include "disciplines.vams"
 
module AND2XL ( .VDD(\VDD! ),Y,B,.VSS(\VSS! ),A ); 

input  (*
integer inh_conn_prop_name = "VDD";
integer 
inh_conn_def_value = "cds_globals.\\VDD! ";
 *)
 \VDD! ;
output   Y;

input   B;
input  (*
integer inh_conn_prop_name = "VSS";
integer 
inh_conn_def_value = "cds_globals.\\VSS! ";
 *)
 \VSS! ;
input   A;

wire net57;
wire (*
integer inh_conn_prop_name = "VDD";
integer inh_conn_def_value
 = "cds_globals.\\VDD! ";
 *)
\VDD! ;
wire Y;
wire B;
wire (*
integer inh_conn_prop_name = "VSS";
integer inh_conn_def_value
 = "cds_globals.\\VSS! ";
 *)
\VSS! ;
wire A;
 
 
 
gpdk090_pmos1v #(.ps(1.04u), .m(1 * 1), .as(69.6f), .l(1E-07), .pd(1.04u),
 .ad(69.6f), .w(120n)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
mp1 ( net57, B, \VDD! , \VDD!  );
gpdk090_pmos1v #(.ps(1.04u), .m(1 * 1), .as(69.6f), .l(1E-07), .pd(1.04u),
 .ad(69.6f), .w(120n)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
mp0 ( net57, A, \VDD! , \VDD!  );
gpdk090_pmos1v #(.ps(1.04u), .m(1 * 1), .as(69.6f), .l(1E-07), .pd(1.04u),
 .ad(69.6f), .w(120n)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
mp2 ( Y, net57, \VDD! , \VDD!  );
 
gpdk090_nmos1v #(.ps(1.04u), .m(1 * 1), .as(69.6f), .l(1E-07), .pd(1.04u),
 .ad(69.6f), .w(120n)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
mn2 ( Y, net57, \VSS! , \VSS!  );
gpdk090_nmos1v #(.ps(1.04u), .m(1 * 1), .as(69.6f), .l(1E-07), .pd(1.04u),
 .ad(69.6f), .w(120n)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
mn0 ( net73, A, \VSS! , \VSS!  );
gpdk090_nmos1v #(.ps(1.04u), .m(1 * 1), .as(69.6f), .l(1E-07), .pd(1.04u),
 .ad(69.6f), .w(120n)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
mn1 ( net57, B, net73, \VSS!  );

endmodule
