// $Date: 1995/08/12 01:54:14 $
// $Revision: 1.7 $
//
//
//--------------------
// dac_6bit_ideal
//
// -  6 bit digital analog converter
//
// vd0..vd5:	data inputs [V,A]
// vout:	[V,A]
//
// INSTANCE parameters
//    vref   = reference voltage that conversion is with respect to [V]
//    vtrans = transition voltage between logic high and low [V]
//    tdel,trise,tfall = {usual} [s]
//
// MODEL parameters
//    {none}

`include "discipline.h"
`include "constants.h"

module lye_dac_6bits (vout, vd0, vd1, vd2, vd3, vd4, vd5 );

input vd0, vd1, vd2, vd3, vd4, vd5;
output vout;
electrical vout, vd0, vd1, vd2, vd3, vd4, vd5;

parameter real vref  = 0.8 from [0:inf);
parameter real trise = 500p from (0:inf);
parameter real tfall = 500p from (0:inf);
parameter real tdel  = 0 from [0:inf);
parameter real vtrans  = 1.25;

real out_scaled; // output scaled as fraction of 64

    analog begin
    @(initial_step)
	out_scaled = 0;

		out_scaled = 0;
		out_scaled = out_scaled + ((V(vd5) < vtrans) ? 32 : 0);
		out_scaled = out_scaled + ((V(vd4) > vtrans) ? 16 : 0);
		out_scaled = out_scaled + ((V(vd3) > vtrans) ? 8 : 0);
		out_scaled = out_scaled + ((V(vd2) > vtrans) ? 4 : 0);
		out_scaled = out_scaled + ((V(vd1) > vtrans) ? 2 : 0);
		out_scaled = out_scaled + ((V(vd0) > vtrans) ? 1 : 0);

		V(vout) <+ transition( (vref*out_scaled/63)-0.4, tdel, trise,
					tfall );
    end

endmodule





