// Verilog-AMS netlist generated by the AMS netlister, version ICOA5.2.51.500.7.
// Cadence Design Systems, Inc.

`include "disciplines.vams"
 
module trans_ld_bias_mux ( ibias_100tx_100u,ibias_tenbt,dvdd,
ibias_rext_100u,tenbt_on,dgnd,siddq,ibias_100tx,ibias_rext_400u,tx_on,
ibias_tenbt_cas ); 

output   ibias_100tx_100u;
output   ibias_tenbt;
input   dvdd;

input   ibias_rext_100u;
input   tenbt_on;
input   dgnd;
input  
 siddq;
output   ibias_100tx;
input   ibias_rext_400u;
input   tx_on;

output   ibias_tenbt_cas;

 
 
gpdk090_nmos2v #(.ps(48.2u), .m(1 * 2), .as(14.1p), .l(280.0n), .pd(24.1u),
 .ad(7.05p), .w(23.5u)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
NM5 ( ibias_rext_100u, d, dgnd, dgnd );
gpdk090_nmos2v #(.ps(48.2u), .m(1 * 2), .as(14.1p), .l(280.0n), .pd(24.1u),
 .ad(7.05p), .w(23.5u)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
NM3 ( ibias_rext_400u, e, dgnd, dgnd );
gpdk090_nmos2v #(.ps(30.125u), .m(1 * 8), .as(8.8125p), .l(280.0n), .pd(24.1u),
 .ad(7.05p), .w(23.5u)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
NM2 ( ibias_rext_400u, c, 
ibias_100tx, dgnd );
gpdk090_nmos2v #(.ps(30.125u), .m(1 * 8), .as(8.8125p), .l(280.0n), .pd(24.1u),
 .ad(7.05p), .w(23.5u)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
NM1 ( ibias_rext_400u, b, 
ibias_tenbt, dgnd );
 
gpdk090_pmos2v #(.ps(48.2u), .m(1 * 2), .as(14.1p), .l(280.0n), .pd(24.1u),
 .ad(7.05p), .w(23.5u)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
NM4 ( ibias_100tx_100u, c_inv, 
ibias_rext_100u, dvdd );
gpdk090_pmos2v #(.ps(48.2u), .m(1 * 2), .as(14.1p), .l(280.0n), .pd(24.1u),
 .ad(7.05p), .w(23.5u)) (*
integer library_binding = "gpdk090";

integer passed_mfactor = "m";
 *)
NM0 ( ibias_tenbt_cas, a, 
ibias_rext_100u, dvdd );
 
gpdk090_nmoscap2v #(.m(4 * 6), .l(12.865u), .w(12.825u)) (*
integer 
library_binding = "gpdk090";
integer passed_mfactor = "m";
 *)
C0 ( 
dgnd, dvdd, dgnd, dgnd );
 
nor2_1x_hv (*
integer library_binding = "ether";
integer cds_net_set
[0:1] = { "DVDD","DVSS" };
integer DVDD = "dvdd";
integer DVSS
 = "dgnd";
 *)
I9 ( .Y( e ), .B( c ), .A( b ) );
 
nand2_1x_hv (*
integer library_binding = "ether";
integer cds_net_set
[0:1] = { "DVSS","DVDD" };
integer DVSS = "dgnd";
integer DVDD
 = "dvdd";
 *)
I4 ( .Y( a ), .B( siddq_inv ), .A( tenbt_on ) );
 
and2_1x_hv (*
integer library_binding = "ether";
integer cds_net_set
[0:1] = { "DVDD","DVSS" };
integer DVDD = "dvdd";
integer DVSS
 = "dgnd";
 *)
I2 ( .Y( c ), .B( siddq_inv ), .A( tx_on ) );
and2_1x_hv (*
integer library_binding = "ether";
integer cds_net_set
[0:1] = { "DVDD","DVSS" };
integer DVDD = "dvdd";
integer DVSS
 = "dgnd";
 *)
I11 ( .Y( d ), .B( c_inv ), .A( a ) );
and2_1x_hv (*
integer library_binding = "ether";
integer cds_net_set
[0:1] = { "DVDD","DVSS" };
integer DVDD = "dvdd";
integer DVSS
 = "dgnd";
 *)
I1 ( .Y( b ), .B( siddq_inv ), .A( tenbt_on ) );
 
inv_4x_hv (*
integer library_binding = "ether";
integer cds_net_set
[0:1] = { "DVDD","DVSS" };
integer DVDD = "dvdd";
integer DVSS
 = "dgnd";
 *)
I0 ( .Y( siddq_inv ), .A( siddq ) );
inv_4x_hv (*
integer library_binding = "ether";
integer cds_net_set
[0:1] = { "DVSS","DVDD" };
integer DVSS = "dgnd";
integer DVDD
 = "dvdd";
 *)
I10 ( .Y( c_inv ), .A( c ) );

endmodule
