LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
LIBRARY IEEE;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;

package prim is

CONSTANT DefCombSpikeMsgOn : BOOLEAN := true;
CONSTANT DefCombSpikeXOn   : BOOLEAN := true;
CONSTANT DefSeqMsgOn       : BOOLEAN := true;
CONSTANT DefSeqXOn         : BOOLEAN := true;

CONSTANT DefDummyDelay    : VitalDelayType := 1.00 ns;
CONSTANT DefDummySetup    : VitalDelayType := 1.00 ns;
CONSTANT DefDummyHold     : VitalDelayType := 1.00 ns;
CONSTANT DefDummyWidth    : VitalDelayType := 1.00 ns;
CONSTANT DefDummyRecovery : VitalDelayType := 1.00 ns;
CONSTANT DefDummyRemoval  : VitalDelayType := 1.00 ns;
CONSTANT DefDummyIpd      : VitalDelayType := 0.00 ns;
CONSTANT DefDummyIsd      : VitalDelayType := 0.00 ns;
CONSTANT DefDummyIcd      : VitalDelayType := 0.00 ns;

CONSTANT udp_dff : VitalStateTableType (1 TO 21, 1 TO 7) := (
--    NOTIFIER   D      CLK     RN       S      Q(t)   Q(t+1)
     (  'X',    '-',    '-',    '-',    '-',    '-',    'X'  ),
     (  '-',    '-',    '-',    '-',    '1',    '-',    '1'  ),
     (  '-',    '-',    '-',    '1',    '0',    '-',    '0'  ),
     (  '-',    '0',    '/',    '-',    '0',    '-',    '0'  ),
     (  '-',    '1',    '/',    '0',    '-',    '-',    '1'  ),
     (  '-',    '1',    '*',    '0',    '-',    '1',    '1'  ),
     (  '-',    '0',    '*',    '-',    '0',    '0',    '0'  ),
     (  '-',    '-',    '\',   '-',    '-',    '-',    'S'  ),
     (  '-',    '*',    'B',    '-',    '-',    '-',    'S'  ),
     (  '-',    '-',    'B',    '0',    '*',    '1',    '1'  ),
     (  '-',    '1',    'X',    '0',    '*',    '1',    '1'  ),
     (  '-',    '-',    'B',    '*',    '0',    '0',    '0'  ),
     (  '-',    '0',    'X',    '*',    '0',    '0',    '0'  ),
     (  '-',    'B',    'r',    '-',    '-',    '-',    'X'  ),
     (  '-',    '/',    'X',    '-',    '-',    '-',    'X'  ),
     (  '-',    '-',    '-',    '-',    '*',    '-',    'X'  ),
     (  '-',    '-',    '-',    '*',    '-',    '-',    'X'  ),
     (  '-',    '-',    'f',    '-',    '-',    '-',    'X'  ),
     (  '-',    '\',   'X',    '0',    '-',    '-',    'X'  ),
     (  '-',    'B',    'X',    '-',    '-',    '-',    'S'  ),
     (  '-',    '-',    'S',    '-',    '-',    '-',    'S'  ));

CONSTANT udp_tlat : VitalStateTableType (1 TO 20, 1 TO 7) := (
--      NOT      D       G       R       S      Q(t)  Q(t+1)
     (  'X',    '-',    '-',    '-',    '-',    '-',    'X'  ),
     (  '-',    '-',    '-',    '-',    '1',    '-',    '1'  ),
     (  '-',    '-',    '-',    '1',    '0',    '-',    '0'  ),
     (  '-',    '1',    '1',    '0',    '-',    '-',    '1'  ),
     (  '-',    '0',    '1',    '-',    '0',    '-',    '0'  ),
     (  '-',    '1',    '*',    '0',    '-',    '1',    '1'  ),
     (  '-',    '0',    '*',    '-',    '0',    '0',    '0'  ),
     (  '-',    '*',    '0',    '-',    '-',    '-',    'S'  ),
     (  '-',    '-',    '0',    '0',    '*',    '1',    '1'  ),
     (  '-',    '1',    '-',    '0',    '*',    '1',    '1'  ),
     (  '-',    '-',    '0',    '*',    '0',    '0',    '0'  ),
     (  '-',    '0',    '-',    '*',    '0',    '0',    '0'  ),
     (  '-',    '0',    '-',    '-',    '0',    '0',    '0'  ),
     (  '-',    '1',    '-',    '0',    '-',    '1',    '1'  ),
     (  '-',    '*',    '-',    '-',    '-',    '-',    'X'  ),
     (  '-',    '-',    '-',    '*',    '-',    '-',    'X'  ),
     (  '-',    '-',    '-',    '-',    '*',    '-',    'X'  ),
     (  '-',    'B',    'r',    '0',    '0',    '-',    'X'  ),
     (  '-',    'B',    'X',    '0',    '0',    '-',    'S'  ),
     (  '-',    '-',    'S',    '-',    '-',    '-',    'S'  ) );

CONSTANT udp_rslat : VitalStateTableType (1 TO 12, 1 TO 5) := (
--      NOT      R       S      Q(t)  Q(t+1)
     (  'X',    '-',    '-',    '-',    'X'  ),
     (  '-',    '-',    '1',    '-',    '1'  ),
     (  '-',    '1',    '0',    '-',    '0'  ),
     (  '-',    '0',    '-',    '1',    '1'  ),
     (  '-',    '-',    '0',    '0',    '0'  ),
     (  '-',    '-',    '-',    '-',    'S'  ),
     (  '-',    '0',    '*',    '1',    '1'  ),
     (  '-',    '*',    '0',    '0',    '0'  ),
     (  '-',    '-',    '0',    '0',    '0'  ),
     (  '-',    '0',    '-',    '1',    '1'  ),
     (  '-',    '*',    '-',    '-',    'X'  ),
     (  '-',    '-',    '*',    '-',    'X'  ) );


end prim;

package body prim is

end prim;
LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ACHCONX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CON : VitalDelayType01 := (0.0467811 ns, 0.0475101 ns);
             tpd_B_CON : VitalDelayType01 := (0.0275006 ns, 0.025053 ns);
             tpd_CI_CON : VitalDelayType01 := (0.0162246 ns, 0.0140183 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CON : out std_ulogic);

   attribute VITAL_LEVEL0 of ACHCONX2 : entity is TRUE;
end ACHCONX2;

architecture behavioral of ACHCONX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE CON_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CON_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          n4_var := VitalOR2(n2_var, n3_var);
          CON_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CON,
               OutSignalName => "CON",
               OutTemp => CON_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CON,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CON,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CON,
                             TRUE)),
               GlitchData => CON_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFHX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0322839 ns, 0.0406843 ns);
             tpd_A_S : VitalDelayType01 := (0.0488577 ns, 0.0470021 ns);
             tpd_B_CO : VitalDelayType01 := (0.0327632 ns, 0.0403216 ns);
             tpd_B_S : VitalDelayType01 := (0.0487886 ns, 0.0463246 ns);
             tpd_CI_CO : VitalDelayType01 := (0.0304113 ns, 0.03624 ns);
             tpd_CI_S : VitalDelayType01 := (0.0460156 ns, 0.0452364 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFHX1 : entity is TRUE;
end ADDFHX1;

architecture behavioral of ADDFHX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFHX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0390924 ns, 0.0494724 ns);
             tpd_A_S : VitalDelayType01 := (0.0630397 ns, 0.0608054 ns);
             tpd_B_CO : VitalDelayType01 := (0.0395701 ns, 0.0493068 ns);
             tpd_B_S : VitalDelayType01 := (0.0630679 ns, 0.060081 ns);
             tpd_CI_CO : VitalDelayType01 := (0.0371296 ns, 0.0451872 ns);
             tpd_CI_S : VitalDelayType01 := (0.0604875 ns, 0.0592446 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFHX2 : entity is TRUE;
end ADDFHX2;

architecture behavioral of ADDFHX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFHX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0475362 ns, 0.0606842 ns);
             tpd_A_S : VitalDelayType01 := (0.0805833 ns, 0.0780144 ns);
             tpd_B_CO : VitalDelayType01 := (0.0479822 ns, 0.0606443 ns);
             tpd_B_S : VitalDelayType01 := (0.0806064 ns, 0.0772464 ns);
             tpd_CI_CO : VitalDelayType01 := (0.0455021 ns, 0.0565759 ns);
             tpd_CI_S : VitalDelayType01 := (0.0781502 ns, 0.0764855 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFHX4 : entity is TRUE;
end ADDFHX4;

architecture behavioral of ADDFHX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFHXL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.029846 ns, 0.0378953 ns);
             tpd_A_S : VitalDelayType01 := (0.044969 ns, 0.0434051 ns);
             tpd_B_CO : VitalDelayType01 := (0.0302814 ns, 0.0374898 ns);
             tpd_B_S : VitalDelayType01 := (0.0448354 ns, 0.0426925 ns);
             tpd_CI_CO : VitalDelayType01 := (0.0280377 ns, 0.0334169 ns);
             tpd_CI_S : VitalDelayType01 := (0.0421285 ns, 0.0416343 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFHXL : entity is TRUE;
end ADDFHXL;

architecture behavioral of ADDFHXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0349307 ns, 0.0450926 ns);
             tpd_A_S : VitalDelayType01 := (0.0549134 ns, 0.0535553 ns);
             tpd_B_CO : VitalDelayType01 := (0.0354109 ns, 0.0448167 ns);
             tpd_B_S : VitalDelayType01 := (0.0548903 ns, 0.0528865 ns);
             tpd_CI_CO : VitalDelayType01 := (0.0330613 ns, 0.0406601 ns);
             tpd_CI_S : VitalDelayType01 := (0.0523914 ns, 0.0520303 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFX1 : entity is TRUE;
end ADDFX1;

architecture behavioral of ADDFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0447274 ns, 0.0580249 ns);
             tpd_A_S : VitalDelayType01 := (0.0752534 ns, 0.0734345 ns);
             tpd_B_CO : VitalDelayType01 := (0.0452461 ns, 0.0580041 ns);
             tpd_B_S : VitalDelayType01 := (0.0754032 ns, 0.0728057 ns);
             tpd_CI_CO : VitalDelayType01 := (0.0427042 ns, 0.0537558 ns);
             tpd_CI_S : VitalDelayType01 := (0.0728978 ns, 0.0721376 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFX2 : entity is TRUE;
end ADDFX2;

architecture behavioral of ADDFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0475362 ns, 0.0606842 ns);
             tpd_A_S : VitalDelayType01 := (0.0805833 ns, 0.0780144 ns);
             tpd_B_CO : VitalDelayType01 := (0.0479822 ns, 0.0606443 ns);
             tpd_B_S : VitalDelayType01 := (0.0806064 ns, 0.0772464 ns);
             tpd_CI_CO : VitalDelayType01 := (0.0455021 ns, 0.0565759 ns);
             tpd_CI_S : VitalDelayType01 := (0.0781502 ns, 0.0764855 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFX4 : entity is TRUE;
end ADDFX4;

architecture behavioral of ADDFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFXL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0301882 ns, 0.0385195 ns);
             tpd_A_S : VitalDelayType01 := (0.0450251 ns, 0.043654 ns);
             tpd_B_CO : VitalDelayType01 := (0.0306442 ns, 0.0380763 ns);
             tpd_B_S : VitalDelayType01 := (0.044862 ns, 0.0429461 ns);
             tpd_CI_CO : VitalDelayType01 := (0.0284179 ns, 0.0340175 ns);
             tpd_CI_S : VitalDelayType01 := (0.0423462 ns, 0.0419505 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFXL : entity is TRUE;
end ADDFXL;

architecture behavioral of ADDFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDHX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0245034 ns, 0.0237175 ns);
             tpd_A_S : VitalDelayType01 := (0.0361537 ns, 0.0388151 ns);
             tpd_B_CO : VitalDelayType01 := (0.024124 ns, 0.0221729 ns);
             tpd_B_S : VitalDelayType01 := (0.0273282 ns, 0.0298583 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDHX1 : entity is TRUE;
end ADDHX1;

architecture behavioral of ADDHX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE CO_zd : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          CO_zd := VitalAND2(A_ipd, B_ipd);

          S_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDHX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0343804 ns, 0.0314805 ns);
             tpd_A_S : VitalDelayType01 := (0.0454203 ns, 0.0498654 ns);
             tpd_B_CO : VitalDelayType01 := (0.0337894 ns, 0.0300257 ns);
             tpd_B_S : VitalDelayType01 := (0.0357297 ns, 0.0396891 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDHX2 : entity is TRUE;
end ADDHX2;

architecture behavioral of ADDHX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE CO_zd : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          CO_zd := VitalAND2(A_ipd, B_ipd);

          S_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDHX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0372126 ns, 0.0330713 ns);
             tpd_A_S : VitalDelayType01 := (0.0595228 ns, 0.0653106 ns);
             tpd_B_CO : VitalDelayType01 := (0.0366184 ns, 0.0318307 ns);
             tpd_B_S : VitalDelayType01 := (0.0446373 ns, 0.0483002 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDHX4 : entity is TRUE;
end ADDHX4;

architecture behavioral of ADDHX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE CO_zd : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          CO_zd := VitalAND2(A_ipd, B_ipd);

          S_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDHXL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.019631 ns, 0.019625 ns);
             tpd_A_S : VitalDelayType01 := (0.0317485 ns, 0.0332497 ns);
             tpd_B_CO : VitalDelayType01 := (0.0193228 ns, 0.0179381 ns);
             tpd_B_S : VitalDelayType01 := (0.0230541 ns, 0.0248424 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDHXL : entity is TRUE;
end ADDHXL;

architecture behavioral of ADDHXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE CO_zd : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          CO_zd := VitalAND2(A_ipd, B_ipd);

          S_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0245308 ns, 0.0236567 ns);
             tpd_B_Y : VitalDelayType01 := (0.0241154 ns, 0.0220596 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2X1 : entity is TRUE;
end AND2X1;

architecture behavioral of AND2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0343943 ns, 0.0314248 ns);
             tpd_B_Y : VitalDelayType01 := (0.0337929 ns, 0.0298986 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2X2 : entity is TRUE;
end AND2X2;

architecture behavioral of AND2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0371136 ns, 0.0331458 ns);
             tpd_B_Y : VitalDelayType01 := (0.0364399 ns, 0.0316963 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2X4 : entity is TRUE;
end AND2X4;

architecture behavioral of AND2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0314438 ns, 0.02882 ns);
             tpd_B_Y : VitalDelayType01 := (0.0308938 ns, 0.0275132 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2X6 : entity is TRUE;
end AND2X6;

architecture behavioral of AND2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0371413 ns, 0.0332154 ns);
             tpd_B_Y : VitalDelayType01 := (0.0365308 ns, 0.0320371 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2X8 : entity is TRUE;
end AND2X8;

architecture behavioral of AND2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0196922 ns, 0.0196203 ns);
             tpd_B_Y : VitalDelayType01 := (0.0193196 ns, 0.0179632 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2XL : entity is TRUE;
end AND2XL;

architecture behavioral of AND2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0332159 ns, 0.0263483 ns);
             tpd_B_Y : VitalDelayType01 := (0.0329293 ns, 0.0250443 ns);
             tpd_C_Y : VitalDelayType01 := (0.0310894 ns, 0.0232251 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3X1 : entity is TRUE;
end AND3X1;

architecture behavioral of AND3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0466437 ns, 0.0340711 ns);
             tpd_B_Y : VitalDelayType01 := (0.0463492 ns, 0.0328023 ns);
             tpd_C_Y : VitalDelayType01 := (0.0444548 ns, 0.0312005 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3X2 : entity is TRUE;
end AND3X2;

architecture behavioral of AND3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.050276 ns, 0.0357654 ns);
             tpd_B_Y : VitalDelayType01 := (0.0498747 ns, 0.0343503 ns);
             tpd_C_Y : VitalDelayType01 := (0.0479845 ns, 0.0328152 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3X4 : entity is TRUE;
end AND3X4;

architecture behavioral of AND3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0421727 ns, 0.0312924 ns);
             tpd_B_Y : VitalDelayType01 := (0.0419018 ns, 0.0300432 ns);
             tpd_C_Y : VitalDelayType01 := (0.0399187 ns, 0.0283315 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3X6 : entity is TRUE;
end AND3X6;

architecture behavioral of AND3X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0498713 ns, 0.0356738 ns);
             tpd_B_Y : VitalDelayType01 := (0.0495652 ns, 0.034437 ns);
             tpd_C_Y : VitalDelayType01 := (0.0475938 ns, 0.0328134 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3X8 : entity is TRUE;
end AND3X8;

architecture behavioral of AND3X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0268246 ns, 0.0222781 ns);
             tpd_B_Y : VitalDelayType01 := (0.0263945 ns, 0.0209618 ns);
             tpd_C_Y : VitalDelayType01 := (0.0248451 ns, 0.0192215 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3XL : entity is TRUE;
end AND3XL;

architecture behavioral of AND3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0431826 ns, 0.0283076 ns);
             tpd_B_Y : VitalDelayType01 := (0.0425956 ns, 0.0273542 ns);
             tpd_C_Y : VitalDelayType01 := (0.0407244 ns, 0.0257593 ns);
             tpd_D_Y : VitalDelayType01 := (0.0378905 ns, 0.0240187 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4X1 : entity is TRUE;
end AND4X1;

architecture behavioral of AND4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0601663 ns, 0.0361808 ns);
             tpd_B_Y : VitalDelayType01 := (0.0593557 ns, 0.0348984 ns);
             tpd_C_Y : VitalDelayType01 := (0.0576379 ns, 0.033353 ns);
             tpd_D_Y : VitalDelayType01 := (0.0548646 ns, 0.0317432 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4X2 : entity is TRUE;
end AND4X2;

architecture behavioral of AND4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0647956 ns, 0.0378518 ns);
             tpd_B_Y : VitalDelayType01 := (0.0641211 ns, 0.0366851 ns);
             tpd_C_Y : VitalDelayType01 := (0.0623838 ns, 0.0351856 ns);
             tpd_D_Y : VitalDelayType01 := (0.0592804 ns, 0.0335332 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4X4 : entity is TRUE;
end AND4X4;

architecture behavioral of AND4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0553123 ns, 0.033569 ns);
             tpd_B_Y : VitalDelayType01 := (0.0546531 ns, 0.0325098 ns);
             tpd_C_Y : VitalDelayType01 := (0.0527587 ns, 0.0309334 ns);
             tpd_D_Y : VitalDelayType01 := (0.049533 ns, 0.0292244 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4X6 : entity is TRUE;
end AND4X6;

architecture behavioral of AND4X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0650602 ns, 0.0380079 ns);
             tpd_B_Y : VitalDelayType01 := (0.0644079 ns, 0.0368661 ns);
             tpd_C_Y : VitalDelayType01 := (0.0624793 ns, 0.0353133 ns);
             tpd_D_Y : VitalDelayType01 := (0.0592055 ns, 0.0336174 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4X8 : entity is TRUE;
end AND4X8;

architecture behavioral of AND4X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0346747 ns, 0.0238442 ns);
             tpd_B_Y : VitalDelayType01 := (0.0340589 ns, 0.0229825 ns);
             tpd_C_Y : VitalDelayType01 := (0.03259 ns, 0.0216437 ns);
             tpd_D_Y : VitalDelayType01 := (0.0300423 ns, 0.0199668 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4XL : entity is TRUE;
end AND4XL;

architecture behavioral of AND4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO21X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0284181 ns, 0.0368286 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0277445 ns, 0.0337808 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0191405 ns, 0.0288396 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO21X1 : entity is TRUE;
end AO21X1;

architecture behavioral of AO21X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          Y_zd := VitalOR2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO21X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0384817 ns, 0.0499646 ns);
             tpd_A1_Y : VitalDelayType01 := (0.037712 ns, 0.0471834 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0252713 ns, 0.0404699 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO21X2 : entity is TRUE;
end AO21X2;

architecture behavioral of AO21X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          Y_zd := VitalOR2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO21X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0411053 ns, 0.0526741 ns);
             tpd_A1_Y : VitalDelayType01 := (0.04039 ns, 0.0501195 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0269074 ns, 0.0429968 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO21X4 : entity is TRUE;
end AO21X4;

architecture behavioral of AO21X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          Y_zd := VitalOR2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO21XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0236394 ns, 0.0304933 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0231041 ns, 0.0274289 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0158316 ns, 0.0232433 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO21XL : entity is TRUE;
end AO21XL;

architecture behavioral of AO21XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          Y_zd := VitalOR2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO22X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0311507 ns, 0.0383314 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0305363 ns, 0.0359107 ns);
             tpd_B0_Y : VitalDelayType01 := (0.026302 ns, 0.0323831 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0256229 ns, 0.0298309 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO22X1 : entity is TRUE;
end AO22X1;

architecture behavioral of AO22X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          Y_zd := VitalOR2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO22X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0412777 ns, 0.0499346 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0405632 ns, 0.0477335 ns);
             tpd_B0_Y : VitalDelayType01 := (0.036163 ns, 0.0439099 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0353757 ns, 0.0415812 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO22X2 : entity is TRUE;
end AO22X2;

architecture behavioral of AO22X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          Y_zd := VitalOR2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO22X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0440832 ns, 0.0525718 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0432243 ns, 0.0503095 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0388714 ns, 0.0465756 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0381083 ns, 0.0443361 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO22X4 : entity is TRUE;
end AO22X4;

architecture behavioral of AO22X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          Y_zd := VitalOR2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO22XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0262639 ns, 0.0326992 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0255796 ns, 0.0300179 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0214611 ns, 0.026666 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0209736 ns, 0.0241434 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO22XL : entity is TRUE;
end AO22XL;

architecture behavioral of AO22XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          Y_zd := VitalOR2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI211X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0310929 ns, 0.0136732 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0266536 ns, 0.0132161 ns);
             tpd_B0_Y : VitalDelayType01 := (0.023207 ns, 0.00860546 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0188808 ns, 0.0067691 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI211X1 : entity is TRUE;
end AOI211X1;

architecture behavioral of AOI211X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          n2_var := VitalOR2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI211X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0309757 ns, 0.013464 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0266012 ns, 0.0129805 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0234556 ns, 0.00856954 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0182485 ns, 0.00648143 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI211X2 : entity is TRUE;
end AOI211X2;

architecture behavioral of AOI211X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          n2_var := VitalOR2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI211X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0307861 ns, 0.0134597 ns);
             tpd_A1_Y : VitalDelayType01 := (0.026433 ns, 0.0129947 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0232385 ns, 0.00854273 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0182952 ns, 0.00652188 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI211X4 : entity is TRUE;
end AOI211X4;

architecture behavioral of AOI211X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          n2_var := VitalOR2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI211XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0309167 ns, 0.0131874 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0264463 ns, 0.0127898 ns);
             tpd_B0_Y : VitalDelayType01 := (0.022899 ns, 0.00825794 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0186945 ns, 0.00645057 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI211XL : entity is TRUE;
end AOI211XL;

architecture behavioral of AOI211XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          n2_var := VitalOR2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI21X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0203353 ns, 0.0120414 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0172252 ns, 0.011553 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0139293 ns, 0.00594164 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI21X1 : entity is TRUE;
end AOI21X1;

architecture behavioral of AOI21X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI21X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0200481 ns, 0.0117949 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0169543 ns, 0.0113135 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0136919 ns, 0.00575791 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI21X2 : entity is TRUE;
end AOI21X2;

architecture behavioral of AOI21X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI21X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0200263 ns, 0.0118031 ns);
             tpd_A1_Y : VitalDelayType01 := (0.01689 ns, 0.0113054 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0137732 ns, 0.00580695 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI21X4 : entity is TRUE;
end AOI21X4;

architecture behavioral of AOI21X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI21XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0202109 ns, 0.0116397 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0169643 ns, 0.0110847 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0137714 ns, 0.00559795 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI21XL : entity is TRUE;
end AOI21XL;

architecture behavioral of AOI21XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI221X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0360362 ns, 0.0153612 ns);
             tpd_A1_Y : VitalDelayType01 := (0.031991 ns, 0.0148348 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0301975 ns, 0.0140637 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0263128 ns, 0.0135233 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0203363 ns, 0.00744453 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI221X1 : entity is TRUE;
end AOI221X1;

architecture behavioral of AOI221X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI221X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0347977 ns, 0.0144974 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0308447 ns, 0.0141037 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0289031 ns, 0.0132872 ns);
             tpd_B1_Y : VitalDelayType01 := (0.02497 ns, 0.0128111 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0191641 ns, 0.00684672 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI221X2 : entity is TRUE;
end AOI221X2;

architecture behavioral of AOI221X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI221X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0349943 ns, 0.0145987 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0308946 ns, 0.0141252 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0291366 ns, 0.0133997 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0249147 ns, 0.0127936 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0194417 ns, 0.00692047 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI221X4 : entity is TRUE;
end AOI221X4;

architecture behavioral of AOI221X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI221XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0359803 ns, 0.0148873 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0320579 ns, 0.0144475 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0300327 ns, 0.0136654 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0261414 ns, 0.0131757 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0200758 ns, 0.00716013 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI221XL : entity is TRUE;
end AOI221XL;

architecture behavioral of AOI221XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI222X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.039851 ns, 0.0180335 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0363554 ns, 0.0174063 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0344792 ns, 0.0160925 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0308613 ns, 0.0154111 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0247459 ns, 0.0119845 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0216599 ns, 0.0114456 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI222X1 : entity is TRUE;
end AOI222X1;

architecture behavioral of AOI222X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(C0_ipd, C1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(B0_ipd, B1_ipd);
          n4_var := VitalOR2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI222X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0386912 ns, 0.0173722 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0353681 ns, 0.0168422 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0333526 ns, 0.0154589 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0297115 ns, 0.0148543 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0240203 ns, 0.0114503 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0209346 ns, 0.0109736 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI222X2 : entity is TRUE;
end AOI222X2;

architecture behavioral of AOI222X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(C0_ipd, C1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(B0_ipd, B1_ipd);
          n4_var := VitalOR2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI222X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0390363 ns, 0.0174386 ns);
             tpd_A1_Y : VitalDelayType01 := (0.035456 ns, 0.0168265 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0336411 ns, 0.0155899 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0297297 ns, 0.0148712 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0244163 ns, 0.011588 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0211958 ns, 0.011045 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI222X4 : entity is TRUE;
end AOI222X4;

architecture behavioral of AOI222X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(C0_ipd, C1_ipd);
          n1_var := VitalAND2(A0_ipd, A1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(B0_ipd, B1_ipd);
          n4_var := VitalOR2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI222XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0399017 ns, 0.0175112 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0362989 ns, 0.0169719 ns);
             tpd_B0_Y : VitalDelayType01 := (0.034375 ns, 0.0156428 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0307303 ns, 0.015032 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0246967 ns, 0.0116016 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0213386 ns, 0.0110458 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI222XL : entity is TRUE;
end AOI222XL;

architecture behavioral of AOI222XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(C0_ipd, C1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(B0_ipd, B1_ipd);
          n4_var := VitalOR2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI22X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0234847 ns, 0.0145891 ns);
             tpd_A1_Y : VitalDelayType01 := (0.020648 ns, 0.0139768 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0176912 ns, 0.0101644 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0150561 ns, 0.00953369 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI22X1 : entity is TRUE;
end AOI22X1;

architecture behavioral of AOI22X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI22X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0231541 ns, 0.0144204 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0204342 ns, 0.0139276 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0176064 ns, 0.0101148 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0151477 ns, 0.00956501 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI22X2 : entity is TRUE;
end AOI22X2;

architecture behavioral of AOI22X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI22X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0231197 ns, 0.0144567 ns);
             tpd_A1_Y : VitalDelayType01 := (0.020375 ns, 0.0139153 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0177395 ns, 0.0102059 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0152108 ns, 0.00962075 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI22X4 : entity is TRUE;
end AOI22X4;

architecture behavioral of AOI22X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI22XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0233873 ns, 0.0141659 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0204743 ns, 0.0135689 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0175576 ns, 0.0097354 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0148797 ns, 0.00912122 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI22XL : entity is TRUE;
end AOI22XL;

architecture behavioral of AOI22XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB1X1 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0235827 ns, 0.032135 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0220334 ns, 0.0299195 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0156248 ns, 0.00726119 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB1X1 : entity is TRUE;
end AOI2BB1X1;

architecture behavioral of AOI2BB1X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB1X2 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0294796 ns, 0.0456136 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0279314 ns, 0.0432517 ns);
             tpd_B0_Y : VitalDelayType01 := (0.015531 ns, 0.00691074 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB1X2 : entity is TRUE;
end AOI2BB1X2;

architecture behavioral of AOI2BB1X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB1X4 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0311868 ns, 0.048464 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0296072 ns, 0.0460505 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0158221 ns, 0.00700314 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB1X4 : entity is TRUE;
end AOI2BB1X4;

architecture behavioral of AOI2BB1X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB1XL is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0202789 ns, 0.0255381 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0185796 ns, 0.0234845 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0152493 ns, 0.006987 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB1XL : entity is TRUE;
end AOI2BB1XL;

architecture behavioral of AOI2BB1XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB2X1 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0319312 ns, 0.0309688 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0295611 ns, 0.0294369 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0173488 ns, 0.00996747 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0148124 ns, 0.00936295 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB2X1 : entity is TRUE;
end AOI2BB2X1;

architecture behavioral of AOI2BB2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB2X2 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.038242 ns, 0.039964 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0359791 ns, 0.0381753 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0173687 ns, 0.00993487 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0148505 ns, 0.00933229 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB2X2 : entity is TRUE;
end AOI2BB2X2;

architecture behavioral of AOI2BB2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB2X4 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0399815 ns, 0.0417722 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0376862 ns, 0.0399097 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0175004 ns, 0.0100571 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0148725 ns, 0.00938808 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB2X4 : entity is TRUE;
end AOI2BB2X4;

architecture behavioral of AOI2BB2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB2XL is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0284099 ns, 0.026152 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0260088 ns, 0.0248548 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0172294 ns, 0.00954181 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0146642 ns, 0.00899401 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB2XL : entity is TRUE;
end AOI2BB2XL;

architecture behavioral of AOI2BB2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI31X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0238181 ns, 0.0172451 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0215371 ns, 0.0169112 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0181393 ns, 0.0150925 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0148657 ns, 0.00594278 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI31X1 : entity is TRUE;
end AOI31X1;

architecture behavioral of AOI31X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI31X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0239593 ns, 0.0171136 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0216178 ns, 0.0168084 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0182212 ns, 0.0149191 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0146719 ns, 0.00574541 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI31X2 : entity is TRUE;
end AOI31X2;

architecture behavioral of AOI31X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI31X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0244737 ns, 0.0179478 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0218225 ns, 0.0173879 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0183274 ns, 0.015456 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0150501 ns, 0.00593966 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI31X4 : entity is TRUE;
end AOI31X4;

architecture behavioral of AOI31X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI31XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0239985 ns, 0.0169313 ns);
             tpd_A1_Y : VitalDelayType01 := (0.021428 ns, 0.0164744 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0179895 ns, 0.0146792 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0148723 ns, 0.005703 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI31XL : entity is TRUE;
end AOI31XL;

architecture behavioral of AOI31XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI32X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0266555 ns, 0.0207297 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0245506 ns, 0.0203115 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0215823 ns, 0.0183473 ns);
             tpd_B0_Y : VitalDelayType01 := (0.01872 ns, 0.0102322 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0161495 ns, 0.00961951 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI32X1 : entity is TRUE;
end AOI32X1;

architecture behavioral of AOI32X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI32X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0266991 ns, 0.0206232 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0245479 ns, 0.0202206 ns);
             tpd_A2_Y : VitalDelayType01 := (0.02164 ns, 0.0182604 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0186662 ns, 0.0100729 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0162457 ns, 0.00955829 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI32X2 : entity is TRUE;
end AOI32X2;

architecture behavioral of AOI32X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI32X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0267114 ns, 0.020529 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0244435 ns, 0.0200952 ns);
             tpd_A2_Y : VitalDelayType01 := (0.021565 ns, 0.0181733 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0187783 ns, 0.0101023 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0162884 ns, 0.00955037 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI32X4 : entity is TRUE;
end AOI32X4;

architecture behavioral of AOI32X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI32XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0267277 ns, 0.0203247 ns);
             tpd_A1_Y : VitalDelayType01 := (0.024491 ns, 0.0199162 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0214989 ns, 0.0179873 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0186293 ns, 0.00989573 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0161055 ns, 0.00939717 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI32XL : entity is TRUE;
end AOI32XL;

architecture behavioral of AOI32XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI33X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0301014 ns, 0.0239703 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0281402 ns, 0.0236236 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0251926 ns, 0.0215351 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0223561 ns, 0.0155844 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0204638 ns, 0.0153255 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0177203 ns, 0.0135775 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI33X1 : entity is TRUE;
end AOI33X1;

architecture behavioral of AOI33X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n2_var, B2_ipd);
          n4_var := VitalOR2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI33X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0302048 ns, 0.0238694 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0280775 ns, 0.0234557 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0252869 ns, 0.0214363 ns);
             tpd_B0_Y : VitalDelayType01 := (0.02212 ns, 0.015263 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0202682 ns, 0.0149833 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0176091 ns, 0.0132549 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI33X2 : entity is TRUE;
end AOI33X2;

architecture behavioral of AOI33X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n2_var, B2_ipd);
          n4_var := VitalOR2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI33X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0302315 ns, 0.0237446 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0280202 ns, 0.0233126 ns);
             tpd_A2_Y : VitalDelayType01 := (0.025284 ns, 0.0213483 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0223571 ns, 0.015348 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0202912 ns, 0.0149749 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0176366 ns, 0.01326 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI33X4 : entity is TRUE;
end AOI33X4;

architecture behavioral of AOI33X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n2_var, B2_ipd);
          n4_var := VitalOR2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI33XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0299808 ns, 0.0233947 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0279083 ns, 0.0230759 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0249852 ns, 0.0210419 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0221577 ns, 0.0151143 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0202997 ns, 0.014859 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0175491 ns, 0.0131736 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI33XL : entity is TRUE;
end AOI33XL;

architecture behavioral of AOI33XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n2_var, B2_ipd);
          n4_var := VitalOR2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BMXIX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_M0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_M1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_X2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_PPN : VitalDelayType01 := (0.0529861 ns, 0.0634647 ns);
             tpd_M0_PPN : VitalDelayType01 := (0.0545359 ns, 0.0589066 ns);
             tpd_M1_PPN : VitalDelayType01 := (0.0548078 ns, 0.0585744 ns);
             tpd_S_PPN : VitalDelayType01 := (0.053425 ns, 0.0632076 ns);
             tpd_X2_PPN : VitalDelayType01 := (0.0416212 ns, 0.0386512 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         M0 : in std_ulogic := 'U' ;
         M1 : in std_ulogic := 'U' ;
         S : in std_ulogic := 'U' ;
         X2 : in std_ulogic := 'U' ;
         PPN : out std_ulogic);

   attribute VITAL_LEVEL0 of BMXIX2 : entity is TRUE;
end BMXIX2;

architecture behavioral of BMXIX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL M0_ipd : std_ulogic := 'X';
   SIGNAL M1_ipd : std_ulogic := 'X';
   SIGNAL S_ipd : std_ulogic := 'X';
   SIGNAL X2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( M0_ipd, M0, tipd_M0 );
   VitalWireDelay( M1_ipd, M1, tipd_M1 );
   VitalWireDelay( S_ipd, S, tipd_S );
   VitalWireDelay( X2_ipd, X2, tipd_X2 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, M0_ipd, M1_ipd, S_ipd, X2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE PPN_zd : std_ulogic;

      -- path delay section variables
      VARIABLE PPN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(A_ipd, S_ipd, M0_ipd);
          n1_var := VitalMUX2(A_ipd, S_ipd, M1_ipd);
          PPN_zd := VitalMUX2(n0_var, n1_var, X2_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => PPN,
               OutSignalName => "PPN",
               OutTemp => PPN_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_PPN,
                             TRUE),
                      1 => ( M0_ipd'LAST_EVENT,
                             tpd_M0_PPN,
                             TRUE),
                      2 => ( M1_ipd'LAST_EVENT,
                             tpd_M1_PPN,
                             TRUE),
                      3 => ( S_ipd'LAST_EVENT,
                             tpd_S_PPN,
                             TRUE),
                      4 => ( X2_ipd'LAST_EVENT,
                             tpd_X2_PPN,
                             TRUE)),
               GlitchData => PPN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BMXIX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_M0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_M1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_X2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_PPN : VitalDelayType01 := (0.0792098 ns, 0.0970437 ns);
             tpd_M0_PPN : VitalDelayType01 := (0.0804339 ns, 0.0919724 ns);
             tpd_M1_PPN : VitalDelayType01 := (0.0808797 ns, 0.0924065 ns);
             tpd_S_PPN : VitalDelayType01 := (0.0796005 ns, 0.0967269 ns);
             tpd_X2_PPN : VitalDelayType01 := (0.0632544 ns, 0.066584 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         M0 : in std_ulogic := 'U' ;
         M1 : in std_ulogic := 'U' ;
         S : in std_ulogic := 'U' ;
         X2 : in std_ulogic := 'U' ;
         PPN : out std_ulogic);

   attribute VITAL_LEVEL0 of BMXIX4 : entity is TRUE;
end BMXIX4;

architecture behavioral of BMXIX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL M0_ipd : std_ulogic := 'X';
   SIGNAL M1_ipd : std_ulogic := 'X';
   SIGNAL S_ipd : std_ulogic := 'X';
   SIGNAL X2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( M0_ipd, M0, tipd_M0 );
   VitalWireDelay( M1_ipd, M1, tipd_M1 );
   VitalWireDelay( S_ipd, S, tipd_S );
   VitalWireDelay( X2_ipd, X2, tipd_X2 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, M0_ipd, M1_ipd, S_ipd, X2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE PPN_zd : std_ulogic;

      -- path delay section variables
      VARIABLE PPN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(A_ipd, S_ipd, M0_ipd);
          n1_var := VitalMUX2(A_ipd, S_ipd, M1_ipd);
          PPN_zd := VitalMUX2(n0_var, n1_var, X2_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => PPN,
               OutSignalName => "PPN",
               OutTemp => PPN_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_PPN,
                             TRUE),
                      1 => ( M0_ipd'LAST_EVENT,
                             tpd_M0_PPN,
                             TRUE),
                      2 => ( M1_ipd'LAST_EVENT,
                             tpd_M1_PPN,
                             TRUE),
                      3 => ( S_ipd'LAST_EVENT,
                             tpd_S_PPN,
                             TRUE),
                      4 => ( X2_ipd'LAST_EVENT,
                             tpd_X2_PPN,
                             TRUE)),
               GlitchData => PPN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0261015 ns, 0.0309462 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX12 : entity is TRUE;
end BUFX12;

architecture behavioral of BUFX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX16 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.045791 ns, 0.0547776 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX16 : entity is TRUE;
end BUFX16;

architecture behavioral of BUFX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.024235 ns, 0.0291277 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX2 : entity is TRUE;
end BUFX2;

architecture behavioral of BUFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX20 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0261963 ns, 0.0311148 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX20 : entity is TRUE;
end BUFX20;

architecture behavioral of BUFX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0224964 ns, 0.0264673 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX3 : entity is TRUE;
end BUFX3;

architecture behavioral of BUFX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0259127 ns, 0.0308365 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX4 : entity is TRUE;
end BUFX4;

architecture behavioral of BUFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0223224 ns, 0.0262689 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX6 : entity is TRUE;
end BUFX6;

architecture behavioral of BUFX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.025888 ns, 0.0307367 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX8 : entity is TRUE;
end BUFX8;

architecture behavioral of BUFX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0240488 ns, 0.0365505 ns);
             tpd_B_Y : VitalDelayType01 := (0.0233328 ns, 0.0331583 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X12 : entity is TRUE;
end CLKAND2X12;

architecture behavioral of CLKAND2X12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0225077 ns, 0.0346612 ns);
             tpd_B_Y : VitalDelayType01 := (0.0219619 ns, 0.0313395 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X2 : entity is TRUE;
end CLKAND2X2;

architecture behavioral of CLKAND2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0208436 ns, 0.031838 ns);
             tpd_B_Y : VitalDelayType01 := (0.0203122 ns, 0.0285742 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X3 : entity is TRUE;
end CLKAND2X3;

architecture behavioral of CLKAND2X3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.023555 ns, 0.036051 ns);
             tpd_B_Y : VitalDelayType01 := (0.0230131 ns, 0.0329063 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X4 : entity is TRUE;
end CLKAND2X4;

architecture behavioral of CLKAND2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0210232 ns, 0.0322339 ns);
             tpd_B_Y : VitalDelayType01 := (0.020402 ns, 0.0287367 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X6 : entity is TRUE;
end CLKAND2X6;

architecture behavioral of CLKAND2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0238566 ns, 0.0365026 ns);
             tpd_B_Y : VitalDelayType01 := (0.0232365 ns, 0.0331012 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X8 : entity is TRUE;
end CLKAND2X8;

architecture behavioral of CLKAND2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0261015 ns, 0.0309462 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX12 : entity is TRUE;
end CLKBUFX12;

architecture behavioral of CLKBUFX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX16 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.045791 ns, 0.0547776 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX16 : entity is TRUE;
end CLKBUFX16;

architecture behavioral of CLKBUFX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.024235 ns, 0.0291277 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX2 : entity is TRUE;
end CLKBUFX2;

architecture behavioral of CLKBUFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX20 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0261963 ns, 0.0311148 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX20 : entity is TRUE;
end CLKBUFX20;

architecture behavioral of CLKBUFX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0224964 ns, 0.0264673 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX3 : entity is TRUE;
end CLKBUFX3;

architecture behavioral of CLKBUFX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0259127 ns, 0.0308365 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX4 : entity is TRUE;
end CLKBUFX4;

architecture behavioral of CLKBUFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0223224 ns, 0.0262689 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX6 : entity is TRUE;
end CLKBUFX6;

architecture behavioral of CLKBUFX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.025888 ns, 0.0307367 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX8 : entity is TRUE;
end CLKBUFX8;

architecture behavioral of CLKBUFX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.00917154 ns, 0.00501213 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX1 : entity is TRUE;
end CLKINVX1;

architecture behavioral of CLKINVX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.00891245 ns, 0.00481409 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX12 : entity is TRUE;
end CLKINVX12;

architecture behavioral of CLKINVX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX16 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0323955 ns, 0.016906 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX16 : entity is TRUE;
end CLKINVX16;

architecture behavioral of CLKINVX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0087899 ns, 0.00466743 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX2 : entity is TRUE;
end CLKINVX2;

architecture behavioral of CLKINVX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX20 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.009022 ns, 0.00493098 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX20 : entity is TRUE;
end CLKINVX20;

architecture behavioral of CLKINVX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.00904545 ns, 0.00492998 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX3 : entity is TRUE;
end CLKINVX3;

architecture behavioral of CLKINVX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.00880897 ns, 0.00468587 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX4 : entity is TRUE;
end CLKINVX4;

architecture behavioral of CLKINVX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.00906901 ns, 0.0049523 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX6 : entity is TRUE;
end CLKINVX6;

architecture behavioral of CLKINVX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.00899157 ns, 0.00488298 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX8 : entity is TRUE;
end CLKINVX8;

architecture behavioral of CLKINVX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.105841 ns, 0.134777 ns);
             tpd_B_Y : VitalDelayType01 := (0.105492 ns, 0.13481 ns);
             tpd_S0_Y : VitalDelayType01 := (0.10604 ns, 0.129472 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X12 : entity is TRUE;
end CLKMX2X12;

architecture behavioral of CLKMX2X12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0383702 ns, 0.0489233 ns);
             tpd_B_Y : VitalDelayType01 := (0.0379384 ns, 0.0493415 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0396562 ns, 0.0445844 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X2 : entity is TRUE;
end CLKMX2X2;

architecture behavioral of CLKMX2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0361402 ns, 0.0444887 ns);
             tpd_B_Y : VitalDelayType01 := (0.0353754 ns, 0.0455653 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0392414 ns, 0.0420767 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X3 : entity is TRUE;
end CLKMX2X3;

architecture behavioral of CLKMX2X3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0475479 ns, 0.0592521 ns);
             tpd_B_Y : VitalDelayType01 := (0.0468623 ns, 0.0597372 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0496572 ns, 0.0557775 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X4 : entity is TRUE;
end CLKMX2X4;

architecture behavioral of CLKMX2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0624593 ns, 0.0785285 ns);
             tpd_B_Y : VitalDelayType01 := (0.0617164 ns, 0.0788962 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0644145 ns, 0.0747418 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X6 : entity is TRUE;
end CLKMX2X6;

architecture behavioral of CLKMX2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0771154 ns, 0.0973578 ns);
             tpd_B_Y : VitalDelayType01 := (0.0762563 ns, 0.0976559 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0787891 ns, 0.0935402 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X8 : entity is TRUE;
end CLKMX2X8;

architecture behavioral of CLKMX2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKXOR2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0361634 ns, 0.0387742 ns);
             tpd_B_Y : VitalDelayType01 := (0.0270351 ns, 0.0295847 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKXOR2X1 : entity is TRUE;
end CLKXOR2X1;

architecture behavioral of CLKXOR2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKXOR2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0453306 ns, 0.0498141 ns);
             tpd_B_Y : VitalDelayType01 := (0.0357049 ns, 0.0397805 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKXOR2X2 : entity is TRUE;
end CLKXOR2X2;

architecture behavioral of CLKXOR2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKXOR2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0604453 ns, 0.0669008 ns);
             tpd_B_Y : VitalDelayType01 := (0.0473585 ns, 0.0523642 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKXOR2X4 : entity is TRUE;
end CLKXOR2X4;

architecture behavioral of CLKXOR2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKXOR2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0911762 ns, 0.103959 ns);
             tpd_B_Y : VitalDelayType01 := (0.0774098 ns, 0.0891391 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKXOR2X8 : entity is TRUE;
end CLKXOR2X8;

architecture behavioral of CLKXOR2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0524619 ns;
             tpw_CK_negedge : VitalDelayType := 0.0615605 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0582937 ns, 0.068023 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFHQX1 : entity is TRUE;
end DFFHQX1;

architecture behavioral of DFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0551719 ns;
             tpw_CK_negedge : VitalDelayType := 0.0613936 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.063169 ns, 0.0736761 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFHQX2 : entity is TRUE;
end DFFHQX2;

architecture behavioral of DFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0003 := VitalINV(P0002);

          Q_zd := VitalINV(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0597787 ns;
             tpw_CK_negedge : VitalDelayType := 0.0616383 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0693278 ns, 0.0768358 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFHQX4 : entity is TRUE;
end DFFHQX4;

architecture behavioral of DFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0690619 ns;
             tpw_CK_negedge : VitalDelayType := 0.0615501 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0817276 ns, 0.0866652 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFHQX8 : entity is TRUE;
end DFFHQX8;

architecture behavioral of DFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFNSRX1 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             tpw_CKN_posedge : VitalDelayType := 0.0439179 ns;
             tpw_CKN_negedge : VitalDelayType := 0.0572214 ns;
             tpw_RN_negedge : VitalDelayType := 0.0645449 ns;
             tpw_SN_negedge : VitalDelayType := 0.0481752 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.0688227 ns, 0.0639998 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.0803826 ns, 0.0829892 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0786352 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0949981 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0628577 ns, 0.0644852 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0808379 ns, 0.0767924 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFNSRX1 : entity is TRUE;
end DFFNSRX1;

architecture behavioral of DFFNSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0002 := VitalINV(P0001);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFNSRX2 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             tpw_CKN_posedge : VitalDelayType := 0.0446608 ns;
             tpw_CKN_negedge : VitalDelayType := 0.0649119 ns;
             tpw_RN_negedge : VitalDelayType := 0.0720184 ns;
             tpw_SN_negedge : VitalDelayType := 0.0558324 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.0726649 ns, 0.0674049 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.0927904 ns, 0.0966835 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0829883 ns);
             tpd_RN_QN : VitalDelayType01 := (0.108418 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0677399 ns, 0.0687957 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0942266 ns, 0.0914027 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFNSRX2 : entity is TRUE;
end DFFNSRX2;

architecture behavioral of DFFNSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0002 := VitalINV(P0001);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFNSRX4 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             tpw_CKN_posedge : VitalDelayType := 0.0443262 ns;
             tpw_CKN_negedge : VitalDelayType := 0.0739565 ns;
             tpw_RN_negedge : VitalDelayType := 0.0770447 ns;
             tpw_SN_negedge : VitalDelayType := 0.0626198 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.0825072 ns, 0.0771077 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.104413 ns, 0.108228 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0926272 ns);
             tpd_RN_QN : VitalDelayType01 := (0.11997 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0781722 ns, 0.0788773 ns);
             tpd_SN_QN : VitalDelayType01 := (0.106217 ns, 0.103488 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFNSRX4 : entity is TRUE;
end DFFNSRX4;

architecture behavioral of DFFNSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFNSRXL is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             tpw_CKN_posedge : VitalDelayType := 0.0439277 ns;
             tpw_CKN_negedge : VitalDelayType := 0.0522214 ns;
             tpw_RN_negedge : VitalDelayType := 0.059633 ns;
             tpw_SN_negedge : VitalDelayType := 0.0434922 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.0644237 ns, 0.0590658 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.0703912 ns, 0.073282 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0737402 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0850478 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0586468 ns, 0.0595539 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0708637 ns, 0.0674309 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFNSRXL : entity is TRUE;
end DFFNSRXL;

architecture behavioral of DFFNSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0002 := VitalINV(P0001);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0481707 ns;
             tpw_CK_negedge : VitalDelayType := 0.0554589 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0563581 ns, 0.0637076 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFQX1 : entity is TRUE;
end DFFQX1;

architecture behavioral of DFFQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0511923 ns;
             tpw_CK_negedge : VitalDelayType := 0.0554071 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0614422 ns, 0.0674664 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFQX2 : entity is TRUE;
end DFFQX2;

architecture behavioral of DFFQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0003 := VitalINV(P0002);

          Q_zd := VitalINV(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0573307 ns;
             tpw_CK_negedge : VitalDelayType := 0.0555528 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0692398 ns, 0.0729807 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFQX4 : entity is TRUE;
end DFFQX4;

architecture behavioral of DFFQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFQXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0460697 ns;
             tpw_CK_negedge : VitalDelayType := 0.055533 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0526872 ns, 0.0594362 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFQXL : entity is TRUE;
end DFFQXL;

architecture behavioral of DFFQXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFQXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFQXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0531938 ns;
             tpw_CK_negedge : VitalDelayType := 0.0613936 ns;
             tpw_RN_negedge : VitalDelayType := 0.0354312 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0662714 ns, 0.0692159 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0250427 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRHQX1 : entity is TRUE;
end DFFRHQX1;

architecture behavioral of DFFRHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0560761 ns;
             tpw_CK_negedge : VitalDelayType := 0.061528 ns;
             tpw_RN_negedge : VitalDelayType := 0.0383655 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0737151 ns, 0.0749659 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0303771 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRHQX2 : entity is TRUE;
end DFFRHQX2;

architecture behavioral of DFFRHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0002 := VitalINV(P0001);

          Q_zd := VitalINV(P0002);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0604429 ns;
             tpw_CK_negedge : VitalDelayType := 0.0616343 ns;
             tpw_RN_negedge : VitalDelayType := 0.0390631 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0783753 ns, 0.0780735 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0281408 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRHQX4 : entity is TRUE;
end DFFRHQX4;

architecture behavioral of DFFRHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0714861 ns;
             tpw_CK_negedge : VitalDelayType := 0.0620504 ns;
             tpw_RN_negedge : VitalDelayType := 0.0432602 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0914801 ns, 0.0881569 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0286327 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRHQX8 : entity is TRUE;
end DFFRHQX8;

architecture behavioral of DFFRHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX8",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0588798 ns;
             tpw_CK_negedge : VitalDelayType := 0.055631 ns;
             tpw_RN_negedge : VitalDelayType := 0.0383967 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0701171 ns, 0.0687667 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0848065 ns, 0.0854101 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0318357 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0484137 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRX1 : entity is TRUE;
end DFFRX1;

architecture behavioral of DFFRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0677624 ns;
             tpw_CK_negedge : VitalDelayType := 0.0554338 ns;
             tpw_RN_negedge : VitalDelayType := 0.0426324 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0746618 ns, 0.071127 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0961189 ns, 0.100663 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0325128 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0581809 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRX2 : entity is TRUE;
end DFFRX2;

architecture behavioral of DFFRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.075086 ns;
             tpw_CK_negedge : VitalDelayType := 0.0553912 ns;
             tpw_RN_negedge : VitalDelayType := 0.0420692 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0819095 ns, 0.0769857 ns);
             tpd_CK_QN : VitalDelayType01 := (0.104927 ns, 0.108973 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0298668 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0582867 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRX4 : entity is TRUE;
end DFFRX4;

architecture behavioral of DFFRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0540436 ns;
             tpw_CK_negedge : VitalDelayType := 0.0556368 ns;
             tpw_RN_negedge : VitalDelayType := 0.0366247 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0652211 ns, 0.0646298 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0757241 ns, 0.0745634 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0277709 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0391824 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRXL : entity is TRUE;
end DFFRXL;

architecture behavioral of DFFRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRXL",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0544919 ns;
             tpw_CK_negedge : VitalDelayType := 0.0639847 ns;
             tpw_SN_negedge : VitalDelayType := 0.0340088 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0583059 ns, 0.0719247 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0517504 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSHQX1 : entity is TRUE;
end DFFSHQX1;

architecture behavioral of DFFSHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.057475 ns;
             tpw_CK_negedge : VitalDelayType := 0.0639813 ns;
             tpw_SN_negedge : VitalDelayType := 0.0368067 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0633391 ns, 0.077963 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0571931 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSHQX2 : entity is TRUE;
end DFFSHQX2;

architecture behavioral of DFFSHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0628658 ns;
             tpw_CK_negedge : VitalDelayType := 0.0641061 ns;
             tpw_SN_negedge : VitalDelayType := 0.0405689 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0694135 ns, 0.0827192 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0635043 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSHQX4 : entity is TRUE;
end DFFSHQX4;

architecture behavioral of DFFSHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0734632 ns;
             tpw_CK_negedge : VitalDelayType := 0.0639701 ns;
             tpw_SN_negedge : VitalDelayType := 0.0488191 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0820938 ns, 0.0951827 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0778774 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSHQX8 : entity is TRUE;
end DFFSHQX8;

architecture behavioral of DFFSHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX8",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0548808 ns;
             tpw_CK_negedge : VitalDelayType := 0.0642205 ns;
             tpw_RN_negedge : VitalDelayType := 0.0582132 ns;
             tpw_SN_negedge : VitalDelayType := 0.0376053 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0608252 ns, 0.0710231 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0760389 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0555707 ns, 0.0576513 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRHQX1 : entity is TRUE;
end DFFSRHQX1;

architecture behavioral of DFFSRHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE N35 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N35 := n0_vec(1);

          P0002 := VitalINV(N35);

          Q_zd := VitalINV(P0002);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0583499 ns;
             tpw_CK_negedge : VitalDelayType := 0.0640147 ns;
             tpw_RN_negedge : VitalDelayType := 0.0616293 ns;
             tpw_SN_negedge : VitalDelayType := 0.0405759 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0671136 ns, 0.0776205 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0829284 ns);
             tpd_SN_Q : VitalDelayType01 := (0.061484 ns, 0.064555 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRHQX2 : entity is TRUE;
end DFFSRHQX2;

architecture behavioral of DFFSRHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0641558 ns;
             tpw_CK_negedge : VitalDelayType := 0.0642828 ns;
             tpw_RN_negedge : VitalDelayType := 0.0644688 ns;
             tpw_SN_negedge : VitalDelayType := 0.0444735 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0747178 ns, 0.0824283 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0892975 ns);
             tpd_SN_Q : VitalDelayType01 := (0.06846 ns, 0.070955 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRHQX4 : entity is TRUE;
end DFFSRHQX4;

architecture behavioral of DFFSRHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0753246 ns;
             tpw_CK_negedge : VitalDelayType := 0.0641987 ns;
             tpw_RN_negedge : VitalDelayType := 0.0720624 ns;
             tpw_SN_negedge : VitalDelayType := 0.052866 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0898382 ns, 0.0947305 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.104571 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0836041 ns, 0.0862305 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRHQX8 : entity is TRUE;
end DFFSRHQX8;

architecture behavioral of DFFSRHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0609646 ns;
             tpw_CK_negedge : VitalDelayType := 0.0584866 ns;
             tpw_RN_negedge : VitalDelayType := 0.0656862 ns;
             tpw_SN_negedge : VitalDelayType := 0.0482199 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00101052 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0633108 ns, 0.0715396 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0879422 ns, 0.0774147 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0791703 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0955764 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0626101 ns, 0.0646571 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0810633 ns, 0.0765034 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRX1 : entity is TRUE;
end DFFSRX1;

architecture behavioral of DFFSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0686334 ns;
             tpw_CK_negedge : VitalDelayType := 0.0582778 ns;
             tpw_RN_negedge : VitalDelayType := 0.071394 ns;
             tpw_SN_negedge : VitalDelayType := 0.0553731 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0684113 ns, 0.0750279 ns);
             tpd_CK_QN : VitalDelayType01 := (0.100427 ns, 0.0923199 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0826131 ns);
             tpd_RN_QN : VitalDelayType01 := (0.108055 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0671772 ns, 0.0681374 ns);
             tpd_SN_QN : VitalDelayType01 := (0.093588 ns, 0.0910177 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRX2 : entity is TRUE;
end DFFSRX2;

architecture behavioral of DFFSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE QBINT : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          QBINT := VitalINV(P0000);

          Q_zd := VitalINV(QBINT);

          QN_zd := VitalBUF(QBINT);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0775509 ns;
             tpw_CK_negedge : VitalDelayType := 0.0583905 ns;
             tpw_RN_negedge : VitalDelayType := 0.0766408 ns;
             tpw_SN_negedge : VitalDelayType := 0.0624967 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0788995 ns, 0.0828925 ns);
             tpd_CK_QN : VitalDelayType01 := (0.110116 ns, 0.104485 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.092635 ns);
             tpd_RN_QN : VitalDelayType01 := (0.119929 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0782033 ns, 0.0788148 ns);
             tpd_SN_QN : VitalDelayType01 := (0.106129 ns, 0.103449 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRX4 : entity is TRUE;
end DFFSRX4;

architecture behavioral of DFFSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0562724 ns;
             tpw_CK_negedge : VitalDelayType := 0.0585021 ns;
             tpw_RN_negedge : VitalDelayType := 0.0607759 ns;
             tpw_SN_negedge : VitalDelayType := 0.0436142 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0595016 ns, 0.0671224 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0784868 ns, 0.0682957 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0744453 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0857826 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0586887 ns, 0.0598809 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0712286 ns, 0.0674071 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRXL : entity is TRUE;
end DFFSRXL;

architecture behavioral of DFFSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0604524 ns;
             tpw_CK_negedge : VitalDelayType := 0.0579598 ns;
             tpw_SN_negedge : VitalDelayType := 0.0447557 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.059921 ns, 0.0720622 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0884815 ns, 0.0737157 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0587798 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.0725334 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSX1 : entity is TRUE;
end DFFSX1;

architecture behavioral of DFFSX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0678669 ns;
             tpw_CK_negedge : VitalDelayType := 0.0585866 ns;
             tpw_SN_negedge : VitalDelayType := 0.0516509 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0640539 ns, 0.0753545 ns);
             tpd_CK_QN : VitalDelayType01 := (0.100758 ns, 0.0874412 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0628017 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.0861249 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSX2 : entity is TRUE;
end DFFSX2;

architecture behavioral of DFFSX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0762157 ns;
             tpw_CK_negedge : VitalDelayType := 0.0578882 ns;
             tpw_SN_negedge : VitalDelayType := 0.0579742 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0723683 ns, 0.0831975 ns);
             tpd_CK_QN : VitalDelayType01 := (0.110539 ns, 0.0973277 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0723976 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.0972246 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSX4 : entity is TRUE;
end DFFSX4;

architecture behavioral of DFFSX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.055753 ns;
             tpw_CK_negedge : VitalDelayType := 0.0579597 ns;
             tpw_SN_negedge : VitalDelayType := 0.0404716 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0564249 ns, 0.0676714 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0790434 ns, 0.0651379 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0552163 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.0639105 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSXL : entity is TRUE;
end DFFSXL;

architecture behavioral of DFFSXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSXL",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFTRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0584508 ns;
             tpw_CK_negedge : VitalDelayType := 0.0513864 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0602471 ns, 0.0683942 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0843514 ns, 0.0739455 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFTRX1 : entity is TRUE;
end DFFTRX1;

architecture behavioral of DFFTRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX1",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFTRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalAND2(D_dly, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFTRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0651879 ns;
             tpw_CK_negedge : VitalDelayType := 0.0514083 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0641599 ns, 0.0705878 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0954463 ns, 0.0874247 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFTRX2 : entity is TRUE;
end DFFTRX2;

architecture behavioral of DFFTRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX2",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFTRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalAND2(D_dly, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFTRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0725348 ns;
             tpw_CK_negedge : VitalDelayType := 0.0512225 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0728253 ns, 0.0763002 ns);
             tpd_CK_QN : VitalDelayType01 := (0.102767 ns, 0.0976121 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFTRX4 : entity is TRUE;
end DFFTRX4;

architecture behavioral of DFFTRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX4",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFTRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalAND2(D_dly, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFTRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0538593 ns;
             tpw_CK_negedge : VitalDelayType := 0.0511844 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0566404 ns, 0.0641955 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0752475 ns, 0.0653294 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFTRXL : entity is TRUE;
end DFFTRXL;

architecture behavioral of DFFTRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRXL",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFTRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalAND2(D_dly, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0582486 ns;
             tpw_CK_negedge : VitalDelayType := 0.0553811 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0602588 ns, 0.068009 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0839654 ns, 0.0740297 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFX1 : entity is TRUE;
end DFFX1;

architecture behavioral of DFFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0651776 ns;
             tpw_CK_negedge : VitalDelayType := 0.0557299 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0641851 ns, 0.0704676 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0954398 ns, 0.0875447 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFX2 : entity is TRUE;
end DFFX2;

architecture behavioral of DFFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0720137 ns;
             tpw_CK_negedge : VitalDelayType := 0.0554543 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0720656 ns, 0.0758868 ns);
             tpd_CK_QN : VitalDelayType01 := (0.102339 ns, 0.0968224 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFX4 : entity is TRUE;
end DFFX4;

architecture behavioral of DFFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0535746 ns;
             tpw_CK_negedge : VitalDelayType := 0.0555487 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0565312 ns, 0.0637482 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0748424 ns, 0.0652224 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFXL : entity is TRUE;
end DFFXL;

architecture behavioral of DFFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY1X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0477326 ns, 0.0462611 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY1X1 : entity is TRUE;
end DLY1X1;

architecture behavioral of DLY1X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY1X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0650066 ns, 0.061845 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY1X4 : entity is TRUE;
end DLY1X4;

architecture behavioral of DLY1X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0857344 ns, 0.0841157 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY2X1 : entity is TRUE;
end DLY2X1;

architecture behavioral of DLY2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.103137 ns, 0.0999193 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY2X4 : entity is TRUE;
end DLY2X4;

architecture behavioral of DLY2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.123981 ns, 0.122391 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY3X1 : entity is TRUE;
end DLY3X1;

architecture behavioral of DLY3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.141268 ns, 0.137877 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY3X4 : entity is TRUE;
end DLY3X4;

architecture behavioral of DLY3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.159778 ns, 0.157925 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY4X1 : entity is TRUE;
end DLY4X1;

architecture behavioral of DLY4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.176544 ns, 0.173582 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY4X4 : entity is TRUE;
end DLY4X4;

architecture behavioral of DLY4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0540218 ns;
             tpw_CK_negedge : VitalDelayType := 0.0574918 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0612529 ns, 0.070453 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFHQX1 : entity is TRUE;
end EDFFHQX1;

architecture behavioral of EDFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0001);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0566895 ns;
             tpw_CK_negedge : VitalDelayType := 0.057507 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0650472 ns, 0.073738 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFHQX2 : entity is TRUE;
end EDFFHQX2;

architecture behavioral of EDFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0001);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0610829 ns;
             tpw_CK_negedge : VitalDelayType := 0.0572796 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0716203 ns, 0.0782909 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFHQX4 : entity is TRUE;
end EDFFHQX4;

architecture behavioral of EDFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0696532 ns;
             tpw_CK_negedge : VitalDelayType := 0.057586 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0826623 ns, 0.0870981 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFHQX8 : entity is TRUE;
end EDFFHQX8;

architecture behavioral of EDFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX8",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFTRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0585615 ns;
             tpw_CK_negedge : VitalDelayType := 0.0553768 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100786 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.061274 ns, 0.0670043 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0821231 ns, 0.0747247 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFTRX1 : entity is TRUE;
end EDFFTRX1;

architecture behavioral of EDFFTRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX1",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFTRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n0_D := VitalAND2(n7_var, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          E_EQ_1_AN_RN_EQ_1 := VitalAND2(E_dly, RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFTRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0659888 ns;
             tpw_CK_negedge : VitalDelayType := 0.0558657 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0652331 ns, 0.0706991 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0948431 ns, 0.0880816 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFTRX2 : entity is TRUE;
end EDFFTRX2;

architecture behavioral of EDFFTRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX2",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFTRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n0_D := VitalAND2(n7_var, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          E_EQ_1_AN_RN_EQ_1 := VitalAND2(E_dly, RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFTRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0726857 ns;
             tpw_CK_negedge : VitalDelayType := 0.0556981 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0734352 ns, 0.0769793 ns);
             tpd_CK_QN : VitalDelayType01 := (0.103676 ns, 0.0985673 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFTRX4 : entity is TRUE;
end EDFFTRX4;

architecture behavioral of EDFFTRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX4",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFTRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n0_D := VitalAND2(n7_var, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          E_EQ_1_AN_RN_EQ_1 := VitalAND2(E_dly, RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFTRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0551605 ns;
             tpw_CK_negedge : VitalDelayType := 0.0553901 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0592051 ns, 0.0665122 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0780033 ns, 0.0680815 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFTRXL : entity is TRUE;
end EDFFTRXL;

architecture behavioral of EDFFTRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRXL",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRXL",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFTRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n0_D := VitalAND2(n7_var, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          E_EQ_1_AN_RN_EQ_1 := VitalAND2(E_dly, RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0580681 ns;
             tpw_CK_negedge : VitalDelayType := 0.0531701 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0605336 ns, 0.0657883 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0807011 ns, 0.0738312 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFX1 : entity is TRUE;
end EDFFX1;

architecture behavioral of EDFFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0651987 ns;
             tpw_CK_negedge : VitalDelayType := 0.0531499 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0644497 ns, 0.0695278 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0933292 ns, 0.0872226 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFX2 : entity is TRUE;
end EDFFX2;

architecture behavioral of EDFFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.072695 ns;
             tpw_CK_negedge : VitalDelayType := 0.0530867 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0732666 ns, 0.076624 ns);
             tpd_CK_QN : VitalDelayType01 := (0.103396 ns, 0.0982919 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFX4 : entity is TRUE;
end EDFFX4;

architecture behavioral of EDFFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.054747 ns;
             tpw_CK_negedge : VitalDelayType := 0.0533058 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.058541 ns, 0.0651906 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0764451 ns, 0.0672889 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFXL : entity is TRUE;
end EDFFXL;

architecture behavioral of EDFFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFXL",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity HOLDX1 is
   generic (
             tipd_Y : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         Y : inout std_ulogic);

   attribute VITAL_LEVEL0 of HOLDX1 : entity is TRUE;
end HOLDX1;

architecture behavioral of HOLDX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL Y_ipd : std_ulogic := 'X';
   SIGNAL io_wire_0 : std_ulogic := 'X';
   CONSTANT ResultMapping : VitalResultMapType := ('W', 'W', 'L', 'H');

begin

--functionality section
   VitalBUF (io_wire_0, Y);
   VitalBUF (Y,
            io_wire_0,
            ( 0 ps, 0 ps),
            ResultMapping );

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.00917154 ns, 0.00501213 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX1 : entity is TRUE;
end INVX1;

architecture behavioral of INVX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.00891245 ns, 0.00481409 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX12 : entity is TRUE;
end INVX12;

architecture behavioral of INVX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX16 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0323955 ns, 0.016906 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX16 : entity is TRUE;
end INVX16;

architecture behavioral of INVX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0087899 ns, 0.00466743 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX2 : entity is TRUE;
end INVX2;

architecture behavioral of INVX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX20 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.009022 ns, 0.00493098 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX20 : entity is TRUE;
end INVX20;

architecture behavioral of INVX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.00904545 ns, 0.00492998 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX3 : entity is TRUE;
end INVX3;

architecture behavioral of INVX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.00880897 ns, 0.00468587 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX4 : entity is TRUE;
end INVX4;

architecture behavioral of INVX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.00906901 ns, 0.0049523 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX6 : entity is TRUE;
end INVX6;

architecture behavioral of INVX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.00899157 ns, 0.00488298 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX8 : entity is TRUE;
end INVX8;

architecture behavioral of INVX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVXL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.00905668 ns, 0.00463632 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVXL : entity is TRUE;
end INVXL;

architecture behavioral of INVXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MDFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0527205 ns;
             tpw_CK_negedge : VitalDelayType := 0.0580637 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0582909 ns, 0.0685128 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of MDFFHQX1 : entity is TRUE;
end MDFFHQX1;

architecture behavioral of MDFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly)

      --timing checks section variables
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE S0_EQ_1 : std_ulogic;
      VARIABLE S0_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX1",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX1",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX1",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/MDFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(D1_dly, D0_dly, S0_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0002 := VitalINV(N30);

          Q_zd := VitalINV(P0002);

          S0_EQ_1 := VitalBUF(S0_dly);

          S0_EQ_0 := VitalINV(S0_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MDFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0554253 ns;
             tpw_CK_negedge : VitalDelayType := 0.0580896 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100386 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0631692 ns, 0.0741086 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of MDFFHQX2 : entity is TRUE;
end MDFFHQX2;

architecture behavioral of MDFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly)

      --timing checks section variables
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE S0_EQ_1 : std_ulogic;
      VARIABLE S0_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX2",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX2",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX2",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/MDFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(D1_dly, D0_dly, S0_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0002 := VitalINV(N30);

          Q_zd := VitalINV(P0002);

          S0_EQ_1 := VitalBUF(S0_dly);

          S0_EQ_0 := VitalINV(S0_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MDFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0602218 ns;
             tpw_CK_negedge : VitalDelayType := 0.0580183 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0694828 ns, 0.0774008 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of MDFFHQX4 : entity is TRUE;
end MDFFHQX4;

architecture behavioral of MDFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly)

      --timing checks section variables
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE S0_EQ_1 : std_ulogic;
      VARIABLE S0_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX4",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX4",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX4",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/MDFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(D1_dly, D0_dly, S0_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          S0_EQ_1 := VitalBUF(S0_dly);

          S0_EQ_0 := VitalINV(S0_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MDFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0696443 ns;
             tpw_CK_negedge : VitalDelayType := 0.0579708 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100653 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.0947609 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0822886 ns, 0.0872803 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of MDFFHQX8 : entity is TRUE;
end MDFFHQX8;

architecture behavioral of MDFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly)

      --timing checks section variables
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE S0_EQ_1 : std_ulogic;
      VARIABLE S0_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX8",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX8",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX8",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/MDFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(D1_dly, D0_dly, S0_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          S0_EQ_1 := VitalBUF(S0_dly);

          S0_EQ_0 := VitalINV(S0_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0283966 ns, 0.0356835 ns);
             tpd_B_Y : VitalDelayType01 := (0.0279687 ns, 0.0361237 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0299417 ns, 0.0316485 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2X1 : entity is TRUE;
end MX2X1;

architecture behavioral of MX2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0383702 ns, 0.0489233 ns);
             tpd_B_Y : VitalDelayType01 := (0.0379384 ns, 0.0493415 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0396562 ns, 0.0445844 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2X2 : entity is TRUE;
end MX2X2;

architecture behavioral of MX2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0475479 ns, 0.0592521 ns);
             tpd_B_Y : VitalDelayType01 := (0.0468623 ns, 0.0597372 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0496572 ns, 0.0557775 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2X4 : entity is TRUE;
end MX2X4;

architecture behavioral of MX2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0624593 ns, 0.0785285 ns);
             tpd_B_Y : VitalDelayType01 := (0.0617164 ns, 0.0788962 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0644145 ns, 0.0747418 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2X6 : entity is TRUE;
end MX2X6;

architecture behavioral of MX2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0771154 ns, 0.0973578 ns);
             tpd_B_Y : VitalDelayType01 := (0.0762563 ns, 0.0976559 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0787891 ns, 0.0935402 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2X8 : entity is TRUE;
end MX2X8;

architecture behavioral of MX2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.023451 ns, 0.0290636 ns);
             tpd_B_Y : VitalDelayType01 := (0.0231094 ns, 0.029564 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0251889 ns, 0.0254448 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2XL : entity is TRUE;
end MX2XL;

architecture behavioral of MX2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0419358 ns, 0.0494902 ns);
             tpd_B_Y : VitalDelayType01 := (0.041534 ns, 0.0499387 ns);
             tpd_C_Y : VitalDelayType01 := (0.0284455 ns, 0.0366886 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0433393 ns, 0.045228 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0297259 ns, 0.0314077 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX3X1 : entity is TRUE;
end MX3X1;

architecture behavioral of MX3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(C_ipd, n0_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0537933 ns, 0.0634209 ns);
             tpd_B_Y : VitalDelayType01 := (0.0532793 ns, 0.0637856 ns);
             tpd_C_Y : VitalDelayType01 := (0.0382681 ns, 0.0497126 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0550877 ns, 0.0590144 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0399377 ns, 0.0434059 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX3X2 : entity is TRUE;
end MX3X2;

architecture behavioral of MX3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(C_ipd, n0_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.079889 ns, 0.0968784 ns);
             tpd_B_Y : VitalDelayType01 := (0.0792293 ns, 0.0970669 ns);
             tpd_C_Y : VitalDelayType01 := (0.0410972 ns, 0.0529202 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0808939 ns, 0.0921344 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0528357 ns, 0.0591257 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX3X4 : entity is TRUE;
end MX3X4;

architecture behavioral of MX3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(C_ipd, n0_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0358214 ns, 0.0419078 ns);
             tpd_B_Y : VitalDelayType01 := (0.0354245 ns, 0.0423866 ns);
             tpd_C_Y : VitalDelayType01 := (0.0235237 ns, 0.0300998 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0373142 ns, 0.0377671 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0247047 ns, 0.0256238 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX3XL : entity is TRUE;
end MX3XL;

architecture behavioral of MX3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(C_ipd, n0_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0416521 ns, 0.049253 ns);
             tpd_B_Y : VitalDelayType01 := (0.0411917 ns, 0.0495524 ns);
             tpd_C_Y : VitalDelayType01 := (0.041095 ns, 0.048942 ns);
             tpd_D_Y : VitalDelayType01 := (0.0405821 ns, 0.0494026 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0449969 ns, 0.0465221 ns);
             tpd_S1_Y : VitalDelayType01 := (0.03021 ns, 0.0270906 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX4X1 : entity is TRUE;
end MX4X1;

architecture behavioral of MX4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(n0_var, n1_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0534475 ns, 0.0632232 ns);
             tpd_B_Y : VitalDelayType01 := (0.0531815 ns, 0.0634032 ns);
             tpd_C_Y : VitalDelayType01 := (0.0540876 ns, 0.0643038 ns);
             tpd_D_Y : VitalDelayType01 := (0.0530056 ns, 0.0640419 ns);
             tpd_S0_Y : VitalDelayType01 := (0.057015 ns, 0.0608624 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0416985 ns, 0.0385383 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX4X2 : entity is TRUE;
end MX4X2;

architecture behavioral of MX4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(n0_var, n1_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0795088 ns, 0.0966297 ns);
             tpd_B_Y : VitalDelayType01 := (0.0792246 ns, 0.0967005 ns);
             tpd_C_Y : VitalDelayType01 := (0.0802725 ns, 0.0976037 ns);
             tpd_D_Y : VitalDelayType01 := (0.0790169 ns, 0.0970608 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0827049 ns, 0.0937845 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0631045 ns, 0.0661908 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX4X4 : entity is TRUE;
end MX4X4;

architecture behavioral of MX4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(n0_var, n1_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0360074 ns, 0.0421694 ns);
             tpd_B_Y : VitalDelayType01 := (0.0352663 ns, 0.042084 ns);
             tpd_C_Y : VitalDelayType01 := (0.0354666 ns, 0.041849 ns);
             tpd_D_Y : VitalDelayType01 := (0.0349414 ns, 0.0421861 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0394327 ns, 0.0395424 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0249834 ns, 0.0220141 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX4XL : entity is TRUE;
end MX4XL;

architecture behavioral of MX4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(n0_var, n1_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0195693 ns, 0.0127327 ns);
             tpd_B_Y : VitalDelayType01 := (0.0204698 ns, 0.0118552 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0182615 ns, 0.0164651 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2X1 : entity is TRUE;
end MXI2X1;

architecture behavioral of MXI2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0513663 ns, 0.0447022 ns);
             tpd_B_Y : VitalDelayType01 := (0.0520541 ns, 0.0445576 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0474156 ns, 0.046432 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2X2 : entity is TRUE;
end MXI2X2;

architecture behavioral of MXI2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0615587 ns, 0.0519739 ns);
             tpd_B_Y : VitalDelayType01 := (0.0622811 ns, 0.0518171 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0572978 ns, 0.0535226 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2X4 : entity is TRUE;
end MXI2X4;

architecture behavioral of MXI2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0735366 ns, 0.058731 ns);
             tpd_B_Y : VitalDelayType01 := (0.0738715 ns, 0.0582454 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0693076 ns, 0.0601054 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2X6 : entity is TRUE;
end MXI2X6;

architecture behavioral of MXI2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0786195 ns, 0.0639135 ns);
             tpd_B_Y : VitalDelayType01 := (0.0789981 ns, 0.0634455 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0743659 ns, 0.065262 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2X8 : entity is TRUE;
end MXI2X8;

architecture behavioral of MXI2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0191029 ns, 0.0116989 ns);
             tpd_B_Y : VitalDelayType01 := (0.0197185 ns, 0.0114111 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0159236 ns, 0.0136504 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2XL : entity is TRUE;
end MXI2XL;

architecture behavioral of MXI2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0547654 ns, 0.0515379 ns);
             tpd_B_Y : VitalDelayType01 := (0.0553851 ns, 0.0512336 ns);
             tpd_C_Y : VitalDelayType01 := (0.0405619 ns, 0.0428776 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0509356 ns, 0.0531746 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0304276 ns, 0.0322772 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI3X1 : entity is TRUE;
end MXI3X1;

architecture behavioral of MXI3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n1_var := VitalMUX2(C_ipd, n0_var, S1_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0651043 ns, 0.0646198 ns);
             tpd_B_Y : VitalDelayType01 := (0.0656105 ns, 0.0643844 ns);
             tpd_C_Y : VitalDelayType01 := (0.0508058 ns, 0.0565898 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0610804 ns, 0.066295 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0399873 ns, 0.044762 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI3X2 : entity is TRUE;
end MXI3X2;

architecture behavioral of MXI3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n1_var := VitalMUX2(C_ipd, n0_var, S1_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0777564 ns, 0.0770625 ns);
             tpd_B_Y : VitalDelayType01 := (0.0784823 ns, 0.0768849 ns);
             tpd_C_Y : VitalDelayType01 := (0.0612677 ns, 0.0676164 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0739016 ns, 0.0788595 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0497716 ns, 0.0557658 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI3X4 : entity is TRUE;
end MXI3X4;

architecture behavioral of MXI3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n1_var := VitalMUX2(C_ipd, n0_var, S1_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0493628 ns, 0.0447132 ns);
             tpd_B_Y : VitalDelayType01 := (0.049886 ns, 0.0443415 ns);
             tpd_C_Y : VitalDelayType01 := (0.0354882 ns, 0.0361714 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0455397 ns, 0.046364 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0255492 ns, 0.0259547 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI3XL : entity is TRUE;
end MXI3XL;

architecture behavioral of MXI3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n1_var := VitalMUX2(C_ipd, n0_var, S1_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0543247 ns, 0.0509398 ns);
             tpd_B_Y : VitalDelayType01 := (0.0549883 ns, 0.0508176 ns);
             tpd_C_Y : VitalDelayType01 := (0.0538156 ns, 0.0513081 ns);
             tpd_D_Y : VitalDelayType01 := (0.0544666 ns, 0.0511458 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0523905 ns, 0.0551559 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0300718 ns, 0.0316337 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI4X1 : entity is TRUE;
end MXI4X1;

architecture behavioral of MXI4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n2_var := VitalMUX2(n0_var, n1_var, S1_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0654956 ns, 0.0647608 ns);
             tpd_B_Y : VitalDelayType01 := (0.0662348 ns, 0.0646256 ns);
             tpd_C_Y : VitalDelayType01 := (0.0658321 ns, 0.0655638 ns);
             tpd_D_Y : VitalDelayType01 := (0.0658625 ns, 0.0649392 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0636816 ns, 0.0689014 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0398473 ns, 0.044469 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI4X2 : entity is TRUE;
end MXI4X2;

architecture behavioral of MXI4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n2_var := VitalMUX2(n0_var, n1_var, S1_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0793917 ns, 0.0787063 ns);
             tpd_B_Y : VitalDelayType01 := (0.080052 ns, 0.0783436 ns);
             tpd_C_Y : VitalDelayType01 := (0.0778395 ns, 0.0778178 ns);
             tpd_D_Y : VitalDelayType01 := (0.0779491 ns, 0.0773634 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0767775 ns, 0.0823448 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0502847 ns, 0.0560522 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI4X4 : entity is TRUE;
end MXI4X4;

architecture behavioral of MXI4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n2_var := VitalMUX2(n0_var, n1_var, S1_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0495498 ns, 0.0446198 ns);
             tpd_B_Y : VitalDelayType01 := (0.0502708 ns, 0.044411 ns);
             tpd_C_Y : VitalDelayType01 := (0.0486477 ns, 0.0446223 ns);
             tpd_D_Y : VitalDelayType01 := (0.0494162 ns, 0.0446105 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0475228 ns, 0.048789 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0252557 ns, 0.0254364 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI4XL : entity is TRUE;
end MXI4XL;

architecture behavioral of MXI4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n2_var := VitalMUX2(n0_var, n1_var, S1_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0207698 ns, 0.0248326 ns);
             tpd_B_Y : VitalDelayType01 := (0.0100046 ns, 0.00821446 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2BX1 : entity is TRUE;
end NAND2BX1;

architecture behavioral of NAND2BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0273957 ns, 0.0331824 ns);
             tpd_B_Y : VitalDelayType01 := (0.00991616 ns, 0.00805388 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2BX2 : entity is TRUE;
end NAND2BX2;

architecture behavioral of NAND2BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0291436 ns, 0.0350233 ns);
             tpd_B_Y : VitalDelayType01 := (0.00994352 ns, 0.0080896 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2BX4 : entity is TRUE;
end NAND2BX4;

architecture behavioral of NAND2BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0171302 ns, 0.0205949 ns);
             tpd_B_Y : VitalDelayType01 := (0.00989299 ns, 0.00779526 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2BXL : entity is TRUE;
end NAND2BXL;

architecture behavioral of NAND2BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0121183 ns, 0.00892997 ns);
             tpd_B_Y : VitalDelayType01 := (0.0100765 ns, 0.00826446 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2X1 : entity is TRUE;
end NAND2X1;

architecture behavioral of NAND2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0119237 ns, 0.00869905 ns);
             tpd_B_Y : VitalDelayType01 := (0.0100051 ns, 0.00812482 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2X2 : entity is TRUE;
end NAND2X2;

architecture behavioral of NAND2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0120178 ns, 0.00877163 ns);
             tpd_B_Y : VitalDelayType01 := (0.0100236 ns, 0.00816621 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2X4 : entity is TRUE;
end NAND2X4;

architecture behavioral of NAND2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.012151 ns, 0.00900124 ns);
             tpd_B_Y : VitalDelayType01 := (0.0100918 ns, 0.00827774 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2X6 : entity is TRUE;
end NAND2X6;

architecture behavioral of NAND2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0122265 ns, 0.0090298 ns);
             tpd_B_Y : VitalDelayType01 := (0.010087 ns, 0.00827838 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2X8 : entity is TRUE;
end NAND2X8;

architecture behavioral of NAND2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0119094 ns, 0.00840032 ns);
             tpd_B_Y : VitalDelayType01 := (0.00990532 ns, 0.00783949 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2XL : entity is TRUE;
end NAND2XL;

architecture behavioral of NAND2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0232576 ns, 0.0297316 ns);
             tpd_B_Y : VitalDelayType01 := (0.0133216 ns, 0.0135084 ns);
             tpd_C_Y : VitalDelayType01 := (0.011435 ns, 0.01199 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3BX1 : entity is TRUE;
end NAND3BX1;

architecture behavioral of NAND3BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0299517 ns, 0.0373881 ns);
             tpd_B_Y : VitalDelayType01 := (0.013107 ns, 0.0130976 ns);
             tpd_C_Y : VitalDelayType01 := (0.0110567 ns, 0.0114354 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3BX2 : entity is TRUE;
end NAND3BX2;

architecture behavioral of NAND3BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.031819 ns, 0.039218 ns);
             tpd_B_Y : VitalDelayType01 := (0.0131005 ns, 0.0130935 ns);
             tpd_C_Y : VitalDelayType01 := (0.0111145 ns, 0.0114243 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3BX4 : entity is TRUE;
end NAND3BX4;

architecture behavioral of NAND3BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0196134 ns, 0.025548 ns);
             tpd_B_Y : VitalDelayType01 := (0.01322 ns, 0.0129982 ns);
             tpd_C_Y : VitalDelayType01 := (0.0113334 ns, 0.0115699 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3BXL : entity is TRUE;
end NAND3BXL;

architecture behavioral of NAND3BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0145651 ns, 0.0139649 ns);
             tpd_B_Y : VitalDelayType01 := (0.0133568 ns, 0.0135477 ns);
             tpd_C_Y : VitalDelayType01 := (0.0114837 ns, 0.0120331 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3X1 : entity is TRUE;
end NAND3X1;

architecture behavioral of NAND3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0143123 ns, 0.0135293 ns);
             tpd_B_Y : VitalDelayType01 := (0.0131675 ns, 0.0131736 ns);
             tpd_C_Y : VitalDelayType01 := (0.0111163 ns, 0.0115228 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3X2 : entity is TRUE;
end NAND3X2;

architecture behavioral of NAND3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0144021 ns, 0.0136286 ns);
             tpd_B_Y : VitalDelayType01 := (0.0131689 ns, 0.0131793 ns);
             tpd_C_Y : VitalDelayType01 := (0.0112002 ns, 0.0114998 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3X4 : entity is TRUE;
end NAND3X4;

architecture behavioral of NAND3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0144809 ns, 0.0137209 ns);
             tpd_B_Y : VitalDelayType01 := (0.0132001 ns, 0.0132416 ns);
             tpd_C_Y : VitalDelayType01 := (0.0112128 ns, 0.0115238 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3X6 : entity is TRUE;
end NAND3X6;

architecture behavioral of NAND3X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0145752 ns, 0.0138098 ns);
             tpd_B_Y : VitalDelayType01 := (0.013271 ns, 0.0132823 ns);
             tpd_C_Y : VitalDelayType01 := (0.0112587 ns, 0.0116036 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3X8 : entity is TRUE;
end NAND3X8;

architecture behavioral of NAND3X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0145429 ns, 0.0135953 ns);
             tpd_B_Y : VitalDelayType01 := (0.0132478 ns, 0.0131314 ns);
             tpd_C_Y : VitalDelayType01 := (0.0113174 ns, 0.0115755 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3XL : entity is TRUE;
end NAND3XL;

architecture behavioral of NAND3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BBX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0246851 ns, 0.0358514 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0242385 ns, 0.0345448 ns);
             tpd_C_Y : VitalDelayType01 := (0.0141471 ns, 0.0173717 ns);
             tpd_D_Y : VitalDelayType01 := (0.012283 ns, 0.0149579 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BBX1 : entity is TRUE;
end NAND4BBX1;

architecture behavioral of NAND4BBX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C_ipd);
          n4_var := VitalAND2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BBX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0319314 ns, 0.0444284 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0313546 ns, 0.0427701 ns);
             tpd_C_Y : VitalDelayType01 := (0.0142407 ns, 0.0178125 ns);
             tpd_D_Y : VitalDelayType01 := (0.0121265 ns, 0.0148389 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BBX2 : entity is TRUE;
end NAND4BBX2;

architecture behavioral of NAND4BBX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C_ipd);
          n4_var := VitalAND2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BBX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.033789 ns, 0.0462648 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0332158 ns, 0.04459 ns);
             tpd_C_Y : VitalDelayType01 := (0.0144167 ns, 0.0180728 ns);
             tpd_D_Y : VitalDelayType01 := (0.0123665 ns, 0.0152134 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BBX4 : entity is TRUE;
end NAND4BBX4;

architecture behavioral of NAND4BBX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C_ipd);
          n4_var := VitalAND2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BBXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0212112 ns, 0.0317046 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0205622 ns, 0.030377 ns);
             tpd_C_Y : VitalDelayType01 := (0.0140064 ns, 0.0168298 ns);
             tpd_D_Y : VitalDelayType01 := (0.0121435 ns, 0.0145498 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BBXL : entity is TRUE;
end NAND4BBXL;

architecture behavioral of NAND4BBXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C_ipd);
          n4_var := VitalAND2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0249842 ns, 0.0355807 ns);
             tpd_B_Y : VitalDelayType01 := (0.015417 ns, 0.0190011 ns);
             tpd_C_Y : VitalDelayType01 := (0.0141559 ns, 0.0174151 ns);
             tpd_D_Y : VitalDelayType01 := (0.0123289 ns, 0.0149989 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BX1 : entity is TRUE;
end NAND4BX1;

architecture behavioral of NAND4BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          n3_var := VitalAND2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0321963 ns, 0.0441426 ns);
             tpd_B_Y : VitalDelayType01 := (0.0154694 ns, 0.0195755 ns);
             tpd_C_Y : VitalDelayType01 := (0.0142964 ns, 0.0179855 ns);
             tpd_D_Y : VitalDelayType01 := (0.0122022 ns, 0.0149546 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BX2 : entity is TRUE;
end NAND4BX2;

architecture behavioral of NAND4BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          n3_var := VitalAND2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0340576 ns, 0.0456076 ns);
             tpd_B_Y : VitalDelayType01 := (0.0154924 ns, 0.0197251 ns);
             tpd_C_Y : VitalDelayType01 := (0.0143156 ns, 0.0180728 ns);
             tpd_D_Y : VitalDelayType01 := (0.0122595 ns, 0.0150954 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BX4 : entity is TRUE;
end NAND4BX4;

architecture behavioral of NAND4BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          n3_var := VitalAND2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.021265 ns, 0.0314094 ns);
             tpd_B_Y : VitalDelayType01 := (0.0152918 ns, 0.0184491 ns);
             tpd_C_Y : VitalDelayType01 := (0.014012 ns, 0.0168504 ns);
             tpd_D_Y : VitalDelayType01 := (0.012188 ns, 0.0145809 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BXL : entity is TRUE;
end NAND4BXL;

architecture behavioral of NAND4BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          n3_var := VitalAND2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0161638 ns, 0.0197856 ns);
             tpd_B_Y : VitalDelayType01 := (0.015506 ns, 0.0191867 ns);
             tpd_C_Y : VitalDelayType01 := (0.0142534 ns, 0.0175537 ns);
             tpd_D_Y : VitalDelayType01 := (0.0123642 ns, 0.0149863 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4X1 : entity is TRUE;
end NAND4X1;

architecture behavioral of NAND4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0160757 ns, 0.0198978 ns);
             tpd_B_Y : VitalDelayType01 := (0.0154232 ns, 0.0192759 ns);
             tpd_C_Y : VitalDelayType01 := (0.0141669 ns, 0.017464 ns);
             tpd_D_Y : VitalDelayType01 := (0.0122627 ns, 0.0147272 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4X2 : entity is TRUE;
end NAND4X2;

architecture behavioral of NAND4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0162575 ns, 0.0206994 ns);
             tpd_B_Y : VitalDelayType01 := (0.0155492 ns, 0.0198366 ns);
             tpd_C_Y : VitalDelayType01 := (0.0143727 ns, 0.0181589 ns);
             tpd_D_Y : VitalDelayType01 := (0.0123281 ns, 0.0151721 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4X4 : entity is TRUE;
end NAND4X4;

architecture behavioral of NAND4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0163801 ns, 0.0208146 ns);
             tpd_B_Y : VitalDelayType01 := (0.0157012 ns, 0.0200113 ns);
             tpd_C_Y : VitalDelayType01 := (0.0145074 ns, 0.0183157 ns);
             tpd_D_Y : VitalDelayType01 := (0.0125329 ns, 0.0155028 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4X6 : entity is TRUE;
end NAND4X6;

architecture behavioral of NAND4X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0163764 ns, 0.0208331 ns);
             tpd_B_Y : VitalDelayType01 := (0.0156978 ns, 0.0200816 ns);
             tpd_C_Y : VitalDelayType01 := (0.0144793 ns, 0.0183547 ns);
             tpd_D_Y : VitalDelayType01 := (0.0125172 ns, 0.0155306 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4X8 : entity is TRUE;
end NAND4X8;

architecture behavioral of NAND4X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0160393 ns, 0.0190576 ns);
             tpd_B_Y : VitalDelayType01 := (0.0153177 ns, 0.0184191 ns);
             tpd_C_Y : VitalDelayType01 := (0.0140343 ns, 0.0168441 ns);
             tpd_D_Y : VitalDelayType01 := (0.0122091 ns, 0.0145698 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4XL : entity is TRUE;
end NAND4XL;

architecture behavioral of NAND4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0245161 ns, 0.0233191 ns);
             tpd_B_Y : VitalDelayType01 := (0.0134199 ns, 0.00555496 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2BX1 : entity is TRUE;
end NOR2BX1;

architecture behavioral of NOR2BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.03065 ns, 0.0315517 ns);
             tpd_B_Y : VitalDelayType01 := (0.0131098 ns, 0.00546154 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2BX2 : entity is TRUE;
end NOR2BX2;

architecture behavioral of NOR2BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0434244 ns, 0.0474271 ns);
             tpd_B_Y : VitalDelayType01 := (0.0131068 ns, 0.00545942 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2BX4 : entity is TRUE;
end NOR2BX4;

architecture behavioral of NOR2BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0209028 ns, 0.0190134 ns);
             tpd_B_Y : VitalDelayType01 := (0.0132461 ns, 0.00518963 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2BXL : entity is TRUE;
end NOR2BXL;

architecture behavioral of NOR2BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0155366 ns, 0.00744961 ns);
             tpd_B_Y : VitalDelayType01 := (0.0134175 ns, 0.00556762 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2X1 : entity is TRUE;
end NOR2X1;

architecture behavioral of NOR2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0152101 ns, 0.0072437 ns);
             tpd_B_Y : VitalDelayType01 := (0.0131214 ns, 0.00546687 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2X2 : entity is TRUE;
end NOR2X2;

architecture behavioral of NOR2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0153648 ns, 0.00732861 ns);
             tpd_B_Y : VitalDelayType01 := (0.0131699 ns, 0.0054965 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2X4 : entity is TRUE;
end NOR2X4;

architecture behavioral of NOR2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0153294 ns, 0.00742624 ns);
             tpd_B_Y : VitalDelayType01 := (0.0131779 ns, 0.00552734 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2X6 : entity is TRUE;
end NOR2X6;

architecture behavioral of NOR2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0155645 ns, 0.00751181 ns);
             tpd_B_Y : VitalDelayType01 := (0.0132713 ns, 0.00557836 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2X8 : entity is TRUE;
end NOR2X8;

architecture behavioral of NOR2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0151566 ns, 0.00700497 ns);
             tpd_B_Y : VitalDelayType01 := (0.0132467 ns, 0.00514837 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2XL : entity is TRUE;
end NOR2XL;

architecture behavioral of NOR2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0339555 ns, 0.0244603 ns);
             tpd_B_Y : VitalDelayType01 := (0.0223532 ns, 0.00826802 ns);
             tpd_C_Y : VitalDelayType01 := (0.017412 ns, 0.00643813 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3BX1 : entity is TRUE;
end NOR3BX1;

architecture behavioral of NOR3BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0399181 ns, 0.0327714 ns);
             tpd_B_Y : VitalDelayType01 := (0.0221351 ns, 0.00803837 ns);
             tpd_C_Y : VitalDelayType01 := (0.0166092 ns, 0.00610866 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3BX2 : entity is TRUE;
end NOR3BX2;

architecture behavioral of NOR3BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.041784 ns, 0.0346019 ns);
             tpd_B_Y : VitalDelayType01 := (0.0222154 ns, 0.00807087 ns);
             tpd_C_Y : VitalDelayType01 := (0.0166225 ns, 0.00607518 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3BX4 : entity is TRUE;
end NOR3BX4;

architecture behavioral of NOR3BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0304708 ns, 0.0200201 ns);
             tpd_B_Y : VitalDelayType01 := (0.0220935 ns, 0.00794926 ns);
             tpd_C_Y : VitalDelayType01 := (0.0172599 ns, 0.00610272 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3BXL : entity is TRUE;
end NOR3BXL;

architecture behavioral of NOR3BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0249218 ns, 0.00878289 ns);
             tpd_B_Y : VitalDelayType01 := (0.0225697 ns, 0.00833359 ns);
             tpd_C_Y : VitalDelayType01 := (0.0173458 ns, 0.00643809 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3X1 : entity is TRUE;
end NOR3X1;

architecture behavioral of NOR3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0242911 ns, 0.00846861 ns);
             tpd_B_Y : VitalDelayType01 := (0.0220644 ns, 0.00804155 ns);
             tpd_C_Y : VitalDelayType01 := (0.0166891 ns, 0.00609632 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3X2 : entity is TRUE;
end NOR3X2;

architecture behavioral of NOR3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0245686 ns, 0.00857381 ns);
             tpd_B_Y : VitalDelayType01 := (0.0221281 ns, 0.0080425 ns);
             tpd_C_Y : VitalDelayType01 := (0.0167235 ns, 0.00610393 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3X4 : entity is TRUE;
end NOR3X4;

architecture behavioral of NOR3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0247768 ns, 0.00862403 ns);
             tpd_B_Y : VitalDelayType01 := (0.0221851 ns, 0.00810498 ns);
             tpd_C_Y : VitalDelayType01 := (0.0167763 ns, 0.00612832 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3X6 : entity is TRUE;
end NOR3X6;

architecture behavioral of NOR3X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0250444 ns, 0.0087128 ns);
             tpd_B_Y : VitalDelayType01 := (0.0224382 ns, 0.00815516 ns);
             tpd_C_Y : VitalDelayType01 := (0.016798 ns, 0.00620583 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3X8 : entity is TRUE;
end NOR3X8;

architecture behavioral of NOR3X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0245135 ns, 0.00839268 ns);
             tpd_B_Y : VitalDelayType01 := (0.0220502 ns, 0.00795292 ns);
             tpd_C_Y : VitalDelayType01 := (0.0172498 ns, 0.0061074 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3XL : entity is TRUE;
end NOR3XL;

architecture behavioral of NOR3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BBX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0459337 ns, 0.024873 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0425738 ns, 0.0249928 ns);
             tpd_C_Y : VitalDelayType01 := (0.0285751 ns, 0.00883232 ns);
             tpd_D_Y : VitalDelayType01 := (0.0206454 ns, 0.00684137 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BBX1 : entity is TRUE;
end NOR4BBX1;

architecture behavioral of NOR4BBX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C_ipd);
          n4_var := VitalOR2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BBX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0541108 ns, 0.0334602 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0493717 ns, 0.0336888 ns);
             tpd_C_Y : VitalDelayType01 := (0.028906 ns, 0.00886333 ns);
             tpd_D_Y : VitalDelayType01 := (0.019928 ns, 0.00676349 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BBX2 : entity is TRUE;
end NOR4BBX2;

architecture behavioral of NOR4BBX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C_ipd);
          n4_var := VitalOR2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BBX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0559936 ns, 0.0353871 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0510594 ns, 0.0354762 ns);
             tpd_C_Y : VitalDelayType01 := (0.0291824 ns, 0.00910693 ns);
             tpd_D_Y : VitalDelayType01 := (0.0202966 ns, 0.00715204 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BBX4 : entity is TRUE;
end NOR4BBX4;

architecture behavioral of NOR4BBX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C_ipd);
          n4_var := VitalOR2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BBXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0421203 ns, 0.0202824 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0393586 ns, 0.0204909 ns);
             tpd_C_Y : VitalDelayType01 := (0.0281044 ns, 0.00845225 ns);
             tpd_D_Y : VitalDelayType01 := (0.0203657 ns, 0.00652098 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BBXL : entity is TRUE;
end NOR4BBXL;

architecture behavioral of NOR4BBXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C_ipd);
          n4_var := VitalOR2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.045768 ns, 0.0248943 ns);
             tpd_B_Y : VitalDelayType01 := (0.033985 ns, 0.00938068 ns);
             tpd_C_Y : VitalDelayType01 := (0.0284641 ns, 0.00877913 ns);
             tpd_D_Y : VitalDelayType01 := (0.0206581 ns, 0.00691886 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BX1 : entity is TRUE;
end NOR4BX1;

architecture behavioral of NOR4BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          n3_var := VitalOR2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0533477 ns, 0.0334558 ns);
             tpd_B_Y : VitalDelayType01 := (0.0346908 ns, 0.00939638 ns);
             tpd_C_Y : VitalDelayType01 := (0.0292595 ns, 0.00889032 ns);
             tpd_D_Y : VitalDelayType01 := (0.0200427 ns, 0.00677184 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BX2 : entity is TRUE;
end NOR4BX2;

architecture behavioral of NOR4BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          n3_var := VitalOR2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0545616 ns, 0.0351031 ns);
             tpd_B_Y : VitalDelayType01 := (0.0346706 ns, 0.00941164 ns);
             tpd_C_Y : VitalDelayType01 := (0.0291753 ns, 0.00887064 ns);
             tpd_D_Y : VitalDelayType01 := (0.0202515 ns, 0.00682419 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BX4 : entity is TRUE;
end NOR4BX4;

architecture behavioral of NOR4BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          n3_var := VitalOR2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0420463 ns, 0.0203148 ns);
             tpd_B_Y : VitalDelayType01 := (0.033424 ns, 0.00905122 ns);
             tpd_C_Y : VitalDelayType01 := (0.0281657 ns, 0.00844313 ns);
             tpd_D_Y : VitalDelayType01 := (0.0203756 ns, 0.00658407 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BXL : entity is TRUE;
end NOR4BXL;

architecture behavioral of NOR4BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          n3_var := VitalOR2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0363594 ns, 0.00920314 ns);
             tpd_B_Y : VitalDelayType01 := (0.0342051 ns, 0.00940835 ns);
             tpd_C_Y : VitalDelayType01 := (0.028734 ns, 0.00883164 ns);
             tpd_D_Y : VitalDelayType01 := (0.0206081 ns, 0.00693919 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4X1 : entity is TRUE;
end NOR4X1;

architecture behavioral of NOR4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0358038 ns, 0.00904609 ns);
             tpd_B_Y : VitalDelayType01 := (0.0337334 ns, 0.00925637 ns);
             tpd_C_Y : VitalDelayType01 := (0.0284054 ns, 0.00871382 ns);
             tpd_D_Y : VitalDelayType01 := (0.0201123 ns, 0.0068432 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4X2 : entity is TRUE;
end NOR4X2;

architecture behavioral of NOR4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0375807 ns, 0.00912049 ns);
             tpd_B_Y : VitalDelayType01 := (0.0347457 ns, 0.00941354 ns);
             tpd_C_Y : VitalDelayType01 := (0.0292233 ns, 0.00891285 ns);
             tpd_D_Y : VitalDelayType01 := (0.0202994 ns, 0.00686824 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4X4 : entity is TRUE;
end NOR4X4;

architecture behavioral of NOR4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0375673 ns, 0.00937631 ns);
             tpd_B_Y : VitalDelayType01 := (0.0350466 ns, 0.00968581 ns);
             tpd_C_Y : VitalDelayType01 := (0.0294078 ns, 0.009045 ns);
             tpd_D_Y : VitalDelayType01 := (0.0206588 ns, 0.00710363 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4X6 : entity is TRUE;
end NOR4X6;

architecture behavioral of NOR4X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0374922 ns, 0.00937064 ns);
             tpd_B_Y : VitalDelayType01 := (0.0349784 ns, 0.00965902 ns);
             tpd_C_Y : VitalDelayType01 := (0.0293609 ns, 0.00904129 ns);
             tpd_D_Y : VitalDelayType01 := (0.0205808 ns, 0.00708165 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4X8 : entity is TRUE;
end NOR4X8;

architecture behavioral of NOR4X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0359642 ns, 0.00892556 ns);
             tpd_B_Y : VitalDelayType01 := (0.0337821 ns, 0.00907768 ns);
             tpd_C_Y : VitalDelayType01 := (0.0282267 ns, 0.00845829 ns);
             tpd_D_Y : VitalDelayType01 := (0.0203826 ns, 0.00658068 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4XL : entity is TRUE;
end NOR4XL;

architecture behavioral of NOR4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA21X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0284964 ns, 0.0367956 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0257993 ns, 0.0343859 ns);
             tpd_B0_Y : VitalDelayType01 := (0.024249 ns, 0.022605 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA21X1 : entity is TRUE;
end OA21X1;

architecture behavioral of OA21X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          Y_zd := VitalAND2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA21X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0383732 ns, 0.0498383 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0355894 ns, 0.0473763 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0329446 ns, 0.0304519 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA21X2 : entity is TRUE;
end OA21X2;

architecture behavioral of OA21X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          Y_zd := VitalAND2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA21X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0412491 ns, 0.0523334 ns);
             tpd_A1_Y : VitalDelayType01 := (0.038267 ns, 0.0498587 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0354622 ns, 0.0321248 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA21X4 : entity is TRUE;
end OA21X4;

architecture behavioral of OA21X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          Y_zd := VitalAND2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA21XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.023585 ns, 0.030204 ns);
             tpd_A1_Y : VitalDelayType01 := (0.020868 ns, 0.027796 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0198709 ns, 0.0185091 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA21XL : entity is TRUE;
end OA21XL;

architecture behavioral of OA21XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          Y_zd := VitalAND2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA22X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0297996 ns, 0.039465 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0272872 ns, 0.0366388 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0273635 ns, 0.0339234 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0249516 ns, 0.0314277 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA22X1 : entity is TRUE;
end OA22X1;

architecture behavioral of OA22X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          Y_zd := VitalAND2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA22X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0386913 ns, 0.0524262 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0362214 ns, 0.0497877 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0362806 ns, 0.0474279 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0338033 ns, 0.0448145 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA22X2 : entity is TRUE;
end OA22X2;

architecture behavioral of OA22X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          Y_zd := VitalAND2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA22X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0412225 ns, 0.0550595 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0386745 ns, 0.0524221 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0388436 ns, 0.0502276 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0363334 ns, 0.0477456 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA22X4 : entity is TRUE;
end OA22X4;

architecture behavioral of OA22X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          Y_zd := VitalAND2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA22XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0251678 ns, 0.0325408 ns);
             tpd_A1_Y : VitalDelayType01 := (0.022834 ns, 0.0301368 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0227655 ns, 0.0270658 ns);
             tpd_B1_Y : VitalDelayType01 := (0.020448 ns, 0.0249244 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA22XL : entity is TRUE;
end OA22XL;

architecture behavioral of OA22XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          Y_zd := VitalAND2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI211X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0243432 ns, 0.0183656 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0219512 ns, 0.0151421 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0136982 ns, 0.0146276 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0118452 ns, 0.0133233 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI211X1 : entity is TRUE;
end OAI211X1;

architecture behavioral of OAI211X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          n2_var := VitalAND2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI211X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0240317 ns, 0.0181896 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0216641 ns, 0.015119 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0136814 ns, 0.0146846 ns);
             tpd_C0_Y : VitalDelayType01 := (0.011653 ns, 0.0129908 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI211X2 : entity is TRUE;
end OAI211X2;

architecture behavioral of OAI211X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          n2_var := VitalAND2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI211X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0243095 ns, 0.0184492 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0215914 ns, 0.0151192 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0136531 ns, 0.0147874 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0115998 ns, 0.0132046 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI211X4 : entity is TRUE;
end OAI211X4;

architecture behavioral of OAI211X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          n2_var := VitalAND2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI211XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0242047 ns, 0.0177919 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0218193 ns, 0.0146667 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0135298 ns, 0.0140928 ns);
             tpd_C0_Y : VitalDelayType01 := (0.011691 ns, 0.0128414 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI211XL : entity is TRUE;
end OAI211XL;

architecture behavioral of OAI211XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          n2_var := VitalAND2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI21X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0202495 ns, 0.0124006 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0179295 ns, 0.00995679 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0105339 ns, 0.00921295 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI21X1 : entity is TRUE;
end OAI21X1;

architecture behavioral of OAI21X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI21X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0200136 ns, 0.0122372 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0177386 ns, 0.00989212 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0103741 ns, 0.00908358 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI21X2 : entity is TRUE;
end OAI21X2;

architecture behavioral of OAI21X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI21X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0201573 ns, 0.0123147 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0176767 ns, 0.00986495 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0104146 ns, 0.00924386 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI21X4 : entity is TRUE;
end OAI21X4;

architecture behavioral of OAI21X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI21XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0200501 ns, 0.0119492 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0178559 ns, 0.00953554 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0103858 ns, 0.00875524 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI21XL : entity is TRUE;
end OAI21XL;

architecture behavioral of OAI21XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI221X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0274872 ns, 0.0215666 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0250488 ns, 0.0186251 ns);
             tpd_B0_Y : VitalDelayType01 := (0.023636 ns, 0.0193992 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0212997 ns, 0.0166377 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0127113 ns, 0.0148521 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI221X1 : entity is TRUE;
end OAI221X1;

architecture behavioral of OAI221X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI221X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.026228 ns, 0.0206025 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0238493 ns, 0.0177422 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0223538 ns, 0.0184388 ns);
             tpd_B1_Y : VitalDelayType01 := (0.020084 ns, 0.0155992 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0118832 ns, 0.0139407 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI221X2 : entity is TRUE;
end OAI221X2;

architecture behavioral of OAI221X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI221X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0263013 ns, 0.02073 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0238612 ns, 0.0177443 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0223726 ns, 0.0185448 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0200601 ns, 0.0156275 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0119672 ns, 0.0141038 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI221X4 : entity is TRUE;
end OAI221X4;

architecture behavioral of OAI221X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI221XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0269761 ns, 0.0204662 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0245029 ns, 0.0175937 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0229788 ns, 0.0183307 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0206555 ns, 0.0155583 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0122473 ns, 0.0138431 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI221XL : entity is TRUE;
end OAI221XL;

architecture behavioral of OAI221XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI222X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0303252 ns, 0.0237635 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0278569 ns, 0.0211156 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0266321 ns, 0.0219953 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0238787 ns, 0.0192874 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0206215 ns, 0.0182915 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0184826 ns, 0.0158678 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI222X1 : entity is TRUE;
end OAI222X1;

architecture behavioral of OAI222X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(C0_ipd, C1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalOR2(B0_ipd, B1_ipd);
          n4_var := VitalAND2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI222X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0293135 ns, 0.0230308 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0267232 ns, 0.0203998 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0253494 ns, 0.0212155 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0227051 ns, 0.0184734 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0196283 ns, 0.0176973 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0175118 ns, 0.0152405 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI222X2 : entity is TRUE;
end OAI222X2;

architecture behavioral of OAI222X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(C0_ipd, C1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalOR2(B0_ipd, B1_ipd);
          n4_var := VitalAND2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI222X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0292624 ns, 0.0231088 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0267415 ns, 0.0204479 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0253782 ns, 0.021285 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0226667 ns, 0.018468 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0197525 ns, 0.017878 ns);
             tpd_C1_Y : VitalDelayType01 := (0.017575 ns, 0.0152903 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI222X4 : entity is TRUE;
end OAI222X4;

architecture behavioral of OAI222X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(C0_ipd, C1_ipd);
          n1_var := VitalOR2(A0_ipd, A1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalOR2(B0_ipd, B1_ipd);
          n4_var := VitalAND2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI222XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0303749 ns, 0.0230849 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0278968 ns, 0.0205003 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0265445 ns, 0.021334 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0237692 ns, 0.0186185 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0204008 ns, 0.0176524 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0182972 ns, 0.0152048 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI222XL : entity is TRUE;
end OAI222XL;

architecture behavioral of OAI222XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(C0_ipd, C1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalOR2(B0_ipd, B1_ipd);
          n4_var := VitalAND2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI22X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0230603 ns, 0.0144153 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0205253 ns, 0.0122656 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0173893 ns, 0.0122032 ns);
             tpd_B1_Y : VitalDelayType01 := (0.015184 ns, 0.0099796 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI22X1 : entity is TRUE;
end OAI22X1;

architecture behavioral of OAI22X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI22X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0227856 ns, 0.014196 ns);
             tpd_A1_Y : VitalDelayType01 := (0.020406 ns, 0.0122273 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0173452 ns, 0.0121 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0153058 ns, 0.0101314 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI22X2 : entity is TRUE;
end OAI22X2;

architecture behavioral of OAI22X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI22X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0227921 ns, 0.0141359 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0203448 ns, 0.012133 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0174087 ns, 0.0121441 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0153338 ns, 0.0101523 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI22X4 : entity is TRUE;
end OAI22X4;

architecture behavioral of OAI22X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI22XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.02309 ns, 0.0139775 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0206136 ns, 0.0118455 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0171564 ns, 0.0116972 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0151691 ns, 0.00957168 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI22XL : entity is TRUE;
end OAI22XL;

architecture behavioral of OAI22XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB1X1 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0254585 ns, 0.0263962 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0250171 ns, 0.0245929 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0118949 ns, 0.00898113 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB1X1 : entity is TRUE;
end OAI2BB1X1;

architecture behavioral of OAI2BB1X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB1X2 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0354539 ns, 0.0345257 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0348975 ns, 0.032887 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0114031 ns, 0.00880579 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB1X2 : entity is TRUE;
end OAI2BB1X2;

architecture behavioral of OAI2BB1X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB1X4 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0381413 ns, 0.0363494 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.037513 ns, 0.0347263 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0115744 ns, 0.00900918 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB1X4 : entity is TRUE;
end OAI2BB1X4;

architecture behavioral of OAI2BB1X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB1XL is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0206055 ns, 0.022204 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.020241 ns, 0.0204207 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0117562 ns, 0.00844287 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB1XL : entity is TRUE;
end OAI2BB1XL;

architecture behavioral of OAI2BB1XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB2X1 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0328738 ns, 0.0299407 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0289689 ns, 0.0278623 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0171163 ns, 0.0120077 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0149888 ns, 0.00975288 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB2X1 : entity is TRUE;
end OAI2BB2X1;

architecture behavioral of OAI2BB2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB2X2 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0401131 ns, 0.0384985 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0353089 ns, 0.0364742 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0170369 ns, 0.0118764 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0149739 ns, 0.00979999 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB2X2 : entity is TRUE;
end OAI2BB2X2;

architecture behavioral of OAI2BB2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB2X4 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0423437 ns, 0.0405109 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0369616 ns, 0.0382578 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0170504 ns, 0.012064 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0150704 ns, 0.00998809 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB2X4 : entity is TRUE;
end OAI2BB2X4;

architecture behavioral of OAI2BB2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB2XL is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0290914 ns, 0.0254881 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0257557 ns, 0.0235083 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0168582 ns, 0.0115246 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0149301 ns, 0.00936864 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB2XL : entity is TRUE;
end OAI2BB2XL;

architecture behavioral of OAI2BB2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI31X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0309142 ns, 0.0140667 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0287359 ns, 0.0132104 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0231718 ns, 0.0105462 ns);
             tpd_B0_Y : VitalDelayType01 := (0.010549 ns, 0.00982732 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI31X1 : entity is TRUE;
end OAI31X1;

architecture behavioral of OAI31X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI31X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0312252 ns, 0.0139654 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0290206 ns, 0.0132042 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0230426 ns, 0.0105601 ns);
             tpd_B0_Y : VitalDelayType01 := (0.010428 ns, 0.00966707 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI31X2 : entity is TRUE;
end OAI31X2;

architecture behavioral of OAI31X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI31X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0314321 ns, 0.0141414 ns);
             tpd_A1_Y : VitalDelayType01 := (0.028887 ns, 0.013209 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0229662 ns, 0.0104974 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0104326 ns, 0.0098384 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI31X4 : entity is TRUE;
end OAI31X4;

architecture behavioral of OAI31X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI31XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0307592 ns, 0.0135648 ns);
             tpd_A1_Y : VitalDelayType01 := (0.028576 ns, 0.0127559 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0229928 ns, 0.0101247 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0103989 ns, 0.00937462 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI31XL : entity is TRUE;
end OAI31XL;

architecture behavioral of OAI31XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI32X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0352547 ns, 0.0160547 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0329015 ns, 0.0152032 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0271288 ns, 0.0129037 ns);
             tpd_B0_Y : VitalDelayType01 := (0.017483 ns, 0.0127638 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0154009 ns, 0.0107049 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI32X1 : entity is TRUE;
end OAI32X1;

architecture behavioral of OAI32X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI32X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0350887 ns, 0.0157637 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0327852 ns, 0.0149928 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0267995 ns, 0.0127142 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0173054 ns, 0.0125011 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0152896 ns, 0.010674 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI32X2 : entity is TRUE;
end OAI32X2;

architecture behavioral of OAI32X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI32X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0353859 ns, 0.0159441 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0327776 ns, 0.0150354 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0267363 ns, 0.0126967 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0173852 ns, 0.0127552 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0153278 ns, 0.0107505 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI32X4 : entity is TRUE;
end OAI32X4;

architecture behavioral of OAI32X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI32XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.035607 ns, 0.0156996 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0329867 ns, 0.0148626 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0269858 ns, 0.0125014 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0174126 ns, 0.0124105 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0152518 ns, 0.0102913 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI32XL : entity is TRUE;
end OAI32XL;

architecture behavioral of OAI32XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI33X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0387432 ns, 0.0177361 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0366127 ns, 0.0168256 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0305795 ns, 0.0144339 ns);
             tpd_B0_Y : VitalDelayType01 := (0.027495 ns, 0.0145584 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0253223 ns, 0.0136636 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0200043 ns, 0.0114118 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI33X1 : entity is TRUE;
end OAI33X1;

architecture behavioral of OAI33X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n2_var, B2_ipd);
          n4_var := VitalAND2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI33X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0395821 ns, 0.0178367 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0369625 ns, 0.0167979 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0307905 ns, 0.0144082 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0276135 ns, 0.0145658 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0253132 ns, 0.0135916 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0201159 ns, 0.0114168 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI33X2 : entity is TRUE;
end OAI33X2;

architecture behavioral of OAI33X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n2_var, B2_ipd);
          n4_var := VitalAND2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI33X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0400259 ns, 0.018286 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0373055 ns, 0.0172269 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0312659 ns, 0.0147905 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0285438 ns, 0.015066 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0258728 ns, 0.014013 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0202146 ns, 0.0116298 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI33X4 : entity is TRUE;
end OAI33X4;

architecture behavioral of OAI33X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n2_var, B2_ipd);
          n4_var := VitalAND2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI33XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0387653 ns, 0.0173158 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0365926 ns, 0.0164355 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0305935 ns, 0.0140555 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0274236 ns, 0.0140875 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0253142 ns, 0.0132834 ns);
             tpd_B2_Y : VitalDelayType01 := (0.019704 ns, 0.0109832 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI33XL : entity is TRUE;
end OAI33XL;

architecture behavioral of OAI33XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n2_var, B2_ipd);
          n4_var := VitalAND2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0200936 ns, 0.0316442 ns);
             tpd_B_Y : VitalDelayType01 := (0.0185452 ns, 0.0293881 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2X1 : entity is TRUE;
end OR2X1;

architecture behavioral of OR2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0262898 ns, 0.0450023 ns);
             tpd_B_Y : VitalDelayType01 := (0.0246593 ns, 0.0426223 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2X2 : entity is TRUE;
end OR2X2;

architecture behavioral of OR2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0280362 ns, 0.0479326 ns);
             tpd_B_Y : VitalDelayType01 := (0.026482 ns, 0.0455774 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2X4 : entity is TRUE;
end OR2X4;

architecture behavioral of OR2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0244302 ns, 0.0403667 ns);
             tpd_B_Y : VitalDelayType01 := (0.0231203 ns, 0.0380172 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2X6 : entity is TRUE;
end OR2X6;

architecture behavioral of OR2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0279968 ns, 0.0478415 ns);
             tpd_B_Y : VitalDelayType01 := (0.026698 ns, 0.0454803 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2X8 : entity is TRUE;
end OR2X8;

architecture behavioral of OR2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0167233 ns, 0.0249991 ns);
             tpd_B_Y : VitalDelayType01 := (0.0150867 ns, 0.0229199 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2XL : entity is TRUE;
end OR2XL;

architecture behavioral of OR2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0217693 ns, 0.0457806 ns);
             tpd_B_Y : VitalDelayType01 := (0.0210132 ns, 0.0433762 ns);
             tpd_C_Y : VitalDelayType01 := (0.019311 ns, 0.0377548 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3X1 : entity is TRUE;
end OR3X1;

architecture behavioral of OR3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0281485 ns, 0.0643641 ns);
             tpd_B_Y : VitalDelayType01 := (0.0271871 ns, 0.0621221 ns);
             tpd_C_Y : VitalDelayType01 := (0.0254021 ns, 0.0563508 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3X2 : entity is TRUE;
end OR3X2;

architecture behavioral of OR3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0300064 ns, 0.0683339 ns);
             tpd_B_Y : VitalDelayType01 := (0.0288842 ns, 0.0659737 ns);
             tpd_C_Y : VitalDelayType01 := (0.0271303 ns, 0.0603356 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3X4 : entity is TRUE;
end OR3X4;

architecture behavioral of OR3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0260844 ns, 0.0576653 ns);
             tpd_B_Y : VitalDelayType01 := (0.0250756 ns, 0.0552936 ns);
             tpd_C_Y : VitalDelayType01 := (0.0233991 ns, 0.0493581 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3X6 : entity is TRUE;
end OR3X6;

architecture behavioral of OR3X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0297677 ns, 0.0681608 ns);
             tpd_B_Y : VitalDelayType01 := (0.0286461 ns, 0.0658216 ns);
             tpd_C_Y : VitalDelayType01 := (0.0269298 ns, 0.05979 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3X8 : entity is TRUE;
end OR3X8;

architecture behavioral of OR3X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0184109 ns, 0.0365128 ns);
             tpd_B_Y : VitalDelayType01 := (0.0177309 ns, 0.0343037 ns);
             tpd_C_Y : VitalDelayType01 := (0.0159127 ns, 0.0288307 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3XL : entity is TRUE;
end OR3XL;

architecture behavioral of OR3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.02253 ns, 0.0615037 ns);
             tpd_B_Y : VitalDelayType01 := (0.0222269 ns, 0.0589072 ns);
             tpd_C_Y : VitalDelayType01 := (0.0212766 ns, 0.0535327 ns);
             tpd_D_Y : VitalDelayType01 := (0.0196842 ns, 0.045237 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4X1 : entity is TRUE;
end OR4X1;

architecture behavioral of OR4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.029279 ns, 0.0862426 ns);
             tpd_B_Y : VitalDelayType01 := (0.0287193 ns, 0.0838535 ns);
             tpd_C_Y : VitalDelayType01 := (0.0274584 ns, 0.0778052 ns);
             tpd_D_Y : VitalDelayType01 := (0.02574 ns, 0.0689092 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4X2 : entity is TRUE;
end OR4X2;

architecture behavioral of OR4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0311082 ns, 0.0906089 ns);
             tpd_B_Y : VitalDelayType01 := (0.0306456 ns, 0.088387 ns);
             tpd_C_Y : VitalDelayType01 := (0.0293645 ns, 0.0827831 ns);
             tpd_D_Y : VitalDelayType01 := (0.0275027 ns, 0.0739835 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4X4 : entity is TRUE;
end OR4X4;

architecture behavioral of OR4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.027273 ns, 0.077147 ns);
             tpd_B_Y : VitalDelayType01 := (0.0269139 ns, 0.0750137 ns);
             tpd_C_Y : VitalDelayType01 := (0.0258011 ns, 0.0695484 ns);
             tpd_D_Y : VitalDelayType01 := (0.0241059 ns, 0.0604242 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4X6 : entity is TRUE;
end OR4X6;

architecture behavioral of OR4X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0311347 ns, 0.0906768 ns);
             tpd_B_Y : VitalDelayType01 := (0.0306333 ns, 0.088512 ns);
             tpd_C_Y : VitalDelayType01 := (0.0293961 ns, 0.0830328 ns);
             tpd_D_Y : VitalDelayType01 := (0.027705 ns, 0.0738504 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4X8 : entity is TRUE;
end OR4X8;

architecture behavioral of OR4X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.019152 ns, 0.050163 ns);
             tpd_B_Y : VitalDelayType01 := (0.0190247 ns, 0.0479714 ns);
             tpd_C_Y : VitalDelayType01 := (0.0181411 ns, 0.0421379 ns);
             tpd_D_Y : VitalDelayType01 := (0.0163001 ns, 0.0335685 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4XL : entity is TRUE;
end OR4XL;

architecture behavioral of OR4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0527205 ns;
             tpw_CK_negedge : VitalDelayType := 0.0580637 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0582909 ns, 0.0685128 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFHQX1 : entity is TRUE;
end SDFFHQX1;

architecture behavioral of SDFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0002 := VitalINV(N30);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0554253 ns;
             tpw_CK_negedge : VitalDelayType := 0.0580896 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100386 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0631692 ns, 0.0741086 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFHQX2 : entity is TRUE;
end SDFFHQX2;

architecture behavioral of SDFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0002 := VitalINV(N30);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0602218 ns;
             tpw_CK_negedge : VitalDelayType := 0.0580183 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0694828 ns, 0.0774008 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFHQX4 : entity is TRUE;
end SDFFHQX4;

architecture behavioral of SDFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0696443 ns;
             tpw_CK_negedge : VitalDelayType := 0.0579708 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100653 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.0947609 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0822886 ns, 0.0872803 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFHQX8 : entity is TRUE;
end SDFFHQX8;

architecture behavioral of SDFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFNSRX1 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CKN : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             tpw_CKN_posedge : VitalDelayType := 0.0437272 ns;
             tpw_CKN_negedge : VitalDelayType := 0.0572051 ns;
             tpw_RN_negedge : VitalDelayType := 0.0645149 ns;
             tpw_SN_negedge : VitalDelayType := 0.0481072 ns;
             tsetup_SI_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_SI_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SI_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SI_CKN_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tsetup_SE_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_SE_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SE_CKN_posedge_negedge : VitalDelayType := 0.0468749 ns;
             thold_SE_CKN_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.0687551 ns, 0.0639863 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.080397 ns, 0.0828945 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0785931 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0949599 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0625617 ns, 0.0642696 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0806408 ns, 0.0766461 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFNSRX1 : entity is TRUE;
end SDFFNSRX1;

architecture behavioral of SDFFNSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CKN );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SI_CKN_posedge_negedge,
                    SetupLow       => tsetup_SI_CKN_negedge_negedge,
                    HoldHigh       => thold_SI_CKN_posedge_negedge,
                    HoldLow        => thold_SI_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_SI_CKN,
                    Violation      => Tviol_SI_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SE_CKN_posedge_negedge,
                    SetupLow       => tsetup_SE_CKN_negedge_negedge,
                    HoldHigh       => thold_SE_CKN_posedge_negedge,
                    HoldLow        => thold_SE_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_SE_CKN,
                    Violation      => Tviol_SE_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_SI_CKN OR
                        Tviol_SE_CKN OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFNSRX2 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CKN : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             tpw_CKN_posedge : VitalDelayType := 0.0438078 ns;
             tpw_CKN_negedge : VitalDelayType := 0.0656122 ns;
             tpw_RN_negedge : VitalDelayType := 0.0718218 ns;
             tpw_SN_negedge : VitalDelayType := 0.055645 ns;
             tsetup_SI_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_SI_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SI_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SI_CKN_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tsetup_SE_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_SE_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SE_CKN_posedge_negedge : VitalDelayType := 0.0468749 ns;
             thold_SE_CKN_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.0733883 ns, 0.0682822 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.0937303 ns, 0.0973687 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0828851 ns);
             tpd_RN_QN : VitalDelayType01 := (0.108416 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0676442 ns, 0.0686986 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0942007 ns, 0.0913056 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFNSRX2 : entity is TRUE;
end SDFFNSRX2;

architecture behavioral of SDFFNSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CKN );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SI_CKN_posedge_negedge,
                    SetupLow       => tsetup_SI_CKN_negedge_negedge,
                    HoldHigh       => thold_SI_CKN_posedge_negedge,
                    HoldLow        => thold_SI_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_SI_CKN,
                    Violation      => Tviol_SI_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SE_CKN_posedge_negedge,
                    SetupLow       => tsetup_SE_CKN_negedge_negedge,
                    HoldHigh       => thold_SE_CKN_posedge_negedge,
                    HoldLow        => thold_SE_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_SE_CKN,
                    Violation      => Tviol_SE_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_SI_CKN OR
                        Tviol_SE_CKN OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0000 := VitalINV(P0002);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFNSRX4 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CKN : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             tpw_CKN_posedge : VitalDelayType := 0.0436584 ns;
             tpw_CKN_negedge : VitalDelayType := 0.074086 ns;
             tpw_RN_negedge : VitalDelayType := 0.076701 ns;
             tpw_SN_negedge : VitalDelayType := 0.0624906 ns;
             tsetup_SI_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_SI_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SI_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SI_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tsetup_SE_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_SE_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SE_CKN_posedge_negedge : VitalDelayType := 0.0468749 ns;
             thold_SE_CKN_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.0829569 ns, 0.076988 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.10425 ns, 0.108669 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0924847 ns);
             tpd_RN_QN : VitalDelayType01 := (0.119817 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0781009 ns, 0.0787843 ns);
             tpd_SN_QN : VitalDelayType01 := (0.10609 ns, 0.103368 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFNSRX4 : entity is TRUE;
end SDFFNSRX4;

architecture behavioral of SDFFNSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CKN );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SI_CKN_posedge_negedge,
                    SetupLow       => tsetup_SI_CKN_negedge_negedge,
                    HoldHigh       => thold_SI_CKN_posedge_negedge,
                    HoldLow        => thold_SI_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_SI_CKN,
                    Violation      => Tviol_SI_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SE_CKN_posedge_negedge,
                    SetupLow       => tsetup_SE_CKN_negedge_negedge,
                    HoldHigh       => thold_SE_CKN_posedge_negedge,
                    HoldLow        => thold_SE_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_SE_CKN,
                    Violation      => Tviol_SE_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_SI_CKN OR
                        Tviol_SE_CKN OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0000 := VitalINV(P0002);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFNSRXL is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CKN : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             tpw_CKN_posedge : VitalDelayType := 0.0436743 ns;
             tpw_CKN_negedge : VitalDelayType := 0.0528278 ns;
             tpw_RN_negedge : VitalDelayType := 0.0597176 ns;
             tpw_SN_negedge : VitalDelayType := 0.0436678 ns;
             tsetup_SI_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_SI_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SI_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SI_CKN_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tsetup_SE_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_SE_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_SE_CKN_posedge_negedge : VitalDelayType := 0.0468749 ns;
             thold_SE_CKN_negedge_negedge : VitalDelayType := 0.00000000000000041 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.0650514 ns, 0.0597281 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.0711048 ns, 0.0739447 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.074156 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0855266 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0588908 ns, 0.059932 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0712723 ns, 0.0677497 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFNSRXL : entity is TRUE;
end SDFFNSRXL;

architecture behavioral of SDFFNSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CKN );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SI_CKN_posedge_negedge,
                    SetupLow       => tsetup_SI_CKN_negedge_negedge,
                    HoldHigh       => thold_SI_CKN_posedge_negedge,
                    HoldLow        => thold_SI_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_SI_CKN,
                    Violation      => Tviol_SI_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SE_CKN_posedge_negedge,
                    SetupLow       => tsetup_SE_CKN_negedge_negedge,
                    HoldHigh       => thold_SE_CKN_posedge_negedge,
                    HoldLow        => thold_SE_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_SE_CKN,
                    Violation      => Tviol_SE_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_SI_CKN OR
                        Tviol_SE_CKN OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0481858 ns;
             tpw_CK_negedge : VitalDelayType := 0.0533088 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0559698 ns, 0.0639508 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFQX1 : entity is TRUE;
end SDFFQX1;

architecture behavioral of SDFFQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0514476 ns;
             tpw_CK_negedge : VitalDelayType := 0.0534674 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0614639 ns, 0.0678496 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFQX2 : entity is TRUE;
end SDFFQX2;

architecture behavioral of SDFFQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0576878 ns;
             tpw_CK_negedge : VitalDelayType := 0.0533292 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0693902 ns, 0.0733008 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFQX4 : entity is TRUE;
end SDFFQX4;

architecture behavioral of SDFFQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFQXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0459516 ns;
             tpw_CK_negedge : VitalDelayType := 0.0533679 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0521794 ns, 0.059535 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFQXL : entity is TRUE;
end SDFFQXL;

architecture behavioral of SDFFQXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFQXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.053443 ns;
             tpw_CK_negedge : VitalDelayType := 0.0571733 ns;
             tpw_RN_negedge : VitalDelayType := 0.0353237 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0665207 ns, 0.0695614 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.02525 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRHQX1 : entity is TRUE;
end SDFFRHQX1;

architecture behavioral of SDFFRHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0563098 ns;
             tpw_CK_negedge : VitalDelayType := 0.0571793 ns;
             tpw_RN_negedge : VitalDelayType := 0.0381897 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0738548 ns, 0.075296 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0305645 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRHQX2 : entity is TRUE;
end SDFFRHQX2;

architecture behavioral of SDFFRHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0604482 ns;
             tpw_CK_negedge : VitalDelayType := 0.0579019 ns;
             tpw_RN_negedge : VitalDelayType := 0.0395955 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0782126 ns, 0.0781331 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0282194 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRHQX4 : entity is TRUE;
end SDFFRHQX4;

architecture behavioral of SDFFRHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0003 := VitalINV(P0002);

          Q_zd := VitalINV(P0003);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0714099 ns;
             tpw_CK_negedge : VitalDelayType := 0.057443 ns;
             tpw_RN_negedge : VitalDelayType := 0.0431708 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0913902 ns, 0.0882277 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0287225 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRHQX8 : entity is TRUE;
end SDFFRHQX8;

architecture behavioral of SDFFRHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0597909 ns;
             tpw_CK_negedge : VitalDelayType := 0.0531641 ns;
             tpw_RN_negedge : VitalDelayType := 0.0385087 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0711686 ns, 0.0697468 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0858223 ns, 0.0864185 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0318432 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0484336 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRX1 : entity is TRUE;
end SDFFRX1;

architecture behavioral of SDFFRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0680629 ns;
             tpw_CK_negedge : VitalDelayType := 0.0529128 ns;
             tpw_RN_negedge : VitalDelayType := 0.0417648 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0750403 ns, 0.0716527 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0967265 ns, 0.100942 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0316483 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0573089 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRX2 : entity is TRUE;
end SDFFRX2;

architecture behavioral of SDFFRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE QBINT : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          QBINT := VitalINV(N30);

          Q_zd := VitalINV(QBINT);

          QN_zd := VitalBUF(QBINT);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0752924 ns;
             tpw_CK_negedge : VitalDelayType := 0.0530942 ns;
             tpw_RN_negedge : VitalDelayType := 0.041837 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0820201 ns, 0.0773796 ns);
             tpd_CK_QN : VitalDelayType01 := (0.105185 ns, 0.109145 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.029882 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0580988 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRX4 : entity is TRUE;
end SDFFRX4;

architecture behavioral of SDFFRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0546346 ns;
             tpw_CK_negedge : VitalDelayType := 0.0529583 ns;
             tpw_RN_negedge : VitalDelayType := 0.0366385 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0659557 ns, 0.065291 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0764234 ns, 0.0752476 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0277786 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0391908 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRXL : entity is TRUE;
end SDFFRXL;

architecture behavioral of SDFFRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0613091 ns;
             tpw_CK_negedge : VitalDelayType := 0.0562048 ns;
             tpw_RN_negedge : VitalDelayType := 0.064426 ns;
             tpw_SN_negedge : VitalDelayType := 0.048079 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.063275 ns, 0.0720204 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0884133 ns, 0.0773663 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0785189 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0948815 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.062576 ns, 0.0642129 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0805796 ns, 0.0766535 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRX1 : entity is TRUE;
end SDFFSRX1;

architecture behavioral of SDFFSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0545785 ns;
             tpw_CK_negedge : VitalDelayType := 0.0600881 ns;
             tpw_SN_negedge : VitalDelayType := 0.0338769 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0583284 ns, 0.0720507 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0516374 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSHQX1 : entity is TRUE;
end SDFFSHQX1;

architecture behavioral of SDFFSHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE N35 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N35 := n0_vec(1);

          P0001 := VitalINV(N35);

          Q_zd := VitalINV(P0001);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0575521 ns;
             tpw_CK_negedge : VitalDelayType := 0.0601097 ns;
             tpw_SN_negedge : VitalDelayType := 0.0365243 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0632987 ns, 0.0780932 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0569069 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSHQX2 : entity is TRUE;
end SDFFSHQX2;

architecture behavioral of SDFFSHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0629951 ns;
             tpw_CK_negedge : VitalDelayType := 0.0602409 ns;
             tpw_SN_negedge : VitalDelayType := 0.0402009 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0696387 ns, 0.0827018 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0630779 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSHQX4 : entity is TRUE;
end SDFFSHQX4;

architecture behavioral of SDFFSHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0739984 ns;
             tpw_CK_negedge : VitalDelayType := 0.0601977 ns;
             tpw_SN_negedge : VitalDelayType := 0.0487496 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0821654 ns, 0.095633 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0777632 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSHQX8 : entity is TRUE;
end SDFFSHQX8;

architecture behavioral of SDFFSHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0551613 ns;
             tpw_CK_negedge : VitalDelayType := 0.0606118 ns;
             tpw_RN_negedge : VitalDelayType := 0.057798 ns;
             tpw_SN_negedge : VitalDelayType := 0.0376099 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0610605 ns, 0.0714018 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0760694 ns);
             tpd_SN_Q : VitalDelayType01 := (0.055811 ns, 0.0576124 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRHQX1 : entity is TRUE;
end SDFFSRHQX1;

architecture behavioral of SDFFSRHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0582576 ns;
             tpw_CK_negedge : VitalDelayType := 0.0605406 ns;
             tpw_RN_negedge : VitalDelayType := 0.0611681 ns;
             tpw_SN_negedge : VitalDelayType := 0.0403933 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0668545 ns, 0.0776319 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0827058 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0616424 ns, 0.0641818 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRHQX2 : entity is TRUE;
end SDFFSRHQX2;

architecture behavioral of SDFFSRHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0640224 ns;
             tpw_CK_negedge : VitalDelayType := 0.060467 ns;
             tpw_RN_negedge : VitalDelayType := 0.0644111 ns;
             tpw_SN_negedge : VitalDelayType := 0.0444753 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0744291 ns, 0.082367 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0891672 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0684856 ns, 0.0708692 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRHQX4 : entity is TRUE;
end SDFFSRHQX4;

architecture behavioral of SDFFSRHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0758902 ns;
             tpw_CK_negedge : VitalDelayType := 0.060577 ns;
             tpw_RN_negedge : VitalDelayType := 0.0716918 ns;
             tpw_SN_negedge : VitalDelayType := 0.0528883 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0905373 ns, 0.0953401 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.104944 ns);
             tpd_SN_Q : VitalDelayType01 := (0.083694 ns, 0.086469 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRHQX8 : entity is TRUE;
end SDFFSRHQX8;

architecture behavioral of SDFFSRHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0003 := VitalINV(P0002);

          Q_zd := VitalINV(P0003);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0686851 ns;
             tpw_CK_negedge : VitalDelayType := 0.0563289 ns;
             tpw_RN_negedge : VitalDelayType := 0.0712378 ns;
             tpw_SN_negedge : VitalDelayType := 0.0554028 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.06867 ns, 0.0749623 ns);
             tpd_CK_QN : VitalDelayType01 := (0.100344 ns, 0.0926097 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0825376 ns);
             tpd_RN_QN : VitalDelayType01 := (0.107976 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0673491 ns, 0.0682134 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0936752 ns, 0.0909706 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRX2 : entity is TRUE;
end SDFFSRX2;

architecture behavioral of SDFFSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE QBINT : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          QBINT := VitalINV(P0000);

          Q_zd := VitalINV(QBINT);

          QN_zd := VitalBUF(QBINT);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0778284 ns;
             tpw_CK_negedge : VitalDelayType := 0.0563874 ns;
             tpw_RN_negedge : VitalDelayType := 0.0765979 ns;
             tpw_SN_negedge : VitalDelayType := 0.0624681 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.0791326 ns, 0.0831592 ns);
             tpd_CK_QN : VitalDelayType01 := (0.110439 ns, 0.104759 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0925871 ns);
             tpd_RN_QN : VitalDelayType01 := (0.119931 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0781524 ns, 0.0787774 ns);
             tpd_SN_QN : VitalDelayType01 := (0.106124 ns, 0.103468 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRX4 : entity is TRUE;
end SDFFSRX4;

architecture behavioral of SDFFSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0000 := VitalINV(P0002);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.0566418 ns;
             tpw_CK_negedge : VitalDelayType := 0.0562435 ns;
             tpw_RN_negedge : VitalDelayType := 0.0595947 ns;
             tpw_SN_negedge : VitalDelayType := 0.0436241 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.059497 ns, 0.0676554 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0790064 ns, 0.0682877 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0739593 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0852759 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0587516 ns, 0.0596644 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0709672 ns, 0.0675729 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRXL : entity is TRUE;
end SDFFSRXL;

architecture behavioral of SDFFSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0607277 ns;
             tpw_CK_negedge : VitalDelayType := 0.0561 ns;
             tpw_SN_negedge : VitalDelayType := 0.0440841 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0602521 ns, 0.072432 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0887303 ns, 0.0740453 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0581961 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.0719412 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSX1 : entity is TRUE;
end SDFFSX1;

architecture behavioral of SDFFSX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE N35 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N35 := n0_vec(1);

          P0002 := VitalINV(N35);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0681607 ns;
             tpw_CK_negedge : VitalDelayType := 0.0560401 ns;
             tpw_SN_negedge : VitalDelayType := 0.0513844 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0645503 ns, 0.0755129 ns);
             tpd_CK_QN : VitalDelayType01 := (0.100999 ns, 0.0882081 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0624986 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.0860842 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSX2 : entity is TRUE;
end SDFFSX2;

architecture behavioral of SDFFSX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0771545 ns;
             tpw_CK_negedge : VitalDelayType := 0.0558936 ns;
             tpw_SN_negedge : VitalDelayType := 0.0591199 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0727645 ns, 0.0837514 ns);
             tpd_CK_QN : VitalDelayType01 := (0.112039 ns, 0.0988312 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0732106 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.0991704 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSX4 : entity is TRUE;
end SDFFSX4;

architecture behavioral of SDFFSX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.0559971 ns;
             tpw_CK_negedge : VitalDelayType := 0.0560007 ns;
             tpw_SN_negedge : VitalDelayType := 0.0397589 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0568573 ns, 0.0680075 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0792297 ns, 0.0655218 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0546573 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.0633112 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSXL : entity is TRUE;
end SDFFSXL;

architecture behavioral of SDFFSXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE N35 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N35 := n0_vec(1);

          P0002 := VitalINV(N35);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFTRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.058365 ns;
             tpw_CK_negedge : VitalDelayType := 0.0524747 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09476 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0598956 ns, 0.0683823 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0843511 ns, 0.0735769 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFTRX1 : entity is TRUE;
end SDFFTRX1;

architecture behavioral of SDFFTRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX1",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFTRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalAND2(D_dly, RN_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          n2_var := VitalINV(SE_dly);
          D_EQ_1_AN_SE_EQ_0 := VitalAND2(D_dly, n2_var);

          n3_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFTRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0651969 ns;
             tpw_CK_negedge : VitalDelayType := 0.0526001 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0640647 ns, 0.0706245 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0955039 ns, 0.087337 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFTRX2 : entity is TRUE;
end SDFFTRX2;

architecture behavioral of SDFFTRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX2",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFTRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalAND2(D_dly, RN_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          n2_var := VitalINV(SE_dly);
          D_EQ_1_AN_SE_EQ_0 := VitalAND2(D_dly, n2_var);

          n3_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFTRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.072706 ns;
             tpw_CK_negedge : VitalDelayType := 0.0524125 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0730681 ns, 0.0764871 ns);
             tpd_CK_QN : VitalDelayType01 := (0.102962 ns, 0.0978345 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFTRX4 : entity is TRUE;
end SDFFTRX4;

architecture behavioral of SDFFTRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX4",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFTRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalAND2(D_dly, RN_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          n2_var := VitalINV(SE_dly);
          D_EQ_1_AN_SE_EQ_0 := VitalAND2(D_dly, n2_var);

          n3_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFTRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0537749 ns;
             tpw_CK_negedge : VitalDelayType := 0.0525057 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0563503 ns, 0.0641706 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0752314 ns, 0.0649907 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFTRXL : entity is TRUE;
end SDFFTRXL;

architecture behavioral of SDFFTRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRXL",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFTRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalAND2(D_dly, RN_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          n2_var := VitalINV(SE_dly);
          D_EQ_1_AN_SE_EQ_0 := VitalAND2(D_dly, n2_var);

          n3_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0583455 ns;
             tpw_CK_negedge : VitalDelayType := 0.0534032 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.0947586 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0599144 ns, 0.0683444 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0843053 ns, 0.0735794 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFX1 : entity is TRUE;
end SDFFX1;

architecture behavioral of SDFFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0653902 ns;
             tpw_CK_negedge : VitalDelayType := 0.0532734 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0644559 ns, 0.070793 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0956348 ns, 0.0877523 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFX2 : entity is TRUE;
end SDFFX2;

architecture behavioral of SDFFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0726814 ns;
             tpw_CK_negedge : VitalDelayType := 0.053332 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0729868 ns, 0.0764816 ns);
             tpd_CK_QN : VitalDelayType01 := (0.102972 ns, 0.0978096 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFX4 : entity is TRUE;
end SDFFX4;

architecture behavioral of SDFFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.053851 ns;
             tpw_CK_negedge : VitalDelayType := 0.0534697 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0565605 ns, 0.0642806 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0753384 ns, 0.0652123 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFXL : entity is TRUE;
end SDFFXL;

architecture behavioral of SDFFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.054764 ns;
             tpw_CK_negedge : VitalDelayType := 0.057342 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100597 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.0947551 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0624547 ns, 0.0728379 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFHQX1 : entity is TRUE;
end SEDFFHQX1;

architecture behavioral of SEDFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0570232 ns;
             tpw_CK_negedge : VitalDelayType := 0.0573065 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0658461 ns, 0.0757008 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFHQX2 : entity is TRUE;
end SEDFFHQX2;

architecture behavioral of SEDFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0618586 ns;
             tpw_CK_negedge : VitalDelayType := 0.0575274 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0730437 ns, 0.0801268 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFHQX4 : entity is TRUE;
end SEDFFHQX4;

architecture behavioral of SEDFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0721353 ns;
             tpw_CK_negedge : VitalDelayType := 0.0579019 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0861897 ns, 0.0916541 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFHQX8 : entity is TRUE;
end SEDFFHQX8;

architecture behavioral of SEDFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX8",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0001);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0001 := VitalINV(P0003);

          Q_zd := VitalINV(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFTRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0599501 ns;
             tpw_CK_negedge : VitalDelayType := 0.0530435 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0634561 ns, 0.0706017 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0870138 ns, 0.0772699 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFTRX1 : entity is TRUE;
end SEDFFTRX1;

architecture behavioral of SEDFFTRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n8_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n9_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n10_var : std_ulogic;
      VARIABLE n11_var : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n8_var := VitalAND2(n7_var, RN_dly);
          n0_D := VitalMUX2(SI_dly, n8_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n9_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n9_var);

          n10_var := VitalAND2(E_dly, RN_dly);
          n11_var := VitalINV(SE_dly);
          E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 := VitalAND2(n10_var, n11_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFTRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0662729 ns;
             tpw_CK_negedge : VitalDelayType := 0.0533073 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0663877 ns, 0.0722296 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0975655 ns, 0.0897098 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFTRX2 : entity is TRUE;
end SEDFFTRX2;

architecture behavioral of SEDFFTRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n8_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n9_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n10_var : std_ulogic;
      VARIABLE n11_var : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n8_var := VitalAND2(n7_var, RN_dly);
          n0_D := VitalMUX2(SI_dly, n8_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0000 := VitalINV(P0003);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n9_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n9_var);

          n10_var := VitalAND2(E_dly, RN_dly);
          n11_var := VitalINV(SE_dly);
          E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 := VitalAND2(n10_var, n11_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFTRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0728317 ns;
             tpw_CK_negedge : VitalDelayType := 0.0531811 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00101075 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0737181 ns, 0.0771697 ns);
             tpd_CK_QN : VitalDelayType01 := (0.103775 ns, 0.0986097 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFTRX4 : entity is TRUE;
end SEDFFTRX4;

architecture behavioral of SEDFFTRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n8_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n9_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n10_var : std_ulogic;
      VARIABLE n11_var : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n8_var := VitalAND2(n7_var, RN_dly);
          n0_D := VitalMUX2(SI_dly, n8_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0000 := VitalINV(P0003);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n9_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n9_var);

          n10_var := VitalAND2(E_dly, RN_dly);
          n11_var := VitalINV(SE_dly);
          E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 := VitalAND2(n10_var, n11_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFTRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0553821 ns;
             tpw_CK_negedge : VitalDelayType := 0.0530393 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.0010052 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00101252 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0601161 ns, 0.066586 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0778619 ns, 0.0687859 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFTRXL : entity is TRUE;
end SEDFFTRXL;

architecture behavioral of SEDFFTRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n8_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n9_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n10_var : std_ulogic;
      VARIABLE n11_var : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n8_var := VitalAND2(n7_var, RN_dly);
          n0_D := VitalMUX2(SI_dly, n8_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n9_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n9_var);

          n10_var := VitalAND2(E_dly, RN_dly);
          n11_var := VitalINV(SE_dly);
          E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 := VitalAND2(n10_var, n11_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0605052 ns;
             tpw_CK_negedge : VitalDelayType := 0.0532073 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0600125 ns, 0.0679007 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0885796 ns, 0.078397 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFX1 : entity is TRUE;
end SEDFFX1;

architecture behavioral of SEDFFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0677401 ns;
             tpw_CK_negedge : VitalDelayType := 0.0531876 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0648117 ns, 0.0705817 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0999287 ns, 0.0928325 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFX2 : entity is TRUE;
end SEDFFX2;

architecture behavioral of SEDFFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0002);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0735884 ns;
             tpw_CK_negedge : VitalDelayType := 0.0533281 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100564 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0726346 ns, 0.0761638 ns);
             tpd_CK_QN : VitalDelayType01 := (0.105148 ns, 0.100229 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFX4 : entity is TRUE;
end SEDFFX4;

architecture behavioral of SEDFFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0003);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.05619 ns;
             tpw_CK_negedge : VitalDelayType := 0.053251 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0566108 ns, 0.0639979 ns);
             tpd_CK_QN : VitalDelayType01 := (0.0798834 ns, 0.070118 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFXL : entity is TRUE;
end SEDFFXL;

architecture behavioral of SEDFFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFXL",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SMDFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0529851 ns;
             tpw_CK_negedge : VitalDelayType := 0.0587378 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100764 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0586273 ns, 0.0688217 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SMDFFHQX1 : entity is TRUE;
end SMDFFHQX1;

architecture behavioral of SMDFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE S0_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S0_EQ_0_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n1_var := VitalMUX2(D1_dly, D0_dly, S0_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n2_var := VitalINV(SE_dly);
          S0_EQ_1_AN_SE_EQ_0 := VitalAND2(S0_dly, n2_var);

          n3_var := VitalINV(S0_dly);
          n4_var := VitalINV(SE_dly);
          S0_EQ_0_AN_SE_EQ_0 := VitalAND2(n3_var, n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SMDFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0559967 ns;
             tpw_CK_negedge : VitalDelayType := 0.0589874 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100442 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0630909 ns, 0.0729954 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SMDFFHQX2 : entity is TRUE;
end SMDFFHQX2;

architecture behavioral of SMDFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE S0_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S0_EQ_0_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n1_var := VitalMUX2(D1_dly, D0_dly, S0_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0001 := VitalINV(N30);

          Q_zd := VitalINV(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n2_var := VitalINV(SE_dly);
          S0_EQ_1_AN_SE_EQ_0 := VitalAND2(S0_dly, n2_var);

          n3_var := VitalINV(S0_dly);
          n4_var := VitalINV(SE_dly);
          S0_EQ_0_AN_SE_EQ_0 := VitalAND2(n3_var, n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SMDFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0602261 ns;
             tpw_CK_negedge : VitalDelayType := 0.0586807 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0696472 ns, 0.0773871 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SMDFFHQX4 : entity is TRUE;
end SMDFFHQX4;

architecture behavioral of SMDFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE S0_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S0_EQ_0_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n1_var := VitalMUX2(D1_dly, D0_dly, S0_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n2_var := VitalINV(SE_dly);
          S0_EQ_1_AN_SE_EQ_0 := VitalAND2(S0_dly, n2_var);

          n3_var := VitalINV(S0_dly);
          n4_var := VitalINV(SE_dly);
          S0_EQ_0_AN_SE_EQ_0 := VitalAND2(n3_var, n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SMDFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.0700539 ns;
             tpw_CK_negedge : VitalDelayType := 0.0590688 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.0824963 ns, 0.0875577 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SMDFFHQX8 : entity is TRUE;
end SMDFFHQX8;

architecture behavioral of SMDFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE S0_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S0_EQ_0_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n1_var := VitalMUX2(D1_dly, D0_dly, S0_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n2_var := VitalINV(SE_dly);
          S0_EQ_1_AN_SE_EQ_0 := VitalAND2(S0_dly, n2_var);

          n3_var := VitalINV(S0_dly);
          n4_var := VitalINV(SE_dly);
          S0_EQ_0_AN_SE_EQ_0 := VitalAND2(n3_var, n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0195364 ns, 0.0225301 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.02302 ns, 0.0186988 ns, 0.0212378 ns, 0.0237308 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX1 : entity is TRUE;
end TBUFX1;

architecture behavioral of TBUFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0263697 ns, 0.0295043 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0414154 ns, 0.0254993 ns, 0.0319263 ns, 0.0365874 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX12 : entity is TRUE;
end TBUFX12;

architecture behavioral of TBUFX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX16 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0466791 ns, 0.0510037 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0640467 ns, 0.047699 ns, 0.0474078 ns, 0.0621094 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX16 : entity is TRUE;
end TBUFX16;

architecture behavioral of TBUFX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0240608 ns, 0.0270018 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0268779 ns, 0.0231163 ns, 0.0295343 ns, 0.0273441 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX2 : entity is TRUE;
end TBUFX2;

architecture behavioral of TBUFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX20 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0283599 ns, 0.0311379 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0435793 ns, 0.0270171 ns, 0.0326044 ns, 0.0369285 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX20 : entity is TRUE;
end TBUFX20;

architecture behavioral of TBUFX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0229972 ns, 0.0257888 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0307043 ns, 0.0220548 ns, 0.0265743 ns, 0.0296415 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX3 : entity is TRUE;
end TBUFX3;

architecture behavioral of TBUFX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0254923 ns, 0.0284448 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0327947 ns, 0.0244637 ns, 0.0313349 ns, 0.0315116 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX4 : entity is TRUE;
end TBUFX4;

architecture behavioral of TBUFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0228264 ns, 0.0262836 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0405566 ns, 0.0218723 ns, 0.0266498 ns, 0.0356233 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX6 : entity is TRUE;
end TBUFX6;

architecture behavioral of TBUFX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0255825 ns, 0.0291553 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0428899 ns, 0.0245593 ns, 0.031549 ns, 0.0378704 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX8 : entity is TRUE;
end TBUFX8;

architecture behavioral of TBUFX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFXL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0167827 ns, 0.0199666 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0211366 ns, 0.015892 ns, 0.0174821 ns, 0.0213698 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFXL : entity is TRUE;
end TBUFXL;

architecture behavioral of TBUFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TIEHI is
   generic (

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TIEHI : entity is TRUE;
end TIEHI;

architecture behavioral of TIEHI is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL HIGH : std_ulogic := '1';
begin

   --functionality section
   VITALBUF (Y, HIGH);

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TIELO is
   generic (

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TIELO : entity is TRUE;
end TIELO;

architecture behavioral of TIELO is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL LOW : std_ulogic := '0';
begin

   --functionality section
   VITALBUF (Y, LOW);

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX12 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.0920639 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.10803 ns, 0.101667 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX12 : entity is TRUE;
end TLATNCAX12;

architecture behavioral of TLATNCAX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE N0 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX12",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX12",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          N0 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX16 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.106557 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.0587499 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.0587499 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := 0.035 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.035 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.1154 ns, 0.106962 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX16 : entity is TRUE;
end TLATNCAX16;

architecture behavioral of TLATNCAX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX16",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX16",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.0941742 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.160295 ns, 0.131822 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX2 : entity is TRUE;
end TLATNCAX2;

architecture behavioral of TLATNCAX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX20 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.120568 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.125086 ns, 0.113842 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX20 : entity is TRUE;
end TLATNCAX20;

architecture behavioral of TLATNCAX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX20",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX20",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX3 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.0860003 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.128815 ns, 0.111993 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX3 : entity is TRUE;
end TLATNCAX3;

architecture behavioral of TLATNCAX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX3",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX3",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.0834275 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.119412 ns, 0.106808 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX4 : entity is TRUE;
end TLATNCAX4;

architecture behavioral of TLATNCAX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE N0 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          N0 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX6 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.08543 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.10655 ns, 0.0990317 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX6 : entity is TRUE;
end TLATNCAX6;

architecture behavioral of TLATNCAX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX6",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX6",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.0856751 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.105723 ns, 0.0996554 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX8 : entity is TRUE;
end TLATNCAX8;

architecture behavioral of TLATNCAX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX8",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNSRX1 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_GN_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             trecovery_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tpw_GN_negedge : VitalDelayType := 0.0707827 ns;
             tpw_RN_negedge : VitalDelayType := 0.0564418 ns;
             tpw_SN_negedge : VitalDelayType := 0.0430684 ns;
             tsetup_RN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_RN_GN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := 0.00000000060688 ns;
             tpd_D_Q : VitalDelayType01 := (0.0619291 ns, 0.0768738 ns);
             tpd_D_QN : VitalDelayType01 := (0.0665438 ns, 0.0492894 ns);
             tpd_GN_Q : VitalDelayType01 := (0.0968857 ns, 0.0974943 ns);
             tpd_GN_QN : VitalDelayType01 := (0.087135 ns, 0.0841972 ns);
             tpd_RN_Q : VitalDelayType01 := (0.0866807 ns, 0.0834318 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0731668 ns, 0.0739711 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0477773 ns, 0.0494209 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0391876 ns, 0.034834 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNSRX1 : entity is TRUE;
end TLATNSRX1;

architecture behavioral of TLATNSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( GN_dly, GN_ipd, tisd_GN_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_GN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_GN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_GN : std_ulogic := '0';
      VARIABLE TimeMarker_RN_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE GN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(GN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    Recovery       => trecovery_SN_GN_posedge_posedge,
                    Removal        => tremoval_SN_GN_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    TimingData     => TimeMarker_rec_GN_SN_posedge,
                    Violation      => Tviol_rec_GN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_RN_GN_posedge_posedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_GN_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    TimingData     => TimeMarker_RN_GN,
                    Violation      => Tviol_RN_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_GN_SN_posedge OR
                        Tviol_RN_GN OR
                        Tviol_D_GN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_GN_negedge );

          n1_var := VitalINV(GN_dly);
          n0_ENABLE := VitalAND2(n1_var, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);

          GN_EQ_1 := VitalBUF(GN_dly);

          n2_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n2_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNSRX2 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_GN_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             trecovery_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tpw_GN_negedge : VitalDelayType := 0.0787619 ns;
             tpw_RN_negedge : VitalDelayType := 0.0638756 ns;
             tpw_SN_negedge : VitalDelayType := 0.0500037 ns;
             tsetup_RN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_RN_GN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := 0.00000000060688 ns;
             tpd_D_Q : VitalDelayType01 := (0.0714427 ns, 0.0899709 ns);
             tpd_D_QN : VitalDelayType01 := (0.0787291 ns, 0.0575963 ns);
             tpd_GN_Q : VitalDelayType01 := (0.105824 ns, 0.109821 ns);
             tpd_GN_QN : VitalDelayType01 := (0.0985347 ns, 0.0919798 ns);
             tpd_RN_Q : VitalDelayType01 := (0.0954142 ns, 0.0951657 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0839394 ns, 0.0815592 ns);
             tpd_SN_Q : VitalDelayType01 := (0.053174 ns, 0.0577984 ns);
             tpd_SN_QN : VitalDelayType01 := (0.04663 ns, 0.0391454 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNSRX2 : entity is TRUE;
end TLATNSRX2;

architecture behavioral of TLATNSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( GN_dly, GN_ipd, tisd_GN_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_GN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_GN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_GN : std_ulogic := '0';
      VARIABLE TimeMarker_RN_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE GN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(GN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    Recovery       => trecovery_SN_GN_posedge_posedge,
                    Removal        => tremoval_SN_GN_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    TimingData     => TimeMarker_rec_GN_SN_posedge,
                    Violation      => Tviol_rec_GN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_RN_GN_posedge_posedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_GN_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    TimingData     => TimeMarker_RN_GN,
                    Violation      => Tviol_RN_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_GN_SN_posedge OR
                        Tviol_RN_GN OR
                        Tviol_D_GN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_GN_negedge );

          n1_var := VitalINV(GN_dly);
          n0_ENABLE := VitalAND2(n1_var, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);

          GN_EQ_1 := VitalBUF(GN_dly);

          n2_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n2_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNSRX4 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_GN_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             trecovery_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tpw_GN_negedge : VitalDelayType := 0.0896091 ns;
             tpw_RN_negedge : VitalDelayType := 0.0756757 ns;
             tpw_SN_negedge : VitalDelayType := 0.0545269 ns;
             tsetup_RN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_RN_GN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := 0.00000000060688 ns;
             tpd_D_Q : VitalDelayType01 := (0.0801178 ns, 0.101902 ns);
             tpd_D_QN : VitalDelayType01 := (0.0890312 ns, 0.0645324 ns);
             tpd_GN_Q : VitalDelayType01 := (0.1144 ns, 0.122477 ns);
             tpd_GN_QN : VitalDelayType01 := (0.109555 ns, 0.0988068 ns);
             tpd_RN_Q : VitalDelayType01 := (0.104298 ns, 0.108176 ns);
             tpd_RN_QN : VitalDelayType01 := (0.095319 ns, 0.0887106 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0533055 ns, 0.0594433 ns);
             tpd_SN_QN : VitalDelayType01 := (0.046603 ns, 0.0375833 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNSRX4 : entity is TRUE;
end TLATNSRX4;

architecture behavioral of TLATNSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( GN_dly, GN_ipd, tisd_GN_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_GN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_GN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_GN : std_ulogic := '0';
      VARIABLE TimeMarker_RN_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE GN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(GN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    Recovery       => trecovery_SN_GN_posedge_posedge,
                    Removal        => tremoval_SN_GN_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    TimingData     => TimeMarker_rec_GN_SN_posedge,
                    Violation      => Tviol_rec_GN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_RN_GN_posedge_posedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_GN_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    TimingData     => TimeMarker_RN_GN,
                    Violation      => Tviol_RN_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_GN_SN_posedge OR
                        Tviol_RN_GN OR
                        Tviol_D_GN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_GN_negedge );

          n1_var := VitalINV(GN_dly);
          n0_ENABLE := VitalAND2(n1_var, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);

          GN_EQ_1 := VitalBUF(GN_dly);

          n2_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n2_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNSRXL is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_GN_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             trecovery_SN_GN_posedge_posedge : VitalDelayType := 0 ns;
             tremoval_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tpw_GN_negedge : VitalDelayType := 0.0657464 ns;
             tpw_RN_negedge : VitalDelayType := 0.0511498 ns;
             tpw_SN_negedge : VitalDelayType := 0.0348835 ns;
             tsetup_RN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_RN_GN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := 0.00000000060688 ns;
             tpd_D_Q : VitalDelayType01 := (0.0525556 ns, 0.0664206 ns);
             tpd_D_QN : VitalDelayType01 := (0.0569964 ns, 0.0414434 ns);
             tpd_GN_Q : VitalDelayType01 := (0.087436 ns, 0.0869154 ns);
             tpd_GN_QN : VitalDelayType01 := (0.0774259 ns, 0.0762728 ns);
             tpd_RN_Q : VitalDelayType01 := (0.0773079 ns, 0.0727334 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0633819 ns, 0.0661362 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0384311 ns, 0.0390907 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0297625 ns, 0.0271858 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNSRXL : entity is TRUE;
end TLATNSRXL;

architecture behavioral of TLATNSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( GN_dly, GN_ipd, tisd_GN_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_GN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_GN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_GN : std_ulogic := '0';
      VARIABLE TimeMarker_RN_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE GN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(GN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    Recovery       => trecovery_SN_GN_posedge_posedge,
                    Removal        => tremoval_SN_GN_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    TimingData     => TimeMarker_rec_GN_SN_posedge,
                    Violation      => Tviol_rec_GN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_RN_GN_posedge_posedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_GN_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    TimingData     => TimeMarker_RN_GN,
                    Violation      => Tviol_RN_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_GN_SN_posedge OR
                        Tviol_RN_GN OR
                        Tviol_D_GN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_GN_negedge );

          n1_var := VitalINV(GN_dly);
          n0_ENABLE := VitalAND2(n1_var, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);

          GN_EQ_1 := VitalBUF(GN_dly);

          n2_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n2_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX12 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.0840328 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.108554 ns, 0.101271 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX12 : entity is TRUE;
end TLATNTSCAX12;

architecture behavioral of TLATNTSCAX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE N5 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX12",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX12",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX12",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          N5 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX16 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.0930795 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.0587499 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.0587499 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := 0.035 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := 0.035 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.0587499 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.0587499 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := 0.035 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.035 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.115951 ns, 0.106891 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX16 : entity is TRUE;
end TLATNTSCAX16;

architecture behavioral of TLATNTSCAX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX16",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX16",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX16",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.0908261 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.160385 ns, 0.130997 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX2 : entity is TRUE;
end TLATNTSCAX2;

architecture behavioral of TLATNTSCAX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX20 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.101366 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.125212 ns, 0.113604 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX20 : entity is TRUE;
end TLATNTSCAX20;

architecture behavioral of TLATNTSCAX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX20",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX20",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX20",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX3 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.0817243 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.128864 ns, 0.111238 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX3 : entity is TRUE;
end TLATNTSCAX3;

architecture behavioral of TLATNTSCAX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX3",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX3",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX3",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.0796631 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.11989 ns, 0.106462 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX4 : entity is TRUE;
end TLATNTSCAX4;

architecture behavioral of TLATNTSCAX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX6 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.0791483 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.106869 ns, 0.0984738 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX6 : entity is TRUE;
end TLATNTSCAX6;

architecture behavioral of TLATNTSCAX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE N5 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX6",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX6",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX6",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          N5 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.0795101 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.106168 ns, 0.0989894 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX8 : entity is TRUE;
end TLATNTSCAX8;

architecture behavioral of TLATNTSCAX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX8",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNX1 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_GN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_GN : VitalDelayType := DefDummyIcd;
             tpw_GN_negedge : VitalDelayType := 0.0532335 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := 0.00000000060688 ns;
             tpd_D_Q : VitalDelayType01 := (0.0610427 ns, 0.0647605 ns);
             tpd_D_QN : VitalDelayType01 := (0.0553643 ns, 0.0484479 ns);
             tpd_GN_Q : VitalDelayType01 := (0.0734655 ns, 0.0800989 ns);
             tpd_GN_QN : VitalDelayType01 := (0.0707003 ns, 0.0608512 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNX1 : entity is TRUE;
end TLATNX1;

architecture behavioral of TLATNX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_GN );
   VitalSignalDelay( GN_dly, GN_ipd, ticd_GN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly)

      --timing checks section variables
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNX1",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_GN OR
                        PWviol_GN_negedge );

          n0_ENABLE := VitalINV(GN_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNX2 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_GN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_GN : VitalDelayType := DefDummyIcd;
             tpw_GN_negedge : VitalDelayType := 0.0587576 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := 0.00000000060688 ns;
             tpd_D_Q : VitalDelayType01 := (0.0695372 ns, 0.0741274 ns);
             tpd_D_QN : VitalDelayType01 := (0.0642259 ns, 0.0557796 ns);
             tpd_GN_Q : VitalDelayType01 := (0.0820445 ns, 0.0891738 ns);
             tpd_GN_QN : VitalDelayType01 := (0.0792687 ns, 0.0682885 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNX2 : entity is TRUE;
end TLATNX2;

architecture behavioral of TLATNX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_GN );
   VitalSignalDelay( GN_dly, GN_ipd, ticd_GN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly)

      --timing checks section variables
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNX2",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_GN OR
                        PWviol_GN_negedge );

          n0_ENABLE := VitalINV(GN_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNX4 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_GN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_GN : VitalDelayType := DefDummyIcd;
             tpw_GN_negedge : VitalDelayType := 0.0687089 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := 0.00000000060688 ns;
             tpd_D_Q : VitalDelayType01 := (0.0786891 ns, 0.0880484 ns);
             tpd_D_QN : VitalDelayType01 := (0.0765144 ns, 0.0633045 ns);
             tpd_GN_Q : VitalDelayType01 := (0.0912269 ns, 0.102674 ns);
             tpd_GN_QN : VitalDelayType01 := (0.0911636 ns, 0.0758423 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNX4 : entity is TRUE;
end TLATNX4;

architecture behavioral of TLATNX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_GN );
   VitalSignalDelay( GN_dly, GN_ipd, ticd_GN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly)

      --timing checks section variables
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNX4",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_GN OR
                        PWviol_GN_negedge );

          n0_ENABLE := VitalINV(GN_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNXL is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_GN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_GN : VitalDelayType := DefDummyIcd;
             tpw_GN_negedge : VitalDelayType := 0.0497678 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := 0.00000000060688 ns;
             tpd_D_Q : VitalDelayType01 := (0.0522776 ns, 0.0580824 ns);
             tpd_D_QN : VitalDelayType01 := (0.0493757 ns, 0.0411264 ns);
             tpd_GN_Q : VitalDelayType01 := (0.0647317 ns, 0.0728294 ns);
             tpd_GN_QN : VitalDelayType01 := (0.0641041 ns, 0.0535504 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNXL : entity is TRUE;
end TLATNXL;

architecture behavioral of TLATNXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_GN );
   VitalSignalDelay( GN_dly, GN_ipd, ticd_GN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly)

      --timing checks section variables
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNXL",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_GN OR
                        PWviol_GN_negedge );

          n0_ENABLE := VitalINV(GN_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATSRX1 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_G_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             trecovery_SN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_G_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             tpw_G_posedge : VitalDelayType := 0.0587532 ns;
             tpw_RN_negedge : VitalDelayType := 0.0558536 ns;
             tpw_SN_negedge : VitalDelayType := 0.0427727 ns;
             tsetup_RN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_RN_G_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tpd_D_Q : VitalDelayType01 := (0.0619606 ns, 0.0766358 ns);
             tpd_D_QN : VitalDelayType01 := (0.0663663 ns, 0.049341 ns);
             tpd_G_Q : VitalDelayType01 := (0.0851187 ns, 0.0854163 ns);
             tpd_G_QN : VitalDelayType01 := (0.0750874 ns, 0.0724761 ns);
             tpd_RN_Q : VitalDelayType01 := (0.0858293 ns, 0.0827843 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0725484 ns, 0.0731909 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0477241 ns, 0.0493713 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0391701 ns, 0.0348253 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATSRX1 : entity is TRUE;
end TLATSRX1;

architecture behavioral of TLATSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( G_dly, G_ipd, tisd_G_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_G_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_G_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_G : std_ulogic := '0';
      VARIABLE TimeMarker_RN_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE G_EQ_0 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(G_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    Recovery       => trecovery_SN_G_posedge_negedge,
                    Removal        => tremoval_SN_G_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    TimingData     => TimeMarker_rec_G_SN_posedge,
                    Violation      => Tviol_rec_G_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_RN_G_posedge_negedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_G_negedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    TimingData     => TimeMarker_RN_G,
                    Violation      => Tviol_RN_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_G_SN_posedge OR
                        Tviol_RN_G OR
                        Tviol_D_G OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_G_posedge );

          n0_ENABLE := VitalAND2(G_dly, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);

          G_EQ_0 := VitalINV(G_dly);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATSRX2 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_G_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             trecovery_SN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_G_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             tpw_G_posedge : VitalDelayType := 0.0669762 ns;
             tpw_RN_negedge : VitalDelayType := 0.0631898 ns;
             tpw_SN_negedge : VitalDelayType := 0.0498773 ns;
             tsetup_RN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_RN_G_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := -0.00000000060688 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tpd_D_Q : VitalDelayType01 := (0.0709531 ns, 0.0894418 ns);
             tpd_D_QN : VitalDelayType01 := (0.0783141 ns, 0.0572262 ns);
             tpd_G_Q : VitalDelayType01 := (0.093614 ns, 0.0979023 ns);
             tpd_G_QN : VitalDelayType01 := (0.086783 ns, 0.0798811 ns);
             tpd_RN_Q : VitalDelayType01 := (0.0943576 ns, 0.0943545 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0832658 ns, 0.0806016 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0532179 ns, 0.0577086 ns);
             tpd_SN_QN : VitalDelayType01 := (0.046657 ns, 0.0392472 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATSRX2 : entity is TRUE;
end TLATSRX2;

architecture behavioral of TLATSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( G_dly, G_ipd, tisd_G_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_G_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_G_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_G : std_ulogic := '0';
      VARIABLE TimeMarker_RN_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE G_EQ_0 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(G_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    Recovery       => trecovery_SN_G_posedge_negedge,
                    Removal        => tremoval_SN_G_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    TimingData     => TimeMarker_rec_G_SN_posedge,
                    Violation      => Tviol_rec_G_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_RN_G_posedge_negedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_G_negedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    TimingData     => TimeMarker_RN_G,
                    Violation      => Tviol_RN_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_G_SN_posedge OR
                        Tviol_RN_G OR
                        Tviol_D_G OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_G_posedge );

          n0_ENABLE := VitalAND2(G_dly, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);

          G_EQ_0 := VitalINV(G_dly);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATSRX4 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_G_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             trecovery_SN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_G_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             tpw_G_posedge : VitalDelayType := 0.0784593 ns;
             tpw_RN_negedge : VitalDelayType := 0.0758406 ns;
             tpw_SN_negedge : VitalDelayType := 0.0528169 ns;
             tsetup_RN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_RN_G_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tpd_D_Q : VitalDelayType01 := (0.0809958 ns, 0.103306 ns);
             tpd_D_QN : VitalDelayType01 := (0.0900266 ns, 0.0650447 ns);
             tpd_G_Q : VitalDelayType01 := (0.103307 ns, 0.111939 ns);
             tpd_G_QN : VitalDelayType01 := (0.0986665 ns, 0.0873638 ns);
             tpd_RN_Q : VitalDelayType01 := (0.104054 ns, 0.108604 ns);
             tpd_RN_QN : VitalDelayType01 := (0.095348 ns, 0.0881181 ns);
             tpd_SN_Q : VitalDelayType01 := (0.0536367 ns, 0.0598344 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0466345 ns, 0.0375674 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATSRX4 : entity is TRUE;
end TLATSRX4;

architecture behavioral of TLATSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( G_dly, G_ipd, tisd_G_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_G_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_G_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_G : std_ulogic := '0';
      VARIABLE TimeMarker_RN_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE G_EQ_0 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(G_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    Recovery       => trecovery_SN_G_posedge_negedge,
                    Removal        => tremoval_SN_G_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    TimingData     => TimeMarker_rec_G_SN_posedge,
                    Violation      => Tviol_rec_G_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_RN_G_posedge_negedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_G_negedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    TimingData     => TimeMarker_RN_G,
                    Violation      => Tviol_RN_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_G_SN_posedge OR
                        Tviol_RN_G OR
                        Tviol_D_G OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_G_posedge );

          n0_ENABLE := VitalAND2(G_dly, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);

          G_EQ_0 := VitalINV(G_dly);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATSRXL is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_G_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             trecovery_SN_G_posedge_negedge : VitalDelayType := 0.000000000606879 ns;
             tremoval_SN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tpw_G_posedge : VitalDelayType := 0.0539934 ns;
             tpw_RN_negedge : VitalDelayType := 0.0506702 ns;
             tpw_SN_negedge : VitalDelayType := 0.0346436 ns;
             tsetup_RN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_RN_G_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tpd_D_Q : VitalDelayType01 := (0.0527099 ns, 0.066248 ns);
             tpd_D_QN : VitalDelayType01 := (0.0568415 ns, 0.0416044 ns);
             tpd_G_Q : VitalDelayType01 := (0.0758572 ns, 0.0749402 ns);
             tpd_G_QN : VitalDelayType01 := (0.0654582 ns, 0.0647095 ns);
             tpd_RN_Q : VitalDelayType01 := (0.0765519 ns, 0.072235 ns);
             tpd_RN_QN : VitalDelayType01 := (0.0628641 ns, 0.0653925 ns);
             tpd_SN_Q : VitalDelayType01 := (0.038431 ns, 0.0390811 ns);
             tpd_SN_QN : VitalDelayType01 := (0.0297519 ns, 0.0271829 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATSRXL : entity is TRUE;
end TLATSRXL;

architecture behavioral of TLATSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( G_dly, G_ipd, tisd_G_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_G_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_G_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_G : std_ulogic := '0';
      VARIABLE TimeMarker_RN_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE G_EQ_0 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(G_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    Recovery       => trecovery_SN_G_posedge_negedge,
                    Removal        => tremoval_SN_G_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    TimingData     => TimeMarker_rec_G_SN_posedge,
                    Violation      => Tviol_rec_G_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_RN_G_posedge_negedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_G_negedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    TimingData     => TimeMarker_RN_G,
                    Violation      => Tviol_RN_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_G_SN_posedge OR
                        Tviol_RN_G OR
                        Tviol_D_G OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_G_posedge );

          n0_ENABLE := VitalAND2(G_dly, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);

          G_EQ_0 := VitalINV(G_dly);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATX1 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_G : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_G : VitalDelayType := DefDummyIcd;
             tpw_G_posedge : VitalDelayType := 0.0518146 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tpd_D_Q : VitalDelayType01 := (0.0612475 ns, 0.0652815 ns);
             tpd_D_QN : VitalDelayType01 := (0.0559139 ns, 0.0486887 ns);
             tpd_G_Q : VitalDelayType01 := (0.0778205 ns, 0.0667208 ns);
             tpd_G_QN : VitalDelayType01 := (0.0573473 ns, 0.0652586 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATX1 : entity is TRUE;
end TLATX1;

architecture behavioral of TLATX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_G );
   VitalSignalDelay( G_dly, G_ipd, ticd_G );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly)

      --timing checks section variables
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE QINT : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATX1",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_G OR
                        PWviol_G_posedge );

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, G_dly, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          QINT := n0_vec(1);

          P0000 := VitalINV(QINT);

          Q_zd := VitalBUF(QINT);

          QN_zd := VitalINV(QINT);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATX2 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_G : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_G : VitalDelayType := DefDummyIcd;
             tpw_G_posedge : VitalDelayType := 0.0576096 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0 ns;
             tpd_D_Q : VitalDelayType01 := (0.0700195 ns, 0.0746422 ns);
             tpd_D_QN : VitalDelayType01 := (0.0647604 ns, 0.0562256 ns);
             tpd_G_Q : VitalDelayType01 := (0.0862896 ns, 0.0758355 ns);
             tpd_G_QN : VitalDelayType01 := (0.0659254 ns, 0.0724807 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATX2 : entity is TRUE;
end TLATX2;

architecture behavioral of TLATX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_G );
   VitalSignalDelay( G_dly, G_ipd, ticd_G );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly)

      --timing checks section variables
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATX2",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_G OR
                        PWviol_G_posedge );

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, G_dly, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATX4 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_G : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_G : VitalDelayType := DefDummyIcd;
             tpw_G_posedge : VitalDelayType := 0.0669209 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tpd_D_Q : VitalDelayType01 := (0.0785809 ns, 0.0879746 ns);
             tpd_D_QN : VitalDelayType01 := (0.0767971 ns, 0.0635793 ns);
             tpd_G_Q : VitalDelayType01 := (0.0948954 ns, 0.0886766 ns);
             tpd_G_QN : VitalDelayType01 := (0.0774715 ns, 0.0799126 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATX4 : entity is TRUE;
end TLATX4;

architecture behavioral of TLATX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_G );
   VitalSignalDelay( G_dly, G_ipd, ticd_G );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly)

      --timing checks section variables
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATX4",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_G OR
                        PWviol_G_posedge );

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, G_dly, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATXL is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_G : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_G : VitalDelayType := DefDummyIcd;
             tpw_G_posedge : VitalDelayType := 0.0471896 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := -0.000000000606879 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tpd_D_Q : VitalDelayType01 := (0.0519322 ns, 0.0579347 ns);
             tpd_D_QN : VitalDelayType01 := (0.0492679 ns, 0.0409277 ns);
             tpd_G_Q : VitalDelayType01 := (0.0685083 ns, 0.0593761 ns);
             tpd_G_QN : VitalDelayType01 := (0.0507191 ns, 0.0574843 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATXL : entity is TRUE;
end TLATXL;

architecture behavioral of TLATXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_G );
   VitalSignalDelay( G_dly, G_ipd, ticd_G );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly)

      --timing checks section variables
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE QINT : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATXL",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_G OR
                        PWviol_G_posedge );

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, G_dly, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          QINT := n0_vec(1);

          P0000 := VitalINV(QINT);

          Q_zd := VitalBUF(QINT);

          QN_zd := VitalINV(QINT);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0365449 ns, 0.0392238 ns);
             tpd_B_Y : VitalDelayType01 := (0.0295668 ns, 0.0263459 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR2X1 : entity is TRUE;
end XNOR2X1;

architecture behavioral of XNOR2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0457107 ns, 0.0503474 ns);
             tpd_B_Y : VitalDelayType01 := (0.0384419 ns, 0.0363346 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR2X2 : entity is TRUE;
end XNOR2X2;

architecture behavioral of XNOR2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0594841 ns, 0.0650698 ns);
             tpd_B_Y : VitalDelayType01 := (0.0472095 ns, 0.0449341 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR2X4 : entity is TRUE;
end XNOR2X4;

architecture behavioral of XNOR2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0320827 ns, 0.0335515 ns);
             tpd_B_Y : VitalDelayType01 := (0.0251584 ns, 0.0215412 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR2XL : entity is TRUE;
end XNOR2XL;

architecture behavioral of XNOR2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0529648 ns, 0.0527007 ns);
             tpd_B_Y : VitalDelayType01 := (0.0387554 ns, 0.036259 ns);
             tpd_C_Y : VitalDelayType01 := (0.0264265 ns, 0.0248238 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR3X1 : entity is TRUE;
end XNOR3X1;

architecture behavioral of XNOR3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          n1_var := VitalXOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.053713 ns, 0.0459257 ns);
             tpd_B_Y : VitalDelayType01 := (0.038151 ns, 0.0295364 ns);
             tpd_C_Y : VitalDelayType01 := (0.026466 ns, 0.0200483 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR3XL : entity is TRUE;
end XNOR3XL;

architecture behavioral of XNOR3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          n1_var := VitalXOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0361634 ns, 0.0387742 ns);
             tpd_B_Y : VitalDelayType01 := (0.0270351 ns, 0.0295847 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR2X1 : entity is TRUE;
end XOR2X1;

architecture behavioral of XOR2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0453306 ns, 0.0498141 ns);
             tpd_B_Y : VitalDelayType01 := (0.0357049 ns, 0.0397805 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR2X2 : entity is TRUE;
end XOR2X2;

architecture behavioral of XOR2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0593918 ns, 0.065377 ns);
             tpd_B_Y : VitalDelayType01 := (0.0443385 ns, 0.0483731 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR2X4 : entity is TRUE;
end XOR2X4;

architecture behavioral of XOR2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0316005 ns, 0.0330387 ns);
             tpd_B_Y : VitalDelayType01 := (0.02273 ns, 0.0244281 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR2XL : entity is TRUE;
end XOR2XL;

architecture behavioral of XOR2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0528353 ns, 0.052237 ns);
             tpd_B_Y : VitalDelayType01 := (0.0383408 ns, 0.0363544 ns);
             tpd_C_Y : VitalDelayType01 := (0.0265769 ns, 0.0248845 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR3X1 : entity is TRUE;
end XOR3X1;

architecture behavioral of XOR3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalXOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0540902 ns, 0.0463988 ns);
             tpd_B_Y : VitalDelayType01 := (0.0380548 ns, 0.0300964 ns);
             tpd_C_Y : VitalDelayType01 := (0.0263243 ns, 0.020249 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR3XL : entity is TRUE;
end XOR3XL;

architecture behavioral of XOR3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalXOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


