LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
LIBRARY IEEE;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;

package prim is

CONSTANT DefCombSpikeMsgOn : BOOLEAN := true;
CONSTANT DefCombSpikeXOn   : BOOLEAN := true;
CONSTANT DefSeqMsgOn       : BOOLEAN := true;
CONSTANT DefSeqXOn         : BOOLEAN := true;

CONSTANT DefDummyDelay    : VitalDelayType := 1.00 ns;
CONSTANT DefDummySetup    : VitalDelayType := 1.00 ns;
CONSTANT DefDummyHold     : VitalDelayType := 1.00 ns;
CONSTANT DefDummyWidth    : VitalDelayType := 1.00 ns;
CONSTANT DefDummyRecovery : VitalDelayType := 1.00 ns;
CONSTANT DefDummyRemoval  : VitalDelayType := 1.00 ns;
CONSTANT DefDummyIpd      : VitalDelayType := 0.00 ns;
CONSTANT DefDummyIsd      : VitalDelayType := 0.00 ns;
CONSTANT DefDummyIcd      : VitalDelayType := 0.00 ns;

CONSTANT udp_dff : VitalStateTableType (1 TO 21, 1 TO 7) := (
--    NOTIFIER   D      CLK     RN       S      Q(t)   Q(t+1)
     (  'X',    '-',    '-',    '-',    '-',    '-',    'X'  ),
     (  '-',    '-',    '-',    '-',    '1',    '-',    '1'  ),
     (  '-',    '-',    '-',    '1',    '0',    '-',    '0'  ),
     (  '-',    '0',    '/',    '-',    '0',    '-',    '0'  ),
     (  '-',    '1',    '/',    '0',    '-',    '-',    '1'  ),
     (  '-',    '1',    '*',    '0',    '-',    '1',    '1'  ),
     (  '-',    '0',    '*',    '-',    '0',    '0',    '0'  ),
     (  '-',    '-',    '\',   '-',    '-',    '-',    'S'  ),
     (  '-',    '*',    'B',    '-',    '-',    '-',    'S'  ),
     (  '-',    '-',    'B',    '0',    '*',    '1',    '1'  ),
     (  '-',    '1',    'X',    '0',    '*',    '1',    '1'  ),
     (  '-',    '-',    'B',    '*',    '0',    '0',    '0'  ),
     (  '-',    '0',    'X',    '*',    '0',    '0',    '0'  ),
     (  '-',    'B',    'r',    '-',    '-',    '-',    'X'  ),
     (  '-',    '/',    'X',    '-',    '-',    '-',    'X'  ),
     (  '-',    '-',    '-',    '-',    '*',    '-',    'X'  ),
     (  '-',    '-',    '-',    '*',    '-',    '-',    'X'  ),
     (  '-',    '-',    'f',    '-',    '-',    '-',    'X'  ),
     (  '-',    '\',   'X',    '0',    '-',    '-',    'X'  ),
     (  '-',    'B',    'X',    '-',    '-',    '-',    'S'  ),
     (  '-',    '-',    'S',    '-',    '-',    '-',    'S'  ));

CONSTANT udp_tlat : VitalStateTableType (1 TO 20, 1 TO 7) := (
--      NOT      D       G       R       S      Q(t)  Q(t+1)
     (  'X',    '-',    '-',    '-',    '-',    '-',    'X'  ),
     (  '-',    '-',    '-',    '-',    '1',    '-',    '1'  ),
     (  '-',    '-',    '-',    '1',    '0',    '-',    '0'  ),
     (  '-',    '1',    '1',    '0',    '-',    '-',    '1'  ),
     (  '-',    '0',    '1',    '-',    '0',    '-',    '0'  ),
     (  '-',    '1',    '*',    '0',    '-',    '1',    '1'  ),
     (  '-',    '0',    '*',    '-',    '0',    '0',    '0'  ),
     (  '-',    '*',    '0',    '-',    '-',    '-',    'S'  ),
     (  '-',    '-',    '0',    '0',    '*',    '1',    '1'  ),
     (  '-',    '1',    '-',    '0',    '*',    '1',    '1'  ),
     (  '-',    '-',    '0',    '*',    '0',    '0',    '0'  ),
     (  '-',    '0',    '-',    '*',    '0',    '0',    '0'  ),
     (  '-',    '0',    '-',    '-',    '0',    '0',    '0'  ),
     (  '-',    '1',    '-',    '0',    '-',    '1',    '1'  ),
     (  '-',    '*',    '-',    '-',    '-',    '-',    'X'  ),
     (  '-',    '-',    '-',    '*',    '-',    '-',    'X'  ),
     (  '-',    '-',    '-',    '-',    '*',    '-',    'X'  ),
     (  '-',    'B',    'r',    '0',    '0',    '-',    'X'  ),
     (  '-',    'B',    'X',    '0',    '0',    '-',    'S'  ),
     (  '-',    '-',    'S',    '-',    '-',    '-',    'S'  ) );

CONSTANT udp_rslat : VitalStateTableType (1 TO 12, 1 TO 5) := (
--      NOT      R       S      Q(t)  Q(t+1)
     (  'X',    '-',    '-',    '-',    'X'  ),
     (  '-',    '-',    '1',    '-',    '1'  ),
     (  '-',    '1',    '0',    '-',    '0'  ),
     (  '-',    '0',    '-',    '1',    '1'  ),
     (  '-',    '-',    '0',    '0',    '0'  ),
     (  '-',    '-',    '-',    '-',    'S'  ),
     (  '-',    '0',    '*',    '1',    '1'  ),
     (  '-',    '*',    '0',    '0',    '0'  ),
     (  '-',    '-',    '0',    '0',    '0'  ),
     (  '-',    '0',    '-',    '1',    '1'  ),
     (  '-',    '*',    '-',    '-',    'X'  ),
     (  '-',    '-',    '*',    '-',    'X'  ) );


end prim;

package body prim is

end prim;
LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ACHCONX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CON : VitalDelayType01 := (0.154402 ns, 0.172375 ns);
             tpd_B_CON : VitalDelayType01 := (0.0886322 ns, 0.0906397 ns);
             tpd_CI_CON : VitalDelayType01 := (0.0436827 ns, 0.046266 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CON : out std_ulogic);

   attribute VITAL_LEVEL0 of ACHCONX2 : entity is TRUE;
end ACHCONX2;

architecture behavioral of ACHCONX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE CON_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CON_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          n4_var := VitalOR2(n2_var, n3_var);
          CON_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CON,
               OutSignalName => "CON",
               OutTemp => CON_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CON,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CON,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CON,
                             TRUE)),
               GlitchData => CON_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFHX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.123621 ns, 0.132495 ns);
             tpd_A_S : VitalDelayType01 := (0.174311 ns, 0.170465 ns);
             tpd_B_CO : VitalDelayType01 := (0.124563 ns, 0.134351 ns);
             tpd_B_S : VitalDelayType01 := (0.175666 ns, 0.169364 ns);
             tpd_CI_CO : VitalDelayType01 := (0.112729 ns, 0.120708 ns);
             tpd_CI_S : VitalDelayType01 := (0.166907 ns, 0.164472 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFHX1 : entity is TRUE;
end ADDFHX1;

architecture behavioral of ADDFHX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFHX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.148508 ns, 0.161382 ns);
             tpd_A_S : VitalDelayType01 := (0.224282 ns, 0.221648 ns);
             tpd_B_CO : VitalDelayType01 := (0.149587 ns, 0.163536 ns);
             tpd_B_S : VitalDelayType01 := (0.22588 ns, 0.220758 ns);
             tpd_CI_CO : VitalDelayType01 := (0.137694 ns, 0.15011 ns);
             tpd_CI_S : VitalDelayType01 := (0.217889 ns, 0.215842 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFHX2 : entity is TRUE;
end ADDFHX2;

architecture behavioral of ADDFHX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFHX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.179702 ns, 0.198657 ns);
             tpd_A_S : VitalDelayType01 := (0.286467 ns, 0.285051 ns);
             tpd_B_CO : VitalDelayType01 := (0.181163 ns, 0.200964 ns);
             tpd_B_S : VitalDelayType01 := (0.288043 ns, 0.283916 ns);
             tpd_CI_CO : VitalDelayType01 := (0.169244 ns, 0.18775 ns);
             tpd_CI_S : VitalDelayType01 := (0.280618 ns, 0.279244 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFHX4 : entity is TRUE;
end ADDFHX4;

architecture behavioral of ADDFHX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFHXL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.114159 ns, 0.122526 ns);
             tpd_A_S : VitalDelayType01 := (0.160228 ns, 0.156508 ns);
             tpd_B_CO : VitalDelayType01 := (0.115106 ns, 0.124183 ns);
             tpd_B_S : VitalDelayType01 := (0.161412 ns, 0.155496 ns);
             tpd_CI_CO : VitalDelayType01 := (0.10345 ns, 0.110671 ns);
             tpd_CI_S : VitalDelayType01 := (0.15283 ns, 0.150889 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFHXL : entity is TRUE;
end ADDFHXL;

architecture behavioral of ADDFHXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.133364 ns, 0.147714 ns);
             tpd_A_S : VitalDelayType01 := (0.195961 ns, 0.194863 ns);
             tpd_B_CO : VitalDelayType01 := (0.134273 ns, 0.149618 ns);
             tpd_B_S : VitalDelayType01 := (0.197235 ns, 0.193572 ns);
             tpd_CI_CO : VitalDelayType01 := (0.122721 ns, 0.135827 ns);
             tpd_CI_S : VitalDelayType01 := (0.189553 ns, 0.189943 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFX1 : entity is TRUE;
end ADDFX1;

architecture behavioral of ADDFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.169261 ns, 0.190705 ns);
             tpd_A_S : VitalDelayType01 := (0.267328 ns, 0.268759 ns);
             tpd_B_CO : VitalDelayType01 := (0.170456 ns, 0.192936 ns);
             tpd_B_S : VitalDelayType01 := (0.268847 ns, 0.267629 ns);
             tpd_CI_CO : VitalDelayType01 := (0.15867 ns, 0.179226 ns);
             tpd_CI_S : VitalDelayType01 := (0.261562 ns, 0.263572 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFX2 : entity is TRUE;
end ADDFX2;

architecture behavioral of ADDFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.179702 ns, 0.198657 ns);
             tpd_A_S : VitalDelayType01 := (0.286467 ns, 0.285051 ns);
             tpd_B_CO : VitalDelayType01 := (0.181163 ns, 0.200964 ns);
             tpd_B_S : VitalDelayType01 := (0.288043 ns, 0.283916 ns);
             tpd_CI_CO : VitalDelayType01 := (0.169244 ns, 0.18775 ns);
             tpd_CI_S : VitalDelayType01 := (0.280618 ns, 0.279244 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFX4 : entity is TRUE;
end ADDFX4;

architecture behavioral of ADDFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDFXL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_CI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.115616 ns, 0.125182 ns);
             tpd_A_S : VitalDelayType01 := (0.160779 ns, 0.157548 ns);
             tpd_B_CO : VitalDelayType01 := (0.116411 ns, 0.126565 ns);
             tpd_B_S : VitalDelayType01 := (0.161749 ns, 0.156088 ns);
             tpd_CI_CO : VitalDelayType01 := (0.104983 ns, 0.11293 ns);
             tpd_CI_S : VitalDelayType01 := (0.15389 ns, 0.152414 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CI : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDFXL : entity is TRUE;
end ADDFXL;

architecture behavioral of ADDFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL CI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( CI_ipd, CI, tipd_CI );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, CI_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE CO_zd : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(B_ipd, CI_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(CI_ipd, A_ipd);
          CO_zd := VitalOR2(n2_var, n3_var);

          n4_var := VitalXOR2(A_ipd, B_ipd);
          S_zd := VitalXOR2(n4_var, CI_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE),
                      2 => ( CI_ipd'LAST_EVENT,
                             tpd_CI_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDHX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0922953 ns, 0.0667262 ns);
             tpd_A_S : VitalDelayType01 := (0.124176 ns, 0.129465 ns);
             tpd_B_CO : VitalDelayType01 := (0.0885594 ns, 0.0624596 ns);
             tpd_B_S : VitalDelayType01 := (0.0906882 ns, 0.101533 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDHX1 : entity is TRUE;
end ADDHX1;

architecture behavioral of ADDHX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE CO_zd : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          CO_zd := VitalAND2(A_ipd, B_ipd);

          S_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDHX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.129553 ns, 0.090169 ns);
             tpd_A_S : VitalDelayType01 := (0.157753 ns, 0.167424 ns);
             tpd_B_CO : VitalDelayType01 := (0.125724 ns, 0.0858631 ns);
             tpd_B_S : VitalDelayType01 := (0.122658 ns, 0.138236 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDHX2 : entity is TRUE;
end ADDHX2;

architecture behavioral of ADDHX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE CO_zd : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          CO_zd := VitalAND2(A_ipd, B_ipd);

          S_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDHX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.139609 ns, 0.0945593 ns);
             tpd_A_S : VitalDelayType01 := (0.20474 ns, 0.217166 ns);
             tpd_B_CO : VitalDelayType01 := (0.135836 ns, 0.0906707 ns);
             tpd_B_S : VitalDelayType01 := (0.152198 ns, 0.170368 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDHX4 : entity is TRUE;
end ADDHX4;

architecture behavioral of ADDHX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE CO_zd : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          CO_zd := VitalAND2(A_ipd, B_ipd);

          S_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity ADDHXL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_CO : VitalDelayType01 := (0.0736569 ns, 0.0539864 ns);
             tpd_A_S : VitalDelayType01 := (0.107899 ns, 0.110092 ns);
             tpd_B_CO : VitalDelayType01 := (0.0699283 ns, 0.0497069 ns);
             tpd_B_S : VitalDelayType01 := (0.0748642 ns, 0.0823969 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         CO : out std_ulogic ;
         S : out std_ulogic);

   attribute VITAL_LEVEL0 of ADDHXL : entity is TRUE;
end ADDHXL;

architecture behavioral of ADDHXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE CO_zd : std_ulogic;
      VARIABLE S_zd : std_ulogic;

      -- path delay section variables
      VARIABLE CO_GlitchData : VitalGlitchDataType;
      VARIABLE S_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          CO_zd := VitalAND2(A_ipd, B_ipd);

          S_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => CO,
               OutSignalName => "CO",
               OutTemp => CO_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_CO,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_CO,
                             TRUE)),
               GlitchData => CO_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => S,
               OutSignalName => "S",
               OutTemp => S_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_S,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_S,
                             TRUE)),
               GlitchData => S_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0923713 ns, 0.0666903 ns);
             tpd_B_Y : VitalDelayType01 := (0.0885858 ns, 0.0623641 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2X1 : entity is TRUE;
end AND2X1;

architecture behavioral of AND2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.129282 ns, 0.0899601 ns);
             tpd_B_Y : VitalDelayType01 := (0.125618 ns, 0.0856677 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2X2 : entity is TRUE;
end AND2X2;

architecture behavioral of AND2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.139465 ns, 0.0946807 ns);
             tpd_B_Y : VitalDelayType01 := (0.1358 ns, 0.090485 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2X4 : entity is TRUE;
end AND2X4;

architecture behavioral of AND2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.117791 ns, 0.0815273 ns);
             tpd_B_Y : VitalDelayType01 := (0.114003 ns, 0.0775828 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2X6 : entity is TRUE;
end AND2X6;

architecture behavioral of AND2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.13928 ns, 0.0947778 ns);
             tpd_B_Y : VitalDelayType01 := (0.135646 ns, 0.0909698 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2X8 : entity is TRUE;
end AND2X8;

architecture behavioral of AND2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0737472 ns, 0.0540011 ns);
             tpd_B_Y : VitalDelayType01 := (0.0699565 ns, 0.0497857 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND2XL : entity is TRUE;
end AND2XL;

architecture behavioral of AND2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.139866 ns, 0.0747252 ns);
             tpd_B_Y : VitalDelayType01 := (0.136717 ns, 0.0714799 ns);
             tpd_C_Y : VitalDelayType01 := (0.126602 ns, 0.0662029 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3X1 : entity is TRUE;
end AND3X1;

architecture behavioral of AND3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.194262 ns, 0.0977745 ns);
             tpd_B_Y : VitalDelayType01 := (0.191074 ns, 0.0943779 ns);
             tpd_C_Y : VitalDelayType01 := (0.181612 ns, 0.0894517 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3X2 : entity is TRUE;
end AND3X2;

architecture behavioral of AND3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.209365 ns, 0.102314 ns);
             tpd_B_Y : VitalDelayType01 := (0.206089 ns, 0.0986136 ns);
             tpd_C_Y : VitalDelayType01 := (0.196837 ns, 0.0939309 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3X4 : entity is TRUE;
end AND3X4;

architecture behavioral of AND3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.175963 ns, 0.0886702 ns);
             tpd_B_Y : VitalDelayType01 := (0.172876 ns, 0.0854658 ns);
             tpd_C_Y : VitalDelayType01 := (0.162552 ns, 0.0803405 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3X6 : entity is TRUE;
end AND3X6;

architecture behavioral of AND3X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.207547 ns, 0.101914 ns);
             tpd_B_Y : VitalDelayType01 := (0.204441 ns, 0.098545 ns);
             tpd_C_Y : VitalDelayType01 := (0.194533 ns, 0.0935707 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3X8 : entity is TRUE;
end AND3X8;

architecture behavioral of AND3X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.1134 ns, 0.0618412 ns);
             tpd_B_Y : VitalDelayType01 := (0.109592 ns, 0.0586693 ns);
             tpd_C_Y : VitalDelayType01 := (0.100145 ns, 0.0538438 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND3XL : entity is TRUE;
end AND3XL;

architecture behavioral of AND3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalAND2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.192747 ns, 0.0798673 ns);
             tpd_B_Y : VitalDelayType01 := (0.189808 ns, 0.0779614 ns);
             tpd_C_Y : VitalDelayType01 := (0.17927 ns, 0.0735841 ns);
             tpd_D_Y : VitalDelayType01 := (0.163546 ns, 0.0685072 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4X1 : entity is TRUE;
end AND4X1;

architecture behavioral of AND4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.264823 ns, 0.103442 ns);
             tpd_B_Y : VitalDelayType01 := (0.261394 ns, 0.100541 ns);
             tpd_C_Y : VitalDelayType01 := (0.251772 ns, 0.0961235 ns);
             tpd_D_Y : VitalDelayType01 := (0.237327 ns, 0.0913663 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4X2 : entity is TRUE;
end AND4X2;

architecture behavioral of AND4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.285846 ns, 0.107969 ns);
             tpd_B_Y : VitalDelayType01 := (0.282779 ns, 0.105364 ns);
             tpd_C_Y : VitalDelayType01 := (0.273519 ns, 0.101039 ns);
             tpd_D_Y : VitalDelayType01 := (0.257736 ns, 0.0960435 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4X4 : entity is TRUE;
end AND4X4;

architecture behavioral of AND4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.244288 ns, 0.0949119 ns);
             tpd_B_Y : VitalDelayType01 := (0.241292 ns, 0.0926421 ns);
             tpd_C_Y : VitalDelayType01 := (0.231169 ns, 0.088341 ns);
             tpd_D_Y : VitalDelayType01 := (0.213893 ns, 0.0830434 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4X6 : entity is TRUE;
end AND4X6;

architecture behavioral of AND4X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.286623 ns, 0.108392 ns);
             tpd_B_Y : VitalDelayType01 := (0.28352 ns, 0.105939 ns);
             tpd_C_Y : VitalDelayType01 := (0.273577 ns, 0.101416 ns);
             tpd_D_Y : VitalDelayType01 := (0.256361 ns, 0.0961298 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4X8 : entity is TRUE;
end AND4X8;

architecture behavioral of AND4X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AND4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.156009 ns, 0.0659683 ns);
             tpd_B_Y : VitalDelayType01 := (0.153102 ns, 0.0643791 ns);
             tpd_C_Y : VitalDelayType01 := (0.144284 ns, 0.0608792 ns);
             tpd_D_Y : VitalDelayType01 := (0.12959 ns, 0.0561867 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AND4XL : entity is TRUE;
end AND4XL;

architecture behavioral of AND4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalAND2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO21X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.108368 ns, 0.117646 ns);
             tpd_A1_Y : VitalDelayType01 := (0.104375 ns, 0.108701 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0593572 ns, 0.0915671 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO21X1 : entity is TRUE;
end AO21X1;

architecture behavioral of AO21X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          Y_zd := VitalOR2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO21X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.145641 ns, 0.16154 ns);
             tpd_A1_Y : VitalDelayType01 := (0.141672 ns, 0.153039 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0789374 ns, 0.130556 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO21X2 : entity is TRUE;
end AO21X2;

architecture behavioral of AO21X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          Y_zd := VitalOR2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO21X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.155471 ns, 0.169434 ns);
             tpd_A1_Y : VitalDelayType01 := (0.151748 ns, 0.161538 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0840168 ns, 0.138088 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO21X4 : entity is TRUE;
end AO21X4;

architecture behavioral of AO21X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          Y_zd := VitalOR2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO21XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0905744 ns, 0.0961078 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0868878 ns, 0.0875111 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0493177 ns, 0.0721302 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO21XL : entity is TRUE;
end AO21XL;

architecture behavioral of AO21XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          Y_zd := VitalOR2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO22X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.119559 ns, 0.121499 ns);
             tpd_A1_Y : VitalDelayType01 := (0.115945 ns, 0.114416 ns);
             tpd_B0_Y : VitalDelayType01 := (0.098535 ns, 0.103634 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0941002 ns, 0.0955175 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO22X1 : entity is TRUE;
end AO22X1;

architecture behavioral of AO22X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          Y_zd := VitalOR2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO22X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.156829 ns, 0.159915 ns);
             tpd_A1_Y : VitalDelayType01 := (0.15314 ns, 0.152957 ns);
             tpd_B0_Y : VitalDelayType01 := (0.135194 ns, 0.142053 ns);
             tpd_B1_Y : VitalDelayType01 := (0.130878 ns, 0.134316 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO22X2 : entity is TRUE;
end AO22X2;

architecture behavioral of AO22X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          Y_zd := VitalOR2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO22X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.167437 ns, 0.167475 ns);
             tpd_A1_Y : VitalDelayType01 := (0.163398 ns, 0.160212 ns);
             tpd_B0_Y : VitalDelayType01 := (0.145229 ns, 0.149705 ns);
             tpd_B1_Y : VitalDelayType01 := (0.141311 ns, 0.142603 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO22X4 : entity is TRUE;
end AO22X4;

architecture behavioral of AO22X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          Y_zd := VitalOR2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AO22XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.101299 ns, 0.102143 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0971669 ns, 0.0943617 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0801357 ns, 0.0837097 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0759651 ns, 0.0759412 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AO22XL : entity is TRUE;
end AO22XL;

architecture behavioral of AO22XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          Y_zd := VitalOR2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI211X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0947349 ns, 0.0553487 ns);
             tpd_A1_Y : VitalDelayType01 := (0.083111 ns, 0.0516974 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0720519 ns, 0.0254894 ns);
             tpd_C0_Y : VitalDelayType01 := (0.057512 ns, 0.021222 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI211X1 : entity is TRUE;
end AOI211X1;

architecture behavioral of AOI211X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          n2_var := VitalOR2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI211X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0945009 ns, 0.0544228 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0822448 ns, 0.050467 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0722057 ns, 0.0251063 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0543327 ns, 0.0203578 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI211X2 : entity is TRUE;
end AOI211X2;

architecture behavioral of AOI211X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          n2_var := VitalOR2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI211X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.093527 ns, 0.0540772 ns);
             tpd_A1_Y : VitalDelayType01 := (0.081628 ns, 0.0503233 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0714841 ns, 0.0250493 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0544103 ns, 0.0204157 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI211X4 : entity is TRUE;
end AOI211X4;

architecture behavioral of AOI211X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          n2_var := VitalOR2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI211XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0947357 ns, 0.0535379 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0829675 ns, 0.0499099 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0715317 ns, 0.0247785 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0568491 ns, 0.0206441 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI211XL : entity is TRUE;
end AOI211XL;

architecture behavioral of AOI211XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          n2_var := VitalOR2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI21X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0561684 ns, 0.0479049 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0484386 ns, 0.0442095 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0360733 ns, 0.0192315 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI21X1 : entity is TRUE;
end AOI21X1;

architecture behavioral of AOI21X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI21X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0551195 ns, 0.0468774 ns);
             tpd_A1_Y : VitalDelayType01 := (0.047451 ns, 0.0432042 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0351085 ns, 0.01877 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI21X2 : entity is TRUE;
end AOI21X2;

architecture behavioral of AOI21X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI21X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0548181 ns, 0.046632 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0471294 ns, 0.0429668 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0352102 ns, 0.0188099 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI21X4 : entity is TRUE;
end AOI21X4;

architecture behavioral of AOI21X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI21XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0562397 ns, 0.0465944 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0480704 ns, 0.042696 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0355637 ns, 0.0186012 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI21XL : entity is TRUE;
end AOI21XL;

architecture behavioral of AOI21XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI221X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.109293 ns, 0.0626751 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0984556 ns, 0.0590781 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0933147 ns, 0.055 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0829426 ns, 0.0513707 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0603798 ns, 0.0223432 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI221X1 : entity is TRUE;
end AOI221X1;

architecture behavioral of AOI221X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI221X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.104091 ns, 0.0588734 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0934551 ns, 0.0553154 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0881693 ns, 0.051633 ns);
             tpd_B1_Y : VitalDelayType01 := (0.077583 ns, 0.0479815 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0553109 ns, 0.0206346 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI221X2 : entity is TRUE;
end AOI221X2;

architecture behavioral of AOI221X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI221X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.104339 ns, 0.0588686 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0933693 ns, 0.0551782 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0886121 ns, 0.0518279 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0772051 ns, 0.0477127 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0561348 ns, 0.020688 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI221X4 : entity is TRUE;
end AOI221X4;

architecture behavioral of AOI221X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI221XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.109714 ns, 0.0610743 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0991175 ns, 0.0575236 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0934502 ns, 0.053775 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0830221 ns, 0.0501045 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0597651 ns, 0.02174 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI221XL : entity is TRUE;
end AOI221XL;

architecture behavioral of AOI221XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI222X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.12126 ns, 0.0747935 ns);
             tpd_A1_Y : VitalDelayType01 := (0.111936 ns, 0.0711658 ns);
             tpd_B0_Y : VitalDelayType01 := (0.106249 ns, 0.0640509 ns);
             tpd_B1_Y : VitalDelayType01 := (0.096369 ns, 0.0599682 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0742884 ns, 0.0452431 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0651616 ns, 0.0415125 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI222X1 : entity is TRUE;
end AOI222X1;

architecture behavioral of AOI222X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(C0_ipd, C1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(B0_ipd, B1_ipd);
          n4_var := VitalOR2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI222X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.11688 ns, 0.0717112 ns);
             tpd_A1_Y : VitalDelayType01 := (0.107599 ns, 0.0681565 ns);
             tpd_B0_Y : VitalDelayType01 := (0.101842 ns, 0.061078 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0918653 ns, 0.057083 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0712692 ns, 0.0430061 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0618642 ns, 0.0392529 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI222X2 : entity is TRUE;
end AOI222X2;

architecture behavioral of AOI222X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(C0_ipd, C1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(B0_ipd, B1_ipd);
          n4_var := VitalOR2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI222X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.117208 ns, 0.0716146 ns);
             tpd_A1_Y : VitalDelayType01 := (0.107662 ns, 0.0679861 ns);
             tpd_B0_Y : VitalDelayType01 := (0.102292 ns, 0.0611667 ns);
             tpd_B1_Y : VitalDelayType01 := (0.091645 ns, 0.0568287 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0721144 ns, 0.0431433 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0626246 ns, 0.0393717 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI222X4 : entity is TRUE;
end AOI222X4;

architecture behavioral of AOI222X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(C0_ipd, C1_ipd);
          n1_var := VitalAND2(A0_ipd, A1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(B0_ipd, B1_ipd);
          n4_var := VitalOR2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI222XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.122253 ns, 0.0728 ns);
             tpd_A1_Y : VitalDelayType01 := (0.112649 ns, 0.0692943 ns);
             tpd_B0_Y : VitalDelayType01 := (0.1069 ns, 0.0624251 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0968738 ns, 0.0583133 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0743577 ns, 0.0442181 ns);
             tpd_C1_Y : VitalDelayType01 := (0.064367 ns, 0.04014 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI222XL : entity is TRUE;
end AOI222XL;

architecture behavioral of AOI222XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(C0_ipd, C1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalAND2(B0_ipd, B1_ipd);
          n4_var := VitalOR2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI22X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0644517 ns, 0.0581716 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0574765 ns, 0.0541099 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0472372 ns, 0.0394283 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0400516 ns, 0.0353078 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI22X1 : entity is TRUE;
end AOI22X1;

architecture behavioral of AOI22X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI22X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0634561 ns, 0.0574006 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0567889 ns, 0.0535863 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0470161 ns, 0.039334 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0401544 ns, 0.035375 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI22X2 : entity is TRUE;
end AOI22X2;

architecture behavioral of AOI22X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI22X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0631546 ns, 0.0571548 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0565002 ns, 0.0533603 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0471821 ns, 0.0393169 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0402142 ns, 0.0353864 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI22X4 : entity is TRUE;
end AOI22X4;

architecture behavioral of AOI22X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI22XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0644822 ns, 0.0565658 ns);
             tpd_A1_Y : VitalDelayType01 := (0.057197 ns, 0.0523857 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0467147 ns, 0.0380675 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0396373 ns, 0.0338749 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI22XL : entity is TRUE;
end AOI22XL;

architecture behavioral of AOI22XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(B0_ipd, B1_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB1X1 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.076945 ns, 0.104545 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0717712 ns, 0.0978524 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0448383 ns, 0.0220209 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB1X1 : entity is TRUE;
end AOI2BB1X1;

architecture behavioral of AOI2BB1X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB1X2 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0966305 ns, 0.149716 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0910052 ns, 0.143241 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0458315 ns, 0.0208071 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB1X2 : entity is TRUE;
end AOI2BB1X2;

architecture behavioral of AOI2BB1X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB1X4 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.101892 ns, 0.158606 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0963203 ns, 0.15221 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0467758 ns, 0.0208962 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB1X4 : entity is TRUE;
end AOI2BB1X4;

architecture behavioral of AOI2BB1X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB1XL is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0666218 ns, 0.0818935 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0616802 ns, 0.0748704 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0433485 ns, 0.0216117 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB1XL : entity is TRUE;
end AOI2BB1XL;

architecture behavioral of AOI2BB1XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB2X1 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.101588 ns, 0.104166 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0951923 ns, 0.0979299 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0459531 ns, 0.0388924 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0391071 ns, 0.0349841 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB2X1 : entity is TRUE;
end AOI2BB2X1;

architecture behavioral of AOI2BB2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB2X2 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.12472 ns, 0.132539 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.1182 ns, 0.12433 ns);
             tpd_B0_Y : VitalDelayType01 := (0.04604 ns, 0.0389155 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0390078 ns, 0.034779 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB2X2 : entity is TRUE;
end AOI2BB2X2;

architecture behavioral of AOI2BB2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB2X4 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.130384 ns, 0.137681 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.123776 ns, 0.129136 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0462198 ns, 0.0391562 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0389047 ns, 0.03488 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB2X4 : entity is TRUE;
end AOI2BB2X4;

architecture behavioral of AOI2BB2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI2BB2XL is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0898431 ns, 0.0883862 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0836985 ns, 0.0834628 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0457452 ns, 0.0374443 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0387286 ns, 0.0337296 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI2BB2XL : entity is TRUE;
end AOI2BB2XL;

architecture behavioral of AOI2BB2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI31X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0649224 ns, 0.0801636 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0598807 ns, 0.0770556 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0510127 ns, 0.0676189 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0379378 ns, 0.019173 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI31X1 : entity is TRUE;
end AOI31X1;

architecture behavioral of AOI31X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI31X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0649054 ns, 0.0798014 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0599353 ns, 0.0766582 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0508075 ns, 0.0666613 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0371539 ns, 0.0186823 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI31X2 : entity is TRUE;
end AOI31X2;

architecture behavioral of AOI31X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI31X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0660652 ns, 0.0816801 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0601899 ns, 0.0776311 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0509522 ns, 0.0672594 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0380579 ns, 0.018954 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI31X4 : entity is TRUE;
end AOI31X4;

architecture behavioral of AOI31X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI31XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0657865 ns, 0.0789392 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0601692 ns, 0.0751105 ns);
             tpd_A2_Y : VitalDelayType01 := (0.05105 ns, 0.0655909 ns);
             tpd_B0_Y : VitalDelayType01 := (0.038173 ns, 0.0187449 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI31XL : entity is TRUE;
end AOI31XL;

architecture behavioral of AOI31XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalOR2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI32X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.072505 ns, 0.0965241 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0678923 ns, 0.0930719 ns);
             tpd_A2_Y : VitalDelayType01 := (0.060069 ns, 0.0834873 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0489823 ns, 0.0395426 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0423869 ns, 0.0355024 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI32X1 : entity is TRUE;
end AOI32X1;

architecture behavioral of AOI32X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI32X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.072408 ns, 0.0962745 ns);
             tpd_A1_Y : VitalDelayType01 := (0.067812 ns, 0.0928662 ns);
             tpd_A2_Y : VitalDelayType01 := (0.059912 ns, 0.0828837 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0488405 ns, 0.0392184 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0423258 ns, 0.0352069 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI32X2 : entity is TRUE;
end AOI32X2;

architecture behavioral of AOI32X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI32X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0721113 ns, 0.095555 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0674034 ns, 0.0921909 ns);
             tpd_A2_Y : VitalDelayType01 := (0.059599 ns, 0.0824163 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0489034 ns, 0.0391116 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0423638 ns, 0.0352144 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI32X4 : entity is TRUE;
end AOI32X4;

architecture behavioral of AOI32X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI32XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0732665 ns, 0.0948754 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0683522 ns, 0.0913876 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0603779 ns, 0.0815974 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0491714 ns, 0.0385676 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0425623 ns, 0.03485 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI32XL : entity is TRUE;
end AOI32XL;

architecture behavioral of AOI32XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI33X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0821193 ns, 0.111907 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0775638 ns, 0.108741 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0697132 ns, 0.0986619 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0594752 ns, 0.0702317 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0549431 ns, 0.0671503 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0470281 ns, 0.0566718 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI33X1 : entity is TRUE;
end AOI33X1;

architecture behavioral of AOI33X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n2_var, B2_ipd);
          n4_var := VitalOR2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI33X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0821592 ns, 0.111472 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0772697 ns, 0.108196 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0696111 ns, 0.0981603 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0586451 ns, 0.0687765 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0541053 ns, 0.065576 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0462994 ns, 0.055459 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI33X2 : entity is TRUE;
end AOI33X2;

architecture behavioral of AOI33X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n2_var, B2_ipd);
          n4_var := VitalOR2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI33X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0820533 ns, 0.110975 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0770008 ns, 0.107498 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0695083 ns, 0.0976991 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0590652 ns, 0.0690079 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0541359 ns, 0.0655587 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0463632 ns, 0.0554442 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI33X4 : entity is TRUE;
end AOI33X4;

architecture behavioral of AOI33X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n2_var, B2_ipd);
          n4_var := VitalOR2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity AOI33XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0824327 ns, 0.109019 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0777954 ns, 0.105968 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0697006 ns, 0.0958658 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0594066 ns, 0.0683718 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0548293 ns, 0.065319 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0467831 ns, 0.0549683 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of AOI33XL : entity is TRUE;
end AOI33XL;

architecture behavioral of AOI33XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, A2_ipd);
          n2_var := VitalAND2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n2_var, B2_ipd);
          n4_var := VitalOR2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BMXIX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_M0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_M1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_X2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_PPN : VitalDelayType01 := (0.207709 ns, 0.228041 ns);
             tpd_M0_PPN : VitalDelayType01 := (0.204155 ns, 0.217383 ns);
             tpd_M1_PPN : VitalDelayType01 := (0.205762 ns, 0.215635 ns);
             tpd_S_PPN : VitalDelayType01 := (0.210932 ns, 0.225166 ns);
             tpd_X2_PPN : VitalDelayType01 := (0.148162 ns, 0.150954 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         M0 : in std_ulogic := 'U' ;
         M1 : in std_ulogic := 'U' ;
         S : in std_ulogic := 'U' ;
         X2 : in std_ulogic := 'U' ;
         PPN : out std_ulogic);

   attribute VITAL_LEVEL0 of BMXIX2 : entity is TRUE;
end BMXIX2;

architecture behavioral of BMXIX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL M0_ipd : std_ulogic := 'X';
   SIGNAL M1_ipd : std_ulogic := 'X';
   SIGNAL S_ipd : std_ulogic := 'X';
   SIGNAL X2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( M0_ipd, M0, tipd_M0 );
   VitalWireDelay( M1_ipd, M1, tipd_M1 );
   VitalWireDelay( S_ipd, S, tipd_S );
   VitalWireDelay( X2_ipd, X2, tipd_X2 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, M0_ipd, M1_ipd, S_ipd, X2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE PPN_zd : std_ulogic;

      -- path delay section variables
      VARIABLE PPN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(A_ipd, S_ipd, M0_ipd);
          n1_var := VitalMUX2(A_ipd, S_ipd, M1_ipd);
          PPN_zd := VitalMUX2(n0_var, n1_var, X2_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => PPN,
               OutSignalName => "PPN",
               OutTemp => PPN_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_PPN,
                             TRUE),
                      1 => ( M0_ipd'LAST_EVENT,
                             tpd_M0_PPN,
                             TRUE),
                      2 => ( M1_ipd'LAST_EVENT,
                             tpd_M1_PPN,
                             TRUE),
                      3 => ( S_ipd'LAST_EVENT,
                             tpd_S_PPN,
                             TRUE),
                      4 => ( X2_ipd'LAST_EVENT,
                             tpd_X2_PPN,
                             TRUE)),
               GlitchData => PPN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BMXIX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_M0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_M1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_X2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_PPN : VitalDelayType01 := (0.308386 ns, 0.343246 ns);
             tpd_M0_PPN : VitalDelayType01 := (0.3032 ns, 0.331155 ns);
             tpd_M1_PPN : VitalDelayType01 := (0.306273 ns, 0.332113 ns);
             tpd_S_PPN : VitalDelayType01 := (0.311287 ns, 0.340481 ns);
             tpd_X2_PPN : VitalDelayType01 := (0.231529 ns, 0.248416 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         M0 : in std_ulogic := 'U' ;
         M1 : in std_ulogic := 'U' ;
         S : in std_ulogic := 'U' ;
         X2 : in std_ulogic := 'U' ;
         PPN : out std_ulogic);

   attribute VITAL_LEVEL0 of BMXIX4 : entity is TRUE;
end BMXIX4;

architecture behavioral of BMXIX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL M0_ipd : std_ulogic := 'X';
   SIGNAL M1_ipd : std_ulogic := 'X';
   SIGNAL S_ipd : std_ulogic := 'X';
   SIGNAL X2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( M0_ipd, M0, tipd_M0 );
   VitalWireDelay( M1_ipd, M1, tipd_M1 );
   VitalWireDelay( S_ipd, S, tipd_S );
   VitalWireDelay( X2_ipd, X2, tipd_X2 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, M0_ipd, M1_ipd, S_ipd, X2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE PPN_zd : std_ulogic;

      -- path delay section variables
      VARIABLE PPN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(A_ipd, S_ipd, M0_ipd);
          n1_var := VitalMUX2(A_ipd, S_ipd, M1_ipd);
          PPN_zd := VitalMUX2(n0_var, n1_var, X2_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => PPN,
               OutSignalName => "PPN",
               OutTemp => PPN_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_PPN,
                             TRUE),
                      1 => ( M0_ipd'LAST_EVENT,
                             tpd_M0_PPN,
                             TRUE),
                      2 => ( M1_ipd'LAST_EVENT,
                             tpd_M1_PPN,
                             TRUE),
                      3 => ( S_ipd'LAST_EVENT,
                             tpd_S_PPN,
                             TRUE),
                      4 => ( X2_ipd'LAST_EVENT,
                             tpd_X2_PPN,
                             TRUE)),
               GlitchData => PPN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0809595 ns, 0.087511 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX12 : entity is TRUE;
end BUFX12;

architecture behavioral of BUFX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX16 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.135689 ns, 0.139187 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX16 : entity is TRUE;
end BUFX16;

architecture behavioral of BUFX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0758444 ns, 0.0828616 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX2 : entity is TRUE;
end BUFX2;

architecture behavioral of BUFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX20 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0810602 ns, 0.0877325 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX20 : entity is TRUE;
end BUFX20;

architecture behavioral of BUFX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0700349 ns, 0.0746787 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX3 : entity is TRUE;
end BUFX3;

architecture behavioral of BUFX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0811608 ns, 0.0877362 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX4 : entity is TRUE;
end BUFX4;

architecture behavioral of BUFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0690066 ns, 0.0737649 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX6 : entity is TRUE;
end BUFX6;

architecture behavioral of BUFX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity BUFX8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0806435 ns, 0.0871763 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of BUFX8 : entity is TRUE;
end BUFX8;

architecture behavioral of BUFX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0881441 ns, 0.105458 ns);
             tpd_B_Y : VitalDelayType01 := (0.0839507 ns, 0.0960668 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X12 : entity is TRUE;
end CLKAND2X12;

architecture behavioral of CLKAND2X12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0831725 ns, 0.100058 ns);
             tpd_B_Y : VitalDelayType01 := (0.079472 ns, 0.0911327 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X2 : entity is TRUE;
end CLKAND2X2;

architecture behavioral of CLKAND2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0766895 ns, 0.0914466 ns);
             tpd_B_Y : VitalDelayType01 := (0.0728647 ns, 0.0823358 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X3 : entity is TRUE;
end CLKAND2X3;

architecture behavioral of CLKAND2X3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0870333 ns, 0.104295 ns);
             tpd_B_Y : VitalDelayType01 := (0.0833032 ns, 0.0955701 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X4 : entity is TRUE;
end CLKAND2X4;

architecture behavioral of CLKAND2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0769696 ns, 0.0922129 ns);
             tpd_B_Y : VitalDelayType01 := (0.07285 ns, 0.0827315 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X6 : entity is TRUE;
end CLKAND2X6;

architecture behavioral of CLKAND2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKAND2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0878454 ns, 0.105463 ns);
             tpd_B_Y : VitalDelayType01 := (0.0837637 ns, 0.0961366 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKAND2X8 : entity is TRUE;
end CLKAND2X8;

architecture behavioral of CLKAND2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalAND2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0809595 ns, 0.087511 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX12 : entity is TRUE;
end CLKBUFX12;

architecture behavioral of CLKBUFX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX16 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.135689 ns, 0.139187 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX16 : entity is TRUE;
end CLKBUFX16;

architecture behavioral of CLKBUFX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0758444 ns, 0.0828616 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX2 : entity is TRUE;
end CLKBUFX2;

architecture behavioral of CLKBUFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX20 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0810602 ns, 0.0877325 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX20 : entity is TRUE;
end CLKBUFX20;

architecture behavioral of CLKBUFX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0700349 ns, 0.0746787 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX3 : entity is TRUE;
end CLKBUFX3;

architecture behavioral of CLKBUFX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0811608 ns, 0.0877362 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX4 : entity is TRUE;
end CLKBUFX4;

architecture behavioral of CLKBUFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0690066 ns, 0.0737649 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX6 : entity is TRUE;
end CLKBUFX6;

architecture behavioral of CLKBUFX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKBUFX8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0806435 ns, 0.0871763 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKBUFX8 : entity is TRUE;
end CLKBUFX8;

architecture behavioral of CLKBUFX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0200932 ns, 0.0174878 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX1 : entity is TRUE;
end CLKINVX1;

architecture behavioral of CLKINVX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0192106 ns, 0.016805 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX12 : entity is TRUE;
end CLKINVX12;

architecture behavioral of CLKINVX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX16 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0650715 ns, 0.0555559 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX16 : entity is TRUE;
end CLKINVX16;

architecture behavioral of CLKINVX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0190821 ns, 0.0166608 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX2 : entity is TRUE;
end CLKINVX2;

architecture behavioral of CLKINVX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX20 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0193625 ns, 0.0169331 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX20 : entity is TRUE;
end CLKINVX20;

architecture behavioral of CLKINVX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0195457 ns, 0.0170638 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX3 : entity is TRUE;
end CLKINVX3;

architecture behavioral of CLKINVX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0190909 ns, 0.016675 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX4 : entity is TRUE;
end CLKINVX4;

architecture behavioral of CLKINVX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0195072 ns, 0.0170388 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX6 : entity is TRUE;
end CLKINVX6;

architecture behavioral of CLKINVX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKINVX8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0193802 ns, 0.0169386 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKINVX8 : entity is TRUE;
end CLKINVX8;

architecture behavioral of CLKINVX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.396061 ns, 0.445528 ns);
             tpd_B_Y : VitalDelayType01 := (0.393642 ns, 0.447493 ns);
             tpd_S0_Y : VitalDelayType01 := (0.387235 ns, 0.43449 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X12 : entity is TRUE;
end CLKMX2X12;

architecture behavioral of CLKMX2X12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.145412 ns, 0.159435 ns);
             tpd_B_Y : VitalDelayType01 := (0.142761 ns, 0.162689 ns);
             tpd_S0_Y : VitalDelayType01 := (0.139746 ns, 0.151078 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X2 : entity is TRUE;
end CLKMX2X2;

architecture behavioral of CLKMX2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.137881 ns, 0.144058 ns);
             tpd_B_Y : VitalDelayType01 := (0.133073 ns, 0.151263 ns);
             tpd_S0_Y : VitalDelayType01 := (0.136588 ns, 0.14196 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X3 : entity is TRUE;
end CLKMX2X3;

architecture behavioral of CLKMX2X3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.179901 ns, 0.193237 ns);
             tpd_B_Y : VitalDelayType01 := (0.175829 ns, 0.197757 ns);
             tpd_S0_Y : VitalDelayType01 := (0.176193 ns, 0.187846 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X4 : entity is TRUE;
end CLKMX2X4;

architecture behavioral of CLKMX2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.235593 ns, 0.257825 ns);
             tpd_B_Y : VitalDelayType01 := (0.231367 ns, 0.262042 ns);
             tpd_S0_Y : VitalDelayType01 := (0.23148 ns, 0.251597 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X6 : entity is TRUE;
end CLKMX2X6;

architecture behavioral of CLKMX2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKMX2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.28996 ns, 0.320973 ns);
             tpd_B_Y : VitalDelayType01 := (0.285349 ns, 0.324321 ns);
             tpd_S0_Y : VitalDelayType01 := (0.284701 ns, 0.314166 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKMX2X8 : entity is TRUE;
end CLKMX2X8;

architecture behavioral of CLKMX2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKXOR2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.124336 ns, 0.129473 ns);
             tpd_B_Y : VitalDelayType01 := (0.0905571 ns, 0.101103 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKXOR2X1 : entity is TRUE;
end CLKXOR2X1;

architecture behavioral of CLKXOR2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKXOR2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.157397 ns, 0.167107 ns);
             tpd_B_Y : VitalDelayType01 := (0.122379 ns, 0.138311 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKXOR2X2 : entity is TRUE;
end CLKXOR2X2;

architecture behavioral of CLKXOR2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKXOR2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.210071 ns, 0.223122 ns);
             tpd_B_Y : VitalDelayType01 := (0.163976 ns, 0.183437 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKXOR2X4 : entity is TRUE;
end CLKXOR2X4;

architecture behavioral of CLKXOR2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity CLKXOR2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.32164 ns, 0.348487 ns);
             tpd_B_Y : VitalDelayType01 := (0.273476 ns, 0.307327 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of CLKXOR2X8 : entity is TRUE;
end CLKXOR2X8;

architecture behavioral of CLKXOR2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.170237 ns;
             tpw_CK_negedge : VitalDelayType := 0.170961 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.192174 ns, 0.230126 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFHQX1 : entity is TRUE;
end DFFHQX1;

architecture behavioral of DFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.179743 ns;
             tpw_CK_negedge : VitalDelayType := 0.170447 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.20906 ns, 0.248982 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFHQX2 : entity is TRUE;
end DFFHQX2;

architecture behavioral of DFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0003 := VitalINV(P0002);

          Q_zd := VitalINV(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.196019 ns;
             tpw_CK_negedge : VitalDelayType := 0.171535 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.231772 ns, 0.262413 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFHQX4 : entity is TRUE;
end DFFHQX4;

architecture behavioral of DFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.230134 ns;
             tpw_CK_negedge : VitalDelayType := 0.170973 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.279481 ns, 0.298609 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFHQX8 : entity is TRUE;
end DFFHQX8;

architecture behavioral of DFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFNSRX1 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.1875 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             tpw_CKN_posedge : VitalDelayType := 0.150564 ns;
             tpw_CKN_negedge : VitalDelayType := 0.193141 ns;
             tpw_RN_negedge : VitalDelayType := 0.229291 ns;
             tpw_SN_negedge : VitalDelayType := 0.152704 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.1875 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.1875 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.235215 ns, 0.216889 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.271154 ns, 0.290436 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.294774 ns);
             tpd_RN_QN : VitalDelayType01 := (0.349374 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.202635 ns, 0.262258 ns);
             tpd_SN_QN : VitalDelayType01 := (0.316956 ns, 0.256921 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFNSRX1 : entity is TRUE;
end DFFNSRX1;

architecture behavioral of DFFNSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/DFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0002 := VitalINV(P0001);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFNSRX2 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.1875 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             tpw_CKN_posedge : VitalDelayType := 0.153643 ns;
             tpw_CKN_negedge : VitalDelayType := 0.221224 ns;
             tpw_RN_negedge : VitalDelayType := 0.256819 ns;
             tpw_SN_negedge : VitalDelayType := 0.17802 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.1875 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.1875 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.249873 ns, 0.230986 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.315845 ns, 0.340072 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.312594 ns);
             tpd_RN_QN : VitalDelayType01 := (0.398098 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.217851 ns, 0.279151 ns);
             tpd_SN_QN : VitalDelayType01 := (0.36461 ns, 0.306293 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFNSRX2 : entity is TRUE;
end DFFNSRX2;

architecture behavioral of DFFNSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/DFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0002 := VitalINV(P0001);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFNSRX4 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.234375 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.1875 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             tpw_CKN_posedge : VitalDelayType := 0.152002 ns;
             tpw_CKN_negedge : VitalDelayType := 0.257531 ns;
             tpw_RN_negedge : VitalDelayType := 0.277908 ns;
             tpw_SN_negedge : VitalDelayType := 0.199952 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.1875 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.1875 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.288018 ns, 0.273458 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.367521 ns, 0.385556 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.353786 ns);
             tpd_RN_QN : VitalDelayType01 := (0.448198 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.251803 ns, 0.321535 ns);
             tpd_SN_QN : VitalDelayType01 := (0.415948 ns, 0.346216 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFNSRX4 : entity is TRUE;
end DFFNSRX4;

architecture behavioral of DFFNSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/DFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFNSRXL is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.1875 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             tpw_CKN_posedge : VitalDelayType := 0.150855 ns;
             tpw_CKN_negedge : VitalDelayType := 0.174865 ns;
             tpw_RN_negedge : VitalDelayType := 0.212465 ns;
             tpw_SN_negedge : VitalDelayType := 0.135956 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.1875 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.1875 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.220298 ns, 0.198969 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.236861 ns, 0.25526 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.276693 ns);
             tpd_RN_QN : VitalDelayType01 := (0.315013 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.188768 ns, 0.24403 ns);
             tpd_SN_QN : VitalDelayType01 := (0.282317 ns, 0.223216 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFNSRXL : entity is TRUE;
end DFFNSRXL;

architecture behavioral of DFFNSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/DFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0002 := VitalINV(P0001);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.159448 ns;
             tpw_CK_negedge : VitalDelayType := 0.152179 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.189686 ns, 0.218933 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFQX1 : entity is TRUE;
end DFFQX1;

architecture behavioral of DFFQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.16996 ns;
             tpw_CK_negedge : VitalDelayType := 0.152322 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.208065 ns, 0.232405 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFQX2 : entity is TRUE;
end DFFQX2;

architecture behavioral of DFFQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0003 := VitalINV(P0002);

          Q_zd := VitalINV(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.194573 ns;
             tpw_CK_negedge : VitalDelayType := 0.152737 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.241286 ns, 0.255872 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFQX4 : entity is TRUE;
end DFFQX4;

architecture behavioral of DFFQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFQXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.15226 ns;
             tpw_CK_negedge : VitalDelayType := 0.152398 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.177227 ns, 0.204336 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFQXL : entity is TRUE;
end DFFQXL;

architecture behavioral of DFFQXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFQXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFQXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.1865 ns;
             tpw_CK_posedge : VitalDelayType := 0.173619 ns;
             tpw_CK_negedge : VitalDelayType := 0.170112 ns;
             tpw_RN_negedge : VitalDelayType := 0.10768 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.232409 ns, 0.235213 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0702616 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRHQX1 : entity is TRUE;
end DFFRHQX1;

architecture behavioral of DFFRHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.1865 ns;
             tpw_CK_posedge : VitalDelayType := 0.186254 ns;
             tpw_CK_negedge : VitalDelayType := 0.170758 ns;
             tpw_RN_negedge : VitalDelayType := 0.115647 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.260335 ns, 0.253517 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.085851 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRHQX2 : entity is TRUE;
end DFFRHQX2;

architecture behavioral of DFFRHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0002 := VitalINV(P0001);

          Q_zd := VitalINV(P0002);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.1865 ns;
             tpw_CK_posedge : VitalDelayType := 0.202566 ns;
             tpw_CK_negedge : VitalDelayType := 0.170208 ns;
             tpw_RN_negedge : VitalDelayType := 0.119592 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.27606 ns, 0.266238 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0789162 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRHQX4 : entity is TRUE;
end DFFRHQX4;

architecture behavioral of DFFRHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.1865 ns;
             tpw_CK_posedge : VitalDelayType := 0.244232 ns;
             tpw_CK_negedge : VitalDelayType := 0.172224 ns;
             tpw_RN_negedge : VitalDelayType := 0.135705 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.326319 ns, 0.304746 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0790644 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRHQX8 : entity is TRUE;
end DFFRHQX8;

architecture behavioral of DFFRHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX8",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.1865 ns;
             tpw_CK_posedge : VitalDelayType := 0.207033 ns;
             tpw_CK_negedge : VitalDelayType := 0.152735 ns;
             tpw_RN_negedge : VitalDelayType := 0.115399 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.251575 ns, 0.23569 ns);
             tpd_CK_QN : VitalDelayType01 := (0.288429 ns, 0.314943 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0911232 ns);
             tpd_RN_QN : VitalDelayType01 := (0.144549 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRX1 : entity is TRUE;
end DFFRX1;

architecture behavioral of DFFRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.1865 ns;
             tpw_CK_posedge : VitalDelayType := 0.24016 ns;
             tpw_CK_negedge : VitalDelayType := 0.151761 ns;
             tpw_RN_negedge : VitalDelayType := 0.118774 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.268765 ns, 0.245176 ns);
             tpd_CK_QN : VitalDelayType01 := (0.327531 ns, 0.372796 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0910455 ns);
             tpd_RN_QN : VitalDelayType01 := (0.174105 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRX2 : entity is TRUE;
end DFFRX2;

architecture behavioral of DFFRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.1865 ns;
             tpw_CK_posedge : VitalDelayType := 0.269741 ns;
             tpw_CK_negedge : VitalDelayType := 0.151599 ns;
             tpw_RN_negedge : VitalDelayType := 0.128292 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.298783 ns, 0.269768 ns);
             tpd_CK_QN : VitalDelayType01 := (0.361231 ns, 0.407549 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0845114 ns);
             tpd_RN_QN : VitalDelayType01 := (0.174165 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRX4 : entity is TRUE;
end DFFRX4;

architecture behavioral of DFFRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.1865 ns;
             tpw_CK_posedge : VitalDelayType := 0.185455 ns;
             tpw_CK_negedge : VitalDelayType := 0.152756 ns;
             tpw_RN_negedge : VitalDelayType := 0.110728 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.233178 ns, 0.221978 ns);
             tpd_CK_QN : VitalDelayType01 := (0.258807 ns, 0.271872 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0785835 ns);
             tpd_RN_QN : VitalDelayType01 := (0.115547 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFRXL : entity is TRUE;
end DFFRXL;

architecture behavioral of DFFRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRXL",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.179889 ns;
             tpw_CK_negedge : VitalDelayType := 0.183158 ns;
             tpw_SN_negedge : VitalDelayType := 0.103242 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.19207 ns, 0.249017 ns);
             tpd_SN_Q : VitalDelayType01 := (0.167789 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSHQX1 : entity is TRUE;
end DFFSHQX1;

architecture behavioral of DFFSHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.190164 ns;
             tpw_CK_negedge : VitalDelayType := 0.183203 ns;
             tpw_SN_negedge : VitalDelayType := 0.112481 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.208429 ns, 0.269662 ns);
             tpd_SN_Q : VitalDelayType01 := (0.185456 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSHQX2 : entity is TRUE;
end DFFSHQX2;

architecture behavioral of DFFSHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.210267 ns;
             tpw_CK_negedge : VitalDelayType := 0.184181 ns;
             tpw_SN_negedge : VitalDelayType := 0.124497 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.23154 ns, 0.290446 ns);
             tpd_SN_Q : VitalDelayType01 := (0.206236 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSHQX4 : entity is TRUE;
end DFFSHQX4;

architecture behavioral of DFFSHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.251525 ns;
             tpw_CK_negedge : VitalDelayType := 0.183473 ns;
             tpw_SN_negedge : VitalDelayType := 0.150439 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.280116 ns, 0.340879 ns);
             tpd_SN_Q : VitalDelayType01 := (0.252281 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSHQX8 : entity is TRUE;
end DFFSHQX8;

architecture behavioral of DFFSHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX8",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.181945 ns;
             tpw_CK_negedge : VitalDelayType := 0.1848 ns;
             tpw_RN_negedge : VitalDelayType := 0.205483 ns;
             tpw_SN_negedge : VitalDelayType := 0.114045 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.205262 ns, 0.246431 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.282729 ns);
             tpd_SN_Q : VitalDelayType01 := (0.179692 ns, 0.238148 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRHQX1 : entity is TRUE;
end DFFSRHQX1;

architecture behavioral of DFFSRHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE N35 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N35 := n0_vec(1);

          P0002 := VitalINV(N35);

          Q_zd := VitalINV(P0002);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.194352 ns;
             tpw_CK_negedge : VitalDelayType := 0.184222 ns;
             tpw_RN_negedge : VitalDelayType := 0.218033 ns;
             tpw_SN_negedge : VitalDelayType := 0.123847 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.227137 ns, 0.269587 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.307756 ns);
             tpd_SN_Q : VitalDelayType01 := (0.199692 ns, 0.263204 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRHQX2 : entity is TRUE;
end DFFSRHQX2;

architecture behavioral of DFFSRHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.216455 ns;
             tpw_CK_negedge : VitalDelayType := 0.184996 ns;
             tpw_RN_negedge : VitalDelayType := 0.228642 ns;
             tpw_SN_negedge : VitalDelayType := 0.135962 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.258426 ns, 0.289501 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.335072 ns);
             tpd_SN_Q : VitalDelayType01 := (0.22061 ns, 0.290706 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRHQX4 : entity is TRUE;
end DFFSRHQX4;

architecture behavioral of DFFSRHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.234375 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.261653 ns;
             tpw_CK_negedge : VitalDelayType := 0.185023 ns;
             tpw_RN_negedge : VitalDelayType := 0.26043 ns;
             tpw_SN_negedge : VitalDelayType := 0.162057 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.320278 ns, 0.339157 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.397744 ns);
             tpd_SN_Q : VitalDelayType01 := (0.268871 ns, 0.352215 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRHQX8 : entity is TRUE;
end DFFSRHQX8;

architecture behavioral of DFFSRHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.206485 ns;
             tpw_CK_negedge : VitalDelayType := 0.167502 ns;
             tpw_RN_negedge : VitalDelayType := 0.233133 ns;
             tpw_SN_negedge : VitalDelayType := 0.152798 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.218026 ns, 0.252542 ns);
             tpd_CK_QN : VitalDelayType01 := (0.307046 ns, 0.273093 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.296134 ns);
             tpd_RN_QN : VitalDelayType01 := (0.350878 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.202699 ns, 0.262901 ns);
             tpd_SN_QN : VitalDelayType01 := (0.317699 ns, 0.257059 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRX1 : entity is TRUE;
end DFFSRX1;

architecture behavioral of DFFSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.233711 ns;
             tpw_CK_negedge : VitalDelayType := 0.167012 ns;
             tpw_RN_negedge : VitalDelayType := 0.252855 ns;
             tpw_SN_negedge : VitalDelayType := 0.176736 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.238801 ns, 0.266305 ns);
             tpd_CK_QN : VitalDelayType01 := (0.351191 ns, 0.328592 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.310072 ns);
             tpd_RN_QN : VitalDelayType01 := (0.395461 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.216316 ns, 0.276799 ns);
             tpd_SN_QN : VitalDelayType01 := (0.36227 ns, 0.304769 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRX2 : entity is TRUE;
end DFFSRX2;

architecture behavioral of DFFSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE QBINT : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          QBINT := VitalINV(P0000);

          Q_zd := VitalINV(QBINT);

          QN_zd := VitalBUF(QBINT);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.234375 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.27183 ns;
             tpw_CK_negedge : VitalDelayType := 0.16687 ns;
             tpw_RN_negedge : VitalDelayType := 0.276276 ns;
             tpw_SN_negedge : VitalDelayType := 0.199748 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.284409 ns, 0.301035 ns);
             tpd_CK_QN : VitalDelayType01 := (0.394926 ns, 0.381801 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.353512 ns);
             tpd_RN_QN : VitalDelayType01 := (0.447927 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.251695 ns, 0.321247 ns);
             tpd_SN_QN : VitalDelayType01 := (0.415645 ns, 0.346151 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRX4 : entity is TRUE;
end DFFSRX4;

architecture behavioral of DFFSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.190183 ns;
             tpw_CK_negedge : VitalDelayType := 0.167603 ns;
             tpw_RN_negedge : VitalDelayType := 0.216151 ns;
             tpw_SN_negedge : VitalDelayType := 0.136431 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.204627 ns, 0.236658 ns);
             tpd_CK_QN : VitalDelayType01 := (0.274718 ns, 0.239339 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.278849 ns);
             tpd_RN_QN : VitalDelayType01 := (0.317255 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.189676 ns, 0.245547 ns);
             tpd_SN_QN : VitalDelayType01 := (0.283954 ns, 0.224148 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSRXL : entity is TRUE;
end DFFSRXL;

architecture behavioral of DFFSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.204167 ns;
             tpw_CK_negedge : VitalDelayType := 0.164813 ns;
             tpw_SN_negedge : VitalDelayType := 0.141974 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.201883 ns, 0.254304 ns);
             tpd_CK_QN : VitalDelayType01 := (0.30847 ns, 0.254995 ns);
             tpd_SN_Q : VitalDelayType01 := (0.190423 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.243149 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSX1 : entity is TRUE;
end DFFSX1;

architecture behavioral of DFFSX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.230078 ns;
             tpw_CK_negedge : VitalDelayType := 0.167503 ns;
             tpw_SN_negedge : VitalDelayType := 0.16583 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.216928 ns, 0.267636 ns);
             tpd_CK_QN : VitalDelayType01 := (0.35222 ns, 0.303454 ns);
             tpd_SN_Q : VitalDelayType01 := (0.204193 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.290191 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSX2 : entity is TRUE;
end DFFSX2;

architecture behavioral of DFFSX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.264396 ns;
             tpw_CK_negedge : VitalDelayType := 0.164458 ns;
             tpw_SN_negedge : VitalDelayType := 0.186382 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.250761 ns, 0.301981 ns);
             tpd_CK_QN : VitalDelayType01 := (0.395761 ns, 0.343248 ns);
             tpd_SN_Q : VitalDelayType01 := (0.235423 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.327178 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSX4 : entity is TRUE;
end DFFSX4;

architecture behavioral of DFFSX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFSXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.188366 ns;
             tpw_CK_negedge : VitalDelayType := 0.164813 ns;
             tpw_SN_negedge : VitalDelayType := 0.126596 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.190421 ns, 0.23881 ns);
             tpd_CK_QN : VitalDelayType01 := (0.276792 ns, 0.224335 ns);
             tpd_SN_Q : VitalDelayType01 := (0.178655 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.21233 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFSXL : entity is TRUE;
end DFFSXL;

architecture behavioral of DFFSXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_0 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSXL",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFSXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/DFFSXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFSXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_0 := VitalINV(D_dly);

          SN_EQ_1 := VitalBUF(SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFTRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.193128 ns;
             tpw_CK_negedge : VitalDelayType := 0.137186 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.202548 ns, 0.233837 ns);
             tpd_CK_QN : VitalDelayType01 := (0.286273 ns, 0.255205 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFTRX1 : entity is TRUE;
end DFFTRX1;

architecture behavioral of DFFTRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX1",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFTRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalAND2(D_dly, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFTRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.216251 ns;
             tpw_CK_negedge : VitalDelayType := 0.137434 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.217182 ns, 0.24292 ns);
             tpd_CK_QN : VitalDelayType01 := (0.324778 ns, 0.303139 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFTRX2 : entity is TRUE;
end DFFTRX2;

architecture behavioral of DFFTRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX2",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFTRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalAND2(D_dly, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFTRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.245715 ns;
             tpw_CK_negedge : VitalDelayType := 0.136875 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.25229 ns, 0.267346 ns);
             tpd_CK_QN : VitalDelayType01 := (0.356926 ns, 0.344484 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFTRX4 : entity is TRUE;
end DFFTRX4;

architecture behavioral of DFFTRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX4",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFTRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalAND2(D_dly, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFTRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.178334 ns;
             tpw_CK_negedge : VitalDelayType := 0.136909 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.190982 ns, 0.220154 ns);
             tpd_CK_QN : VitalDelayType01 := (0.256769 ns, 0.224633 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFTRXL : entity is TRUE;
end DFFTRXL;

architecture behavioral of DFFTRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE D_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRXL",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFTRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFTRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalAND2(D_dly, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          D_EQ_1 := VitalBUF(D_dly);

          RN_EQ_1 := VitalBUF(RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.19272 ns;
             tpw_CK_negedge : VitalDelayType := 0.152202 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.202562 ns, 0.233109 ns);
             tpd_CK_QN : VitalDelayType01 := (0.285584 ns, 0.255342 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFX1 : entity is TRUE;
end DFFX1;

architecture behavioral of DFFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.216188 ns;
             tpw_CK_negedge : VitalDelayType := 0.152708 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.217434 ns, 0.24236 ns);
             tpd_CK_QN : VitalDelayType01 := (0.324519 ns, 0.303679 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFX2 : entity is TRUE;
end DFFX2;

architecture behavioral of DFFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.243809 ns;
             tpw_CK_negedge : VitalDelayType := 0.152631 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.250106 ns, 0.265371 ns);
             tpd_CK_QN : VitalDelayType01 := (0.35485 ns, 0.342203 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFX4 : entity is TRUE;
end DFFX4;

architecture behavioral of DFFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DFFXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.17751 ns;
             tpw_CK_negedge : VitalDelayType := 0.15254 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := 0.0927498 ns;
             tpd_CK_Q : VitalDelayType01 := (0.190296 ns, 0.219059 ns);
             tpd_CK_QN : VitalDelayType01 := (0.255786 ns, 0.223957 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of DFFXL : entity is TRUE;
end DFFXL;

architecture behavioral of DFFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly)

      --timing checks section variables
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/DFFXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/DFFXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_CK OR
                        PWviol_CK );

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, D_dly, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY1X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.162091 ns, 0.159682 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY1X1 : entity is TRUE;
end DLY1X1;

architecture behavioral of DLY1X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY1X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.219059 ns, 0.214895 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY1X4 : entity is TRUE;
end DLY1X4;

architecture behavioral of DLY1X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.30763 ns, 0.304996 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY2X1 : entity is TRUE;
end DLY2X1;

architecture behavioral of DLY2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.365348 ns, 0.361156 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY2X4 : entity is TRUE;
end DLY2X4;

architecture behavioral of DLY2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.454244 ns, 0.451498 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY3X1 : entity is TRUE;
end DLY3X1;

architecture behavioral of DLY3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.511296 ns, 0.506803 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY3X4 : entity is TRUE;
end DLY3X4;

architecture behavioral of DLY3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.591611 ns, 0.588137 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY4X1 : entity is TRUE;
end DLY4X1;

architecture behavioral of DLY4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity DLY4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.646603 ns, 0.642643 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of DLY4X4 : entity is TRUE;
end DLY4X4;

architecture behavioral of DLY4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUF(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.175634 ns;
             tpw_CK_negedge : VitalDelayType := 0.158722 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.201597 ns, 0.239605 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFHQX1 : entity is TRUE;
end EDFFHQX1;

architecture behavioral of EDFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0001);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.184678 ns;
             tpw_CK_negedge : VitalDelayType := 0.158684 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.215134 ns, 0.251065 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFHQX2 : entity is TRUE;
end EDFFHQX2;

architecture behavioral of EDFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0001);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.200358 ns;
             tpw_CK_negedge : VitalDelayType := 0.158082 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.239262 ns, 0.268457 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFHQX4 : entity is TRUE;
end EDFFHQX4;

architecture behavioral of EDFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.232095 ns;
             tpw_CK_negedge : VitalDelayType := 0.159252 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.282409 ns, 0.301196 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFHQX8 : entity is TRUE;
end EDFFHQX8;

architecture behavioral of EDFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX8",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFTRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.194533 ns;
             tpw_CK_negedge : VitalDelayType := 0.152322 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.376 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.1885 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.235375 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.141625 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.20778 ns, 0.231067 ns);
             tpd_CK_QN : VitalDelayType01 := (0.281353 ns, 0.258776 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFTRX1 : entity is TRUE;
end EDFFTRX1;

architecture behavioral of EDFFTRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX1",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFTRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n0_D := VitalAND2(n7_var, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          E_EQ_1_AN_RN_EQ_1 := VitalAND2(E_dly, RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFTRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.220453 ns;
             tpw_CK_negedge : VitalDelayType := 0.154539 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.376 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.1885 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.235375 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.141625 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.223377 ns, 0.245371 ns);
             tpd_CK_QN : VitalDelayType01 := (0.325358 ns, 0.307408 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFTRX2 : entity is TRUE;
end EDFFTRX2;

architecture behavioral of EDFFTRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX2",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFTRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n0_D := VitalAND2(n7_var, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          E_EQ_1_AN_RN_EQ_1 := VitalAND2(E_dly, RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFTRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.246262 ns;
             tpw_CK_negedge : VitalDelayType := 0.153208 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.376 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.1885 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.235375 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.141625 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.2543 ns, 0.269187 ns);
             tpd_CK_QN : VitalDelayType01 := (0.359447 ns, 0.347552 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFTRX4 : entity is TRUE;
end EDFFTRX4;

architecture behavioral of EDFFTRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX4",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFTRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n0_D := VitalAND2(n7_var, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          E_EQ_1_AN_RN_EQ_1 := VitalAND2(E_dly, RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFTRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.182367 ns;
             tpw_CK_negedge : VitalDelayType := 0.152346 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.376 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.1885 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.235375 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.141625 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.199329 ns, 0.227849 ns);
             tpd_CK_QN : VitalDelayType01 := (0.265485 ns, 0.233958 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFTRXL : entity is TRUE;
end EDFFTRXL;

architecture behavioral of EDFFTRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly)

      --timing checks section variables
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRXL",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRXL",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFTRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFTRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n0_D := VitalAND2(n7_var, RN_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          E_EQ_1_AN_RN_EQ_1 := VitalAND2(E_dly, RN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.193161 ns;
             tpw_CK_negedge : VitalDelayType := 0.146627 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.204765 ns, 0.228243 ns);
             tpd_CK_QN : VitalDelayType01 := (0.277893 ns, 0.254973 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFX1 : entity is TRUE;
end EDFFX1;

architecture behavioral of EDFFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.217738 ns;
             tpw_CK_negedge : VitalDelayType := 0.146551 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.219745 ns, 0.241482 ns);
             tpd_CK_QN : VitalDelayType01 := (0.320587 ns, 0.302886 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFX2 : entity is TRUE;
end EDFFX2;

architecture behavioral of EDFFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.246045 ns;
             tpw_CK_negedge : VitalDelayType := 0.146453 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.253451 ns, 0.268629 ns);
             tpd_CK_QN : VitalDelayType01 := (0.358774 ns, 0.346301 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFX4 : entity is TRUE;
end EDFFX4;

architecture behavioral of EDFFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity EDFFXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.181229 ns;
             tpw_CK_negedge : VitalDelayType := 0.147058 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00101408 ns;
             tpd_CK_Q : VitalDelayType01 := (0.196408 ns, 0.224443 ns);
             tpd_CK_QN : VitalDelayType01 := (0.261535 ns, 0.230392 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of EDFFXL : entity is TRUE;
end EDFFXL;

architecture behavioral of EDFFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE E_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFXL",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/EDFFXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/EDFFXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n0_D := VitalMUX2(D_dly, n1_var, E_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          E_EQ_1 := VitalBUF(E_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity HOLDX1 is
   generic (
             tipd_Y : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         Y : inout std_ulogic);

   attribute VITAL_LEVEL0 of HOLDX1 : entity is TRUE;
end HOLDX1;

architecture behavioral of HOLDX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL Y_ipd : std_ulogic := 'X';
   SIGNAL io_wire_0 : std_ulogic := 'X';
   CONSTANT ResultMapping : VitalResultMapType := ('W', 'W', 'L', 'H');

begin

--functionality section
   VitalBUF (io_wire_0, Y);
   VitalBUF (Y,
            io_wire_0,
            ( 0 ps, 0 ps),
            ResultMapping );

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0200932 ns, 0.0174878 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX1 : entity is TRUE;
end INVX1;

architecture behavioral of INVX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0192106 ns, 0.016805 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX12 : entity is TRUE;
end INVX12;

architecture behavioral of INVX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX16 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0650715 ns, 0.0555559 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX16 : entity is TRUE;
end INVX16;

architecture behavioral of INVX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0190821 ns, 0.0166608 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX2 : entity is TRUE;
end INVX2;

architecture behavioral of INVX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX20 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0193625 ns, 0.0169331 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX20 : entity is TRUE;
end INVX20;

architecture behavioral of INVX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0195457 ns, 0.0170638 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX3 : entity is TRUE;
end INVX3;

architecture behavioral of INVX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0190909 ns, 0.016675 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX4 : entity is TRUE;
end INVX4;

architecture behavioral of INVX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0195072 ns, 0.0170388 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX6 : entity is TRUE;
end INVX6;

architecture behavioral of INVX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVX8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0193802 ns, 0.0169386 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVX8 : entity is TRUE;
end INVX8;

architecture behavioral of INVX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity INVXL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0197275 ns, 0.0168683 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of INVXL : entity is TRUE;
end INVXL;

architecture behavioral of INVXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
END BLOCK;

VITALBehavior : PROCESS (A_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalINV(A_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MDFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.170826 ns;
             tpw_CK_negedge : VitalDelayType := 0.160675 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.192297 ns, 0.231157 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of MDFFHQX1 : entity is TRUE;
end MDFFHQX1;

architecture behavioral of MDFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly)

      --timing checks section variables
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE S0_EQ_1 : std_ulogic;
      VARIABLE S0_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX1",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX1",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX1",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/MDFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(D1_dly, D0_dly, S0_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0002 := VitalINV(N30);

          Q_zd := VitalINV(P0002);

          S0_EQ_1 := VitalBUF(S0_dly);

          S0_EQ_0 := VitalINV(S0_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MDFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.179665 ns;
             tpw_CK_negedge : VitalDelayType := 0.160784 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.208124 ns, 0.249252 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of MDFFHQX2 : entity is TRUE;
end MDFFHQX2;

architecture behavioral of MDFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly)

      --timing checks section variables
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE S0_EQ_1 : std_ulogic;
      VARIABLE S0_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX2",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX2",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX2",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/MDFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(D1_dly, D0_dly, S0_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0002 := VitalINV(N30);

          Q_zd := VitalINV(P0002);

          S0_EQ_1 := VitalBUF(S0_dly);

          S0_EQ_0 := VitalINV(S0_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MDFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.196308 ns;
             tpw_CK_negedge : VitalDelayType := 0.160862 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.23131 ns, 0.262949 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of MDFFHQX4 : entity is TRUE;
end MDFFHQX4;

architecture behavioral of MDFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly)

      --timing checks section variables
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE S0_EQ_1 : std_ulogic;
      VARIABLE S0_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX4",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX4",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX4",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/MDFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(D1_dly, D0_dly, S0_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          S0_EQ_1 := VitalBUF(S0_dly);

          S0_EQ_0 := VitalINV(S0_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MDFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.232186 ns;
             tpw_CK_negedge : VitalDelayType := 0.160572 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.281541 ns, 0.300863 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of MDFFHQX8 : entity is TRUE;
end MDFFHQX8;

architecture behavioral of MDFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly)

      --timing checks section variables
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE S0_EQ_1 : std_ulogic;
      VARIABLE S0_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX8",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX8",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/MDFFHQX8",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/MDFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(D1_dly, D0_dly, S0_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          S0_EQ_1 := VitalBUF(S0_dly);

          S0_EQ_0 := VitalINV(S0_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.108607 ns, 0.115472 ns);
             tpd_B_Y : VitalDelayType01 := (0.105894 ns, 0.118702 ns);
             tpd_S0_Y : VitalDelayType01 := (0.103523 ns, 0.107736 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2X1 : entity is TRUE;
end MX2X1;

architecture behavioral of MX2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.145412 ns, 0.159435 ns);
             tpd_B_Y : VitalDelayType01 := (0.142761 ns, 0.162689 ns);
             tpd_S0_Y : VitalDelayType01 := (0.139746 ns, 0.151078 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2X2 : entity is TRUE;
end MX2X2;

architecture behavioral of MX2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.179901 ns, 0.193237 ns);
             tpd_B_Y : VitalDelayType01 := (0.175829 ns, 0.197757 ns);
             tpd_S0_Y : VitalDelayType01 := (0.176193 ns, 0.187846 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2X4 : entity is TRUE;
end MX2X4;

architecture behavioral of MX2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.235593 ns, 0.257825 ns);
             tpd_B_Y : VitalDelayType01 := (0.231367 ns, 0.262042 ns);
             tpd_S0_Y : VitalDelayType01 := (0.23148 ns, 0.251597 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2X6 : entity is TRUE;
end MX2X6;

architecture behavioral of MX2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.28996 ns, 0.320973 ns);
             tpd_B_Y : VitalDelayType01 := (0.285349 ns, 0.324321 ns);
             tpd_S0_Y : VitalDelayType01 := (0.284701 ns, 0.314166 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2X8 : entity is TRUE;
end MX2X8;

architecture behavioral of MX2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0900089 ns, 0.0928612 ns);
             tpd_B_Y : VitalDelayType01 := (0.0873402 ns, 0.0961174 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0856598 ns, 0.0859034 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX2XL : entity is TRUE;
end MX2XL;

architecture behavioral of MX2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalMUX2(B_ipd, A_ipd, S0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.167055 ns, 0.175156 ns);
             tpd_B_Y : VitalDelayType01 := (0.164465 ns, 0.178232 ns);
             tpd_C_Y : VitalDelayType01 := (0.107992 ns, 0.120974 ns);
             tpd_S0_Y : VitalDelayType01 := (0.161677 ns, 0.166865 ns);
             tpd_S1_Y : VitalDelayType01 := (0.102598 ns, 0.111905 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX3X1 : entity is TRUE;
end MX3X1;

architecture behavioral of MX3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(C_ipd, n0_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.212482 ns, 0.225646 ns);
             tpd_B_Y : VitalDelayType01 := (0.209517 ns, 0.228811 ns);
             tpd_C_Y : VitalDelayType01 := (0.144223 ns, 0.1642 ns);
             tpd_S0_Y : VitalDelayType01 := (0.206756 ns, 0.217107 ns);
             tpd_S1_Y : VitalDelayType01 := (0.141089 ns, 0.157505 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX3X2 : entity is TRUE;
end MX3X2;

architecture behavioral of MX3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(C_ipd, n0_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.312746 ns, 0.340222 ns);
             tpd_B_Y : VitalDelayType01 := (0.308894 ns, 0.342822 ns);
             tpd_C_Y : VitalDelayType01 := (0.154234 ns, 0.17562 ns);
             tpd_S0_Y : VitalDelayType01 := (0.30591 ns, 0.330719 ns);
             tpd_S1_Y : VitalDelayType01 := (0.189449 ns, 0.213843 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX3X4 : entity is TRUE;
end MX3X4;

architecture behavioral of MX3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(C_ipd, n0_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.143436 ns, 0.146428 ns);
             tpd_B_Y : VitalDelayType01 := (0.140739 ns, 0.149572 ns);
             tpd_C_Y : VitalDelayType01 := (0.0893197 ns, 0.0982302 ns);
             tpd_S0_Y : VitalDelayType01 := (0.138174 ns, 0.138346 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0834845 ns, 0.0883116 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX3XL : entity is TRUE;
end MX3XL;

architecture behavioral of MX3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(C_ipd, n0_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.166006 ns, 0.173781 ns);
             tpd_B_Y : VitalDelayType01 := (0.163153 ns, 0.176642 ns);
             tpd_C_Y : VitalDelayType01 := (0.163193 ns, 0.173458 ns);
             tpd_D_Y : VitalDelayType01 := (0.16006 ns, 0.176382 ns);
             tpd_S0_Y : VitalDelayType01 := (0.165677 ns, 0.170391 ns);
             tpd_S1_Y : VitalDelayType01 := (0.104227 ns, 0.10298 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX4X1 : entity is TRUE;
end MX4X1;

architecture behavioral of MX4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(n0_var, n1_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.211171 ns, 0.224981 ns);
             tpd_B_Y : VitalDelayType01 := (0.208843 ns, 0.227511 ns);
             tpd_C_Y : VitalDelayType01 := (0.213755 ns, 0.229663 ns);
             tpd_D_Y : VitalDelayType01 := (0.20815 ns, 0.230381 ns);
             tpd_S0_Y : VitalDelayType01 := (0.211855 ns, 0.223061 ns);
             tpd_S1_Y : VitalDelayType01 := (0.14832 ns, 0.150766 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX4X2 : entity is TRUE;
end MX4X2;

architecture behavioral of MX4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(n0_var, n1_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.311244 ns, 0.339441 ns);
             tpd_B_Y : VitalDelayType01 := (0.308454 ns, 0.341396 ns);
             tpd_C_Y : VitalDelayType01 := (0.313215 ns, 0.343676 ns);
             tpd_D_Y : VitalDelayType01 := (0.307087 ns, 0.344006 ns);
             tpd_S0_Y : VitalDelayType01 := (0.310138 ns, 0.336324 ns);
             tpd_S1_Y : VitalDelayType01 := (0.230392 ns, 0.247271 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX4X4 : entity is TRUE;
end MX4X4;

architecture behavioral of MX4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(n0_var, n1_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MX4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.144367 ns, 0.14728 ns);
             tpd_B_Y : VitalDelayType01 := (0.140057 ns, 0.148954 ns);
             tpd_C_Y : VitalDelayType01 := (0.141333 ns, 0.146778 ns);
             tpd_D_Y : VitalDelayType01 := (0.138039 ns, 0.149577 ns);
             tpd_S0_Y : VitalDelayType01 := (0.144101 ns, 0.143404 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0839211 ns, 0.0796597 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MX4XL : entity is TRUE;
end MX4XL;

architecture behavioral of MX4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalMUX2(n0_var, n1_var, S1_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0549925 ns, 0.0520778 ns);
             tpd_B_Y : VitalDelayType01 := (0.0604584 ns, 0.0461007 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0550593 ns, 0.0538548 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2X1 : entity is TRUE;
end MXI2X1;

architecture behavioral of MXI2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.167669 ns, 0.165552 ns);
             tpd_B_Y : VitalDelayType01 := (0.171485 ns, 0.164147 ns);
             tpd_S0_Y : VitalDelayType01 := (0.159949 ns, 0.161133 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2X2 : entity is TRUE;
end MXI2X2;

architecture behavioral of MXI2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.201477 ns, 0.194349 ns);
             tpd_B_Y : VitalDelayType01 := (0.20527 ns, 0.193065 ns);
             tpd_S0_Y : VitalDelayType01 := (0.193112 ns, 0.189549 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2X4 : entity is TRUE;
end MXI2X4;

architecture behavioral of MXI2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.240182 ns, 0.225227 ns);
             tpd_B_Y : VitalDelayType01 := (0.243336 ns, 0.222461 ns);
             tpd_S0_Y : VitalDelayType01 := (0.232161 ns, 0.219869 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2X6 : entity is TRUE;
end MXI2X6;

architecture behavioral of MXI2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.256205 ns, 0.24259 ns);
             tpd_B_Y : VitalDelayType01 := (0.259506 ns, 0.23979 ns);
             tpd_S0_Y : VitalDelayType01 := (0.248213 ns, 0.237193 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2X8 : entity is TRUE;
end MXI2X8;

architecture behavioral of MXI2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0536303 ns, 0.0475094 ns);
             tpd_B_Y : VitalDelayType01 := (0.0571443 ns, 0.0446754 ns);
             tpd_S0_Y : VitalDelayType01 := (0.0482766 ns, 0.0449287 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI2XL : entity is TRUE;
end MXI2XL;

architecture behavioral of MXI2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, S0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.19374 ns, 0.194495 ns);
             tpd_B_Y : VitalDelayType01 := (0.197694 ns, 0.191928 ns);
             tpd_C_Y : VitalDelayType01 := (0.13959 ns, 0.1481 ns);
             tpd_S0_Y : VitalDelayType01 := (0.186395 ns, 0.189409 ns);
             tpd_S1_Y : VitalDelayType01 := (0.10579 ns, 0.110351 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI3X1 : entity is TRUE;
end MXI3X1;

architecture behavioral of MXI3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n1_var := VitalMUX2(C_ipd, n0_var, S1_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.232216 ns, 0.238502 ns);
             tpd_B_Y : VitalDelayType01 := (0.235111 ns, 0.236422 ns);
             tpd_C_Y : VitalDelayType01 := (0.178305 ns, 0.193861 ns);
             tpd_S0_Y : VitalDelayType01 := (0.223984 ns, 0.2336 ns);
             tpd_S1_Y : VitalDelayType01 := (0.1416 ns, 0.152268 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI3X2 : entity is TRUE;
end MXI3X2;

architecture behavioral of MXI3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n1_var := VitalMUX2(C_ipd, n0_var, S1_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.277881 ns, 0.282014 ns);
             tpd_B_Y : VitalDelayType01 := (0.281946 ns, 0.279978 ns);
             tpd_C_Y : VitalDelayType01 := (0.214332 ns, 0.230016 ns);
             tpd_S0_Y : VitalDelayType01 := (0.270594 ns, 0.277545 ns);
             tpd_S1_Y : VitalDelayType01 := (0.176712 ns, 0.18795 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI3X4 : entity is TRUE;
end MXI3X4;

architecture behavioral of MXI3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n1_var := VitalMUX2(C_ipd, n0_var, S1_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.173428 ns, 0.1703 ns);
             tpd_B_Y : VitalDelayType01 := (0.177025 ns, 0.16753 ns);
             tpd_C_Y : VitalDelayType01 := (0.120279 ns, 0.124777 ns);
             tpd_S0_Y : VitalDelayType01 := (0.166089 ns, 0.165366 ns);
             tpd_S1_Y : VitalDelayType01 := (0.087307 ns, 0.0878979 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI3XL : entity is TRUE;
end MXI3XL;

architecture behavioral of MXI3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n1_var := VitalMUX2(C_ipd, n0_var, S1_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      4 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.192105 ns, 0.192131 ns);
             tpd_B_Y : VitalDelayType01 := (0.195798 ns, 0.190333 ns);
             tpd_C_Y : VitalDelayType01 := (0.189652 ns, 0.193674 ns);
             tpd_D_Y : VitalDelayType01 := (0.193725 ns, 0.191821 ns);
             tpd_S0_Y : VitalDelayType01 := (0.189973 ns, 0.195377 ns);
             tpd_S1_Y : VitalDelayType01 := (0.104283 ns, 0.108038 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI4X1 : entity is TRUE;
end MXI4X1;

architecture behavioral of MXI4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n2_var := VitalMUX2(n0_var, n1_var, S1_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.233762 ns, 0.239751 ns);
             tpd_B_Y : VitalDelayType01 := (0.237715 ns, 0.238269 ns);
             tpd_C_Y : VitalDelayType01 := (0.234407 ns, 0.24399 ns);
             tpd_D_Y : VitalDelayType01 := (0.236023 ns, 0.24002 ns);
             tpd_S0_Y : VitalDelayType01 := (0.232327 ns, 0.24344 ns);
             tpd_S1_Y : VitalDelayType01 := (0.140789 ns, 0.151178 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI4X2 : entity is TRUE;
end MXI4X2;

architecture behavioral of MXI4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n2_var := VitalMUX2(n0_var, n1_var, S1_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.284693 ns, 0.288397 ns);
             tpd_B_Y : VitalDelayType01 := (0.288638 ns, 0.28616 ns);
             tpd_C_Y : VitalDelayType01 := (0.277377 ns, 0.286125 ns);
             tpd_D_Y : VitalDelayType01 := (0.279373 ns, 0.282764 ns);
             tpd_S0_Y : VitalDelayType01 := (0.28004 ns, 0.289634 ns);
             tpd_S1_Y : VitalDelayType01 := (0.178765 ns, 0.189047 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI4X4 : entity is TRUE;
end MXI4X4;

architecture behavioral of MXI4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n2_var := VitalMUX2(n0_var, n1_var, S1_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity MXI4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_S1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.174381 ns, 0.170572 ns);
             tpd_B_Y : VitalDelayType01 := (0.178382 ns, 0.168551 ns);
             tpd_C_Y : VitalDelayType01 := (0.170155 ns, 0.170225 ns);
             tpd_D_Y : VitalDelayType01 := (0.17458 ns, 0.168768 ns);
             tpd_S0_Y : VitalDelayType01 := (0.171706 ns, 0.173533 ns);
             tpd_S1_Y : VitalDelayType01 := (0.0861879 ns, 0.0860457 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         S1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of MXI4XL : entity is TRUE;
end MXI4XL;

architecture behavioral of MXI4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL S1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( S1_ipd, S1, tipd_S1 );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd, S0_ipd, S1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalMUX2(D_ipd, C_ipd, S0_ipd);
          n1_var := VitalMUX2(B_ipd, A_ipd, S0_ipd);
          n2_var := VitalMUX2(n0_var, n1_var, S1_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE),
                      4 => ( S0_ipd'LAST_EVENT,
                             tpd_S0_Y,
                             TRUE),
                      5 => ( S1_ipd'LAST_EVENT,
                             tpd_S1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0642165 ns, 0.0772493 ns);
             tpd_B_Y : VitalDelayType01 := (0.0225135 ns, 0.031612 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2BX1 : entity is TRUE;
end NAND2BX1;

architecture behavioral of NAND2BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0866086 ns, 0.101902 ns);
             tpd_B_Y : VitalDelayType01 := (0.0220337 ns, 0.0307805 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2BX2 : entity is TRUE;
end NAND2BX2;

architecture behavioral of NAND2BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.092196 ns, 0.106829 ns);
             tpd_B_Y : VitalDelayType01 := (0.0220375 ns, 0.0307802 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2BX4 : entity is TRUE;
end NAND2BX4;

architecture behavioral of NAND2BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0528669 ns, 0.0641046 ns);
             tpd_B_Y : VitalDelayType01 := (0.0221949 ns, 0.0304872 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2BXL : entity is TRUE;
end NAND2BXL;

architecture behavioral of NAND2BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0264856 ns, 0.0358609 ns);
             tpd_B_Y : VitalDelayType01 := (0.0226943 ns, 0.0317841 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2X1 : entity is TRUE;
end NAND2X1;

architecture behavioral of NAND2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0259085 ns, 0.0348748 ns);
             tpd_B_Y : VitalDelayType01 := (0.0223281 ns, 0.031217 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2X2 : entity is TRUE;
end NAND2X2;

architecture behavioral of NAND2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0260068 ns, 0.0350707 ns);
             tpd_B_Y : VitalDelayType01 := (0.0223443 ns, 0.0312499 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2X4 : entity is TRUE;
end NAND2X4;

architecture behavioral of NAND2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0263203 ns, 0.0356553 ns);
             tpd_B_Y : VitalDelayType01 := (0.0224881 ns, 0.0314347 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2X6 : entity is TRUE;
end NAND2X6;

architecture behavioral of NAND2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0263811 ns, 0.0356712 ns);
             tpd_B_Y : VitalDelayType01 := (0.0224534 ns, 0.0313331 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2X8 : entity is TRUE;
end NAND2X8;

architecture behavioral of NAND2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.026042 ns, 0.0342813 ns);
             tpd_B_Y : VitalDelayType01 := (0.0223232 ns, 0.0306253 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND2XL : entity is TRUE;
end NAND2XL;

architecture behavioral of NAND2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0711338 ns, 0.104967 ns);
             tpd_B_Y : VitalDelayType01 := (0.0299593 ns, 0.0606577 ns);
             tpd_C_Y : VitalDelayType01 := (0.0258958 ns, 0.0511323 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3BX1 : entity is TRUE;
end NAND3BX1;

architecture behavioral of NAND3BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.094343 ns, 0.126735 ns);
             tpd_B_Y : VitalDelayType01 := (0.0292297 ns, 0.0587131 ns);
             tpd_C_Y : VitalDelayType01 := (0.0248455 ns, 0.0481649 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3BX2 : entity is TRUE;
end NAND3BX2;

architecture behavioral of NAND3BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.10028 ns, 0.131766 ns);
             tpd_B_Y : VitalDelayType01 := (0.0292099 ns, 0.0586433 ns);
             tpd_C_Y : VitalDelayType01 := (0.0249148 ns, 0.0480556 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3BX4 : entity is TRUE;
end NAND3BX4;

architecture behavioral of NAND3BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0592443 ns, 0.0913186 ns);
             tpd_B_Y : VitalDelayType01 := (0.0298541 ns, 0.0585489 ns);
             tpd_C_Y : VitalDelayType01 := (0.0257484 ns, 0.0498825 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3BXL : entity is TRUE;
end NAND3BXL;

architecture behavioral of NAND3BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0321 ns, 0.0643855 ns);
             tpd_B_Y : VitalDelayType01 := (0.0300948 ns, 0.0609144 ns);
             tpd_C_Y : VitalDelayType01 := (0.0260521 ns, 0.051335 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3X1 : entity is TRUE;
end NAND3X1;

architecture behavioral of NAND3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0312009 ns, 0.0623566 ns);
             tpd_B_Y : VitalDelayType01 := (0.0294471 ns, 0.0592857 ns);
             tpd_C_Y : VitalDelayType01 := (0.0250578 ns, 0.0485924 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3X2 : entity is TRUE;
end NAND3X2;

architecture behavioral of NAND3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0313239 ns, 0.0625713 ns);
             tpd_B_Y : VitalDelayType01 := (0.0294403 ns, 0.0592351 ns);
             tpd_C_Y : VitalDelayType01 := (0.0251495 ns, 0.048719 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3X4 : entity is TRUE;
end NAND3X4;

architecture behavioral of NAND3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0314873 ns, 0.0628973 ns);
             tpd_B_Y : VitalDelayType01 := (0.0295068 ns, 0.0594605 ns);
             tpd_C_Y : VitalDelayType01 := (0.0252311 ns, 0.049313 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3X6 : entity is TRUE;
end NAND3X6;

architecture behavioral of NAND3X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0316276 ns, 0.0631256 ns);
             tpd_B_Y : VitalDelayType01 := (0.0295901 ns, 0.0595645 ns);
             tpd_C_Y : VitalDelayType01 := (0.0252797 ns, 0.0493887 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3X8 : entity is TRUE;
end NAND3X8;

architecture behavioral of NAND3X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0322096 ns, 0.0628173 ns);
             tpd_B_Y : VitalDelayType01 := (0.0300449 ns, 0.0591778 ns);
             tpd_C_Y : VitalDelayType01 := (0.0258007 ns, 0.0496732 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND3XL : entity is TRUE;
end NAND3XL;

architecture behavioral of NAND3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BBX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0744599 ns, 0.140358 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0740086 ns, 0.134944 ns);
             tpd_C_Y : VitalDelayType01 := (0.0320491 ns, 0.0855479 ns);
             tpd_D_Y : VitalDelayType01 := (0.0277061 ns, 0.0704992 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BBX1 : entity is TRUE;
end NAND4BBX1;

architecture behavioral of NAND4BBX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C_ipd);
          n4_var := VitalAND2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BBX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0995383 ns, 0.167464 ns);
             tpd_BN_Y : VitalDelayType01 := (0.0987581 ns, 0.159046 ns);
             tpd_C_Y : VitalDelayType01 := (0.032102 ns, 0.085922 ns);
             tpd_D_Y : VitalDelayType01 := (0.027167 ns, 0.0676539 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BBX2 : entity is TRUE;
end NAND4BBX2;

architecture behavioral of NAND4BBX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C_ipd);
          n4_var := VitalAND2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BBX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.105684 ns, 0.172054 ns);
             tpd_BN_Y : VitalDelayType01 := (0.104663 ns, 0.16333 ns);
             tpd_C_Y : VitalDelayType01 := (0.0322235 ns, 0.0859715 ns);
             tpd_D_Y : VitalDelayType01 := (0.0274272 ns, 0.068275 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BBX4 : entity is TRUE;
end NAND4BBX4;

architecture behavioral of NAND4BBX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C_ipd);
          n4_var := VitalAND2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BBXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0625398 ns, 0.125493 ns);
             tpd_BN_Y : VitalDelayType01 := (0.061933 ns, 0.12054 ns);
             tpd_C_Y : VitalDelayType01 := (0.0318817 ns, 0.0829073 ns);
             tpd_D_Y : VitalDelayType01 := (0.0276273 ns, 0.0681238 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BBXL : entity is TRUE;
end NAND4BBXL;

architecture behavioral of NAND4BBXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C_ipd);
          n4_var := VitalAND2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0750574 ns, 0.138237 ns);
             tpd_B_Y : VitalDelayType01 := (0.0347679 ns, 0.0953323 ns);
             tpd_C_Y : VitalDelayType01 := (0.0321078 ns, 0.0860653 ns);
             tpd_D_Y : VitalDelayType01 := (0.0279253 ns, 0.0708697 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BX1 : entity is TRUE;
end NAND4BX1;

architecture behavioral of NAND4BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          n3_var := VitalAND2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.100399 ns, 0.164671 ns);
             tpd_B_Y : VitalDelayType01 := (0.0347261 ns, 0.0963102 ns);
             tpd_C_Y : VitalDelayType01 := (0.032272 ns, 0.0866958 ns);
             tpd_D_Y : VitalDelayType01 := (0.0274187 ns, 0.0682948 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BX2 : entity is TRUE;
end NAND4BX2;

architecture behavioral of NAND4BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          n3_var := VitalAND2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.106457 ns, 0.168642 ns);
             tpd_B_Y : VitalDelayType01 := (0.0346994 ns, 0.0960599 ns);
             tpd_C_Y : VitalDelayType01 := (0.0322319 ns, 0.08709 ns);
             tpd_D_Y : VitalDelayType01 := (0.0274715 ns, 0.0687094 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BX4 : entity is TRUE;
end NAND4BX4;

architecture behavioral of NAND4BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          n3_var := VitalAND2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0628148 ns, 0.124398 ns);
             tpd_B_Y : VitalDelayType01 := (0.0346951 ns, 0.0921887 ns);
             tpd_C_Y : VitalDelayType01 := (0.0319246 ns, 0.0829452 ns);
             tpd_D_Y : VitalDelayType01 := (0.0276791 ns, 0.0680522 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4BXL : entity is TRUE;
end NAND4BXL;

architecture behavioral of NAND4BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalAND2(n0_var, B_ipd);
          n2_var := VitalAND2(n1_var, C_ipd);
          n3_var := VitalAND2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0355046 ns, 0.0989279 ns);
             tpd_B_Y : VitalDelayType01 := (0.0349757 ns, 0.0962091 ns);
             tpd_C_Y : VitalDelayType01 := (0.0324349 ns, 0.086594 ns);
             tpd_D_Y : VitalDelayType01 := (0.028096 ns, 0.0705845 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4X1 : entity is TRUE;
end NAND4X1;

architecture behavioral of NAND4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0351798 ns, 0.0989906 ns);
             tpd_B_Y : VitalDelayType01 := (0.0347841 ns, 0.096075 ns);
             tpd_C_Y : VitalDelayType01 := (0.0321542 ns, 0.0861677 ns);
             tpd_D_Y : VitalDelayType01 := (0.027654 ns, 0.068329 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4X2 : entity is TRUE;
end NAND4X2;

architecture behavioral of NAND4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0354411 ns, 0.100542 ns);
             tpd_B_Y : VitalDelayType01 := (0.0349045 ns, 0.0966602 ns);
             tpd_C_Y : VitalDelayType01 := (0.0324389 ns, 0.0874693 ns);
             tpd_D_Y : VitalDelayType01 := (0.0277108 ns, 0.0690836 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4X4 : entity is TRUE;
end NAND4X4;

architecture behavioral of NAND4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.035539 ns, 0.100682 ns);
             tpd_B_Y : VitalDelayType01 := (0.0350209 ns, 0.0969272 ns);
             tpd_C_Y : VitalDelayType01 := (0.032526 ns, 0.0877295 ns);
             tpd_D_Y : VitalDelayType01 := (0.0279712 ns, 0.0700224 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4X6 : entity is TRUE;
end NAND4X6;

architecture behavioral of NAND4X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0355309 ns, 0.100628 ns);
             tpd_B_Y : VitalDelayType01 := (0.0350108 ns, 0.096807 ns);
             tpd_C_Y : VitalDelayType01 := (0.0325089 ns, 0.0876214 ns);
             tpd_D_Y : VitalDelayType01 := (0.0279469 ns, 0.0701334 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4X8 : entity is TRUE;
end NAND4X8;

architecture behavioral of NAND4X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NAND4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0353381 ns, 0.0954818 ns);
             tpd_B_Y : VitalDelayType01 := (0.0347502 ns, 0.0923196 ns);
             tpd_C_Y : VitalDelayType01 := (0.0320513 ns, 0.0830758 ns);
             tpd_D_Y : VitalDelayType01 := (0.0278052 ns, 0.0683579 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NAND4XL : entity is TRUE;
end NAND4XL;

architecture behavioral of NAND4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A_ipd, B_ipd);
          n1_var := VitalAND2(n0_var, C_ipd);
          n2_var := VitalAND2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0792143 ns, 0.0670198 ns);
             tpd_B_Y : VitalDelayType01 := (0.0353466 ns, 0.0189384 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2BX1 : entity is TRUE;
end NOR2BX1;

architecture behavioral of NOR2BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.100374 ns, 0.0926051 ns);
             tpd_B_Y : VitalDelayType01 := (0.0339326 ns, 0.0185182 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2BX2 : entity is TRUE;
end NOR2BX2;

architecture behavioral of NOR2BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.143052 ns, 0.141918 ns);
             tpd_B_Y : VitalDelayType01 := (0.0336986 ns, 0.0185119 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2BX4 : entity is TRUE;
end NOR2BX4;

architecture behavioral of NOR2BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.0680895 ns, 0.0533643 ns);
             tpd_B_Y : VitalDelayType01 := (0.0348259 ns, 0.0182925 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2BXL : entity is TRUE;
end NOR2BXL;

architecture behavioral of NOR2BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0432683 ns, 0.0228449 ns);
             tpd_B_Y : VitalDelayType01 := (0.0358352 ns, 0.0190242 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2X1 : entity is TRUE;
end NOR2X1;

architecture behavioral of NOR2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0420457 ns, 0.0222831 ns);
             tpd_B_Y : VitalDelayType01 := (0.0344482 ns, 0.0185785 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2X2 : entity is TRUE;
end NOR2X2;

architecture behavioral of NOR2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0422613 ns, 0.0223881 ns);
             tpd_B_Y : VitalDelayType01 := (0.0345116 ns, 0.0185999 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2X4 : entity is TRUE;
end NOR2X4;

architecture behavioral of NOR2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0421731 ns, 0.02248 ns);
             tpd_B_Y : VitalDelayType01 := (0.0345843 ns, 0.0186532 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2X6 : entity is TRUE;
end NOR2X6;

architecture behavioral of NOR2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0427867 ns, 0.0226698 ns);
             tpd_B_Y : VitalDelayType01 := (0.0345903 ns, 0.0187304 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2X8 : entity is TRUE;
end NOR2X8;

architecture behavioral of NOR2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0422776 ns, 0.0219666 ns);
             tpd_B_Y : VitalDelayType01 := (0.0350269 ns, 0.0182886 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR2XL : entity is TRUE;
end NOR2XL;

architecture behavioral of NOR2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.113408 ns, 0.0715499 ns);
             tpd_B_Y : VitalDelayType01 := (0.0709764 ns, 0.0251075 ns);
             tpd_C_Y : VitalDelayType01 := (0.0539024 ns, 0.0208392 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3BX1 : entity is TRUE;
end NOR3BX1;

architecture behavioral of NOR3BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.134329 ns, 0.0981239 ns);
             tpd_B_Y : VitalDelayType01 := (0.0699496 ns, 0.0245154 ns);
             tpd_C_Y : VitalDelayType01 := (0.0502818 ns, 0.0199433 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3BX2 : entity is TRUE;
end NOR3BX2;

architecture behavioral of NOR3BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.140514 ns, 0.103257 ns);
             tpd_B_Y : VitalDelayType01 := (0.0701053 ns, 0.0244859 ns);
             tpd_C_Y : VitalDelayType01 := (0.0500108 ns, 0.0198768 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3BX4 : entity is TRUE;
end NOR3BX4;

architecture behavioral of NOR3BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.102429 ns, 0.0572516 ns);
             tpd_B_Y : VitalDelayType01 := (0.070648 ns, 0.0243622 ns);
             tpd_C_Y : VitalDelayType01 := (0.0531938 ns, 0.0201953 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3BXL : entity is TRUE;
end NOR3BXL;

architecture behavioral of NOR3BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0778771 ns, 0.0259682 ns);
             tpd_B_Y : VitalDelayType01 := (0.0720521 ns, 0.0252951 ns);
             tpd_C_Y : VitalDelayType01 := (0.0541837 ns, 0.0208635 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3X1 : entity is TRUE;
end NOR3X1;

architecture behavioral of NOR3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0753465 ns, 0.0249179 ns);
             tpd_B_Y : VitalDelayType01 := (0.0698649 ns, 0.0244437 ns);
             tpd_C_Y : VitalDelayType01 := (0.0507437 ns, 0.0199944 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3X2 : entity is TRUE;
end NOR3X2;

architecture behavioral of NOR3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0758736 ns, 0.0250313 ns);
             tpd_B_Y : VitalDelayType01 := (0.0701278 ns, 0.0244433 ns);
             tpd_C_Y : VitalDelayType01 := (0.0504734 ns, 0.0199653 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3X4 : entity is TRUE;
end NOR3X4;

architecture behavioral of NOR3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0766575 ns, 0.0251785 ns);
             tpd_B_Y : VitalDelayType01 := (0.0704089 ns, 0.024592 ns);
             tpd_C_Y : VitalDelayType01 := (0.0507781 ns, 0.0200804 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3X6 : entity is TRUE;
end NOR3X6;

architecture behavioral of NOR3X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0773866 ns, 0.0253156 ns);
             tpd_B_Y : VitalDelayType01 := (0.070933 ns, 0.0247138 ns);
             tpd_C_Y : VitalDelayType01 := (0.0506648 ns, 0.0201749 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3X8 : entity is TRUE;
end NOR3X8;

architecture behavioral of NOR3X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0768851 ns, 0.0250355 ns);
             tpd_B_Y : VitalDelayType01 := (0.0708071 ns, 0.0244014 ns);
             tpd_C_Y : VitalDelayType01 := (0.0533932 ns, 0.020239 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR3XL : entity is TRUE;
end NOR3XL;

architecture behavioral of NOR3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BBX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.15789 ns, 0.0728332 ns);
             tpd_BN_Y : VitalDelayType01 := (0.147243 ns, 0.0733113 ns);
             tpd_C_Y : VitalDelayType01 := (0.0981275 ns, 0.0263609 ns);
             tpd_D_Y : VitalDelayType01 := (0.0690766 ns, 0.0217001 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BBX1 : entity is TRUE;
end NOR4BBX1;

architecture behavioral of NOR4BBX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C_ipd);
          n4_var := VitalOR2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BBX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.186263 ns, 0.100378 ns);
             tpd_BN_Y : VitalDelayType01 := (0.169313 ns, 0.100806 ns);
             tpd_C_Y : VitalDelayType01 := (0.0976686 ns, 0.0261714 ns);
             tpd_D_Y : VitalDelayType01 := (0.0645082 ns, 0.0212127 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BBX2 : entity is TRUE;
end NOR4BBX2;

architecture behavioral of NOR4BBX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C_ipd);
          n4_var := VitalOR2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BBX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.191904 ns, 0.10603 ns);
             tpd_BN_Y : VitalDelayType01 := (0.174273 ns, 0.105924 ns);
             tpd_C_Y : VitalDelayType01 := (0.0973608 ns, 0.026362 ns);
             tpd_D_Y : VitalDelayType01 := (0.0657729 ns, 0.0215371 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BBX4 : entity is TRUE;
end NOR4BBX4;

architecture behavioral of NOR4BBX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C_ipd);
          n4_var := VitalOR2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BBXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_BN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.14541 ns, 0.0581673 ns);
             tpd_BN_Y : VitalDelayType01 := (0.137627 ns, 0.0588496 ns);
             tpd_C_Y : VitalDelayType01 := (0.0970445 ns, 0.0254999 ns);
             tpd_D_Y : VitalDelayType01 := (0.0683718 ns, 0.0211071 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         BN : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BBXL : entity is TRUE;
end NOR4BBXL;

architecture behavioral of NOR4BBXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL BN_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( BN_ipd, BN, tipd_BN );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, BN_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(BN_ipd);
          n1_var := VitalINV(AN_ipd);
          n2_var := VitalOR2(n0_var, n1_var);
          n3_var := VitalOR2(n2_var, C_ipd);
          n4_var := VitalOR2(n3_var, D_ipd);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( BN_ipd'LAST_EVENT,
                             tpd_BN_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BX1 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.155937 ns, 0.073187 ns);
             tpd_B_Y : VitalDelayType01 := (0.114276 ns, 0.0276035 ns);
             tpd_C_Y : VitalDelayType01 := (0.0976088 ns, 0.0262532 ns);
             tpd_D_Y : VitalDelayType01 := (0.0691468 ns, 0.0217845 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BX1 : entity is TRUE;
end NOR4BX1;

architecture behavioral of NOR4BX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          n3_var := VitalOR2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BX2 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.180929 ns, 0.101013 ns);
             tpd_B_Y : VitalDelayType01 := (0.115701 ns, 0.0273138 ns);
             tpd_C_Y : VitalDelayType01 := (0.0994701 ns, 0.0262165 ns);
             tpd_D_Y : VitalDelayType01 := (0.0652461 ns, 0.0212585 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BX2 : entity is TRUE;
end NOR4BX2;

architecture behavioral of NOR4BX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          n3_var := VitalOR2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BX4 is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.185543 ns, 0.106009 ns);
             tpd_B_Y : VitalDelayType01 := (0.115057 ns, 0.0273164 ns);
             tpd_C_Y : VitalDelayType01 := (0.0989272 ns, 0.0261465 ns);
             tpd_D_Y : VitalDelayType01 := (0.0659494 ns, 0.0213137 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BX4 : entity is TRUE;
end NOR4BX4;

architecture behavioral of NOR4BX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          n3_var := VitalOR2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4BXL is
   generic (
             tipd_AN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_AN_Y : VitalDelayType01 := (0.144523 ns, 0.0583836 ns);
             tpd_B_Y : VitalDelayType01 := (0.112892 ns, 0.0267059 ns);
             tpd_C_Y : VitalDelayType01 := (0.0973514 ns, 0.0254535 ns);
             tpd_D_Y : VitalDelayType01 := (0.0690195 ns, 0.0211227 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         AN : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4BXL : entity is TRUE;
end NOR4BXL;

architecture behavioral of NOR4BXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL AN_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( AN_ipd, AN, tipd_AN );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (AN_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalINV(AN_ipd);
          n1_var := VitalOR2(n0_var, B_ipd);
          n2_var := VitalOR2(n1_var, C_ipd);
          n3_var := VitalOR2(n2_var, D_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( AN_ipd'LAST_EVENT,
                             tpd_AN_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.119918 ns, 0.0268575 ns);
             tpd_B_Y : VitalDelayType01 := (0.115399 ns, 0.0276994 ns);
             tpd_C_Y : VitalDelayType01 := (0.0986005 ns, 0.0264218 ns);
             tpd_D_Y : VitalDelayType01 := (0.0689451 ns, 0.0218426 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4X1 : entity is TRUE;
end NOR4X1;

architecture behavioral of NOR4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.118303 ns, 0.0263578 ns);
             tpd_B_Y : VitalDelayType01 := (0.11352 ns, 0.0272026 ns);
             tpd_C_Y : VitalDelayType01 := (0.0978906 ns, 0.0260622 ns);
             tpd_D_Y : VitalDelayType01 := (0.0665012 ns, 0.0213845 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4X2 : entity is TRUE;
end NOR4X2;

architecture behavioral of NOR4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.122049 ns, 0.0263858 ns);
             tpd_B_Y : VitalDelayType01 := (0.115699 ns, 0.0273626 ns);
             tpd_C_Y : VitalDelayType01 := (0.0993106 ns, 0.0262648 ns);
             tpd_D_Y : VitalDelayType01 := (0.066255 ns, 0.0214072 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4X4 : entity is TRUE;
end NOR4X4;

architecture behavioral of NOR4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.121748 ns, 0.0267752 ns);
             tpd_B_Y : VitalDelayType01 := (0.115568 ns, 0.0277675 ns);
             tpd_C_Y : VitalDelayType01 := (0.0994282 ns, 0.0264739 ns);
             tpd_D_Y : VitalDelayType01 := (0.0675458 ns, 0.0217294 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4X6 : entity is TRUE;
end NOR4X6;

architecture behavioral of NOR4X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.121397 ns, 0.0266823 ns);
             tpd_B_Y : VitalDelayType01 := (0.115252 ns, 0.027667 ns);
             tpd_C_Y : VitalDelayType01 := (0.0990176 ns, 0.0264008 ns);
             tpd_D_Y : VitalDelayType01 := (0.0672118 ns, 0.0216415 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4X8 : entity is TRUE;
end NOR4X8;

architecture behavioral of NOR4X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity NOR4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.119174 ns, 0.0258741 ns);
             tpd_B_Y : VitalDelayType01 := (0.114159 ns, 0.0267875 ns);
             tpd_C_Y : VitalDelayType01 := (0.0974422 ns, 0.0255178 ns);
             tpd_D_Y : VitalDelayType01 := (0.0685435 ns, 0.0211643 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of NOR4XL : entity is TRUE;
end NOR4XL;

architecture behavioral of NOR4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          n2_var := VitalOR2(n1_var, D_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA21X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.10783 ns, 0.119453 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0972263 ns, 0.113223 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0871066 ns, 0.0644888 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA21X1 : entity is TRUE;
end OA21X1;

architecture behavioral of OA21X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          Y_zd := VitalAND2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA21X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.144159 ns, 0.163014 ns);
             tpd_A1_Y : VitalDelayType01 := (0.133752 ns, 0.156893 ns);
             tpd_B0_Y : VitalDelayType01 := (0.119377 ns, 0.0877623 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA21X2 : entity is TRUE;
end OA21X2;

architecture behavioral of OA21X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          Y_zd := VitalAND2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA21X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.154325 ns, 0.170512 ns);
             tpd_A1_Y : VitalDelayType01 := (0.143414 ns, 0.16453 ns);
             tpd_B0_Y : VitalDelayType01 := (0.128112 ns, 0.0921877 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA21X4 : entity is TRUE;
end OA21X4;

architecture behavioral of OA21X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          Y_zd := VitalAND2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA21XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0893657 ns, 0.0966106 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0783623 ns, 0.089917 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0706606 ns, 0.0518522 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA21XL : entity is TRUE;
end OA21XL;

architecture behavioral of OA21XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          Y_zd := VitalAND2(n0_var, B0_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA22X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.110896 ns, 0.129389 ns);
             tpd_A1_Y : VitalDelayType01 := (0.100691 ns, 0.122044 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0995543 ns, 0.111675 ns);
             tpd_B1_Y : VitalDelayType01 := (0.089875 ns, 0.104561 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA22X1 : entity is TRUE;
end OA22X1;

architecture behavioral of OA22X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          Y_zd := VitalAND2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA22X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.143167 ns, 0.17311 ns);
             tpd_A1_Y : VitalDelayType01 := (0.133397 ns, 0.166364 ns);
             tpd_B0_Y : VitalDelayType01 := (0.13171 ns, 0.15606 ns);
             tpd_B1_Y : VitalDelayType01 := (0.121975 ns, 0.149072 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA22X2 : entity is TRUE;
end OA22X2;

architecture behavioral of OA22X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          Y_zd := VitalAND2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA22X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.15238 ns, 0.180982 ns);
             tpd_A1_Y : VitalDelayType01 := (0.142408 ns, 0.174447 ns);
             tpd_B0_Y : VitalDelayType01 := (0.140789 ns, 0.16448 ns);
             tpd_B1_Y : VitalDelayType01 := (0.13122 ns, 0.158092 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA22X4 : entity is TRUE;
end OA22X4;

architecture behavioral of OA22X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          Y_zd := VitalAND2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OA22XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0931784 ns, 0.105165 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0839081 ns, 0.0988977 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0820948 ns, 0.0881827 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0728893 ns, 0.0814088 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OA22XL : entity is TRUE;
end OA22XL;

architecture behavioral of OA22XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          Y_zd := VitalAND2(n0_var, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI211X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0677914 ns, 0.082237 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0617263 ns, 0.0683438 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0308201 ns, 0.0638473 ns);
             tpd_C0_Y : VitalDelayType01 := (0.026744 ns, 0.0562346 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI211X1 : entity is TRUE;
end OAI211X1;

architecture behavioral of OAI211X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          n2_var := VitalAND2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI211X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0666597 ns, 0.0811432 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0606614 ns, 0.0671199 ns);
             tpd_B0_Y : VitalDelayType01 := (0.030471 ns, 0.0633862 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0258839 ns, 0.0532986 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI211X2 : entity is TRUE;
end OAI211X2;

architecture behavioral of OAI211X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          n2_var := VitalAND2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI211X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.067132 ns, 0.0818014 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0603324 ns, 0.0668962 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0303991 ns, 0.0636535 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0258351 ns, 0.0541014 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI211X4 : entity is TRUE;
end OAI211X4;

architecture behavioral of OAI211X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          n2_var := VitalAND2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI211XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0678315 ns, 0.0798857 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0618774 ns, 0.066534 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0305487 ns, 0.0616949 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0264598 ns, 0.0539827 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI211XL : entity is TRUE;
end OAI211XL;

architecture behavioral of OAI211XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          n2_var := VitalAND2(n1_var, C0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI21X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0565949 ns, 0.0481787 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0502628 ns, 0.0392199 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0233093 ns, 0.0332314 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI21X1 : entity is TRUE;
end OAI21X1;

architecture behavioral of OAI21X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI21X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0557511 ns, 0.0474605 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0493979 ns, 0.0387993 ns);
             tpd_B0_Y : VitalDelayType01 := (0.022829 ns, 0.0326691 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI21X2 : entity is TRUE;
end OAI21X2;

architecture behavioral of OAI21X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI21X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.055962 ns, 0.0476358 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0489335 ns, 0.0386341 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0228768 ns, 0.0329812 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI21X4 : entity is TRUE;
end OAI21X4;

architecture behavioral of OAI21X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI21XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0563364 ns, 0.0466961 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0498888 ns, 0.0379625 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0229253 ns, 0.0319224 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI21XL : entity is TRUE;
end OAI21XL;

architecture behavioral of OAI21XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalAND2(n0_var, B0_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI221X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0773333 ns, 0.0935838 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0713685 ns, 0.0811639 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0679573 ns, 0.0847574 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0616446 ns, 0.0723241 ns);
             tpd_C0_Y : VitalDelayType01 := (0.028719 ns, 0.0616866 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI221X1 : entity is TRUE;
end OAI221X1;

architecture behavioral of OAI221X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI221X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0726792 ns, 0.0884282 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0668097 ns, 0.0759887 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0634189 ns, 0.0795876 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0570822 ns, 0.0669946 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0263974 ns, 0.0569237 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI221X2 : entity is TRUE;
end OAI221X2;

architecture behavioral of OAI221X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI221X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0725821 ns, 0.0883453 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0666166 ns, 0.0757549 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0632004 ns, 0.0794319 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0568817 ns, 0.0668022 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0264724 ns, 0.0571458 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI221X4 : entity is TRUE;
end OAI221X4;

architecture behavioral of OAI221X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI221XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0758561 ns, 0.0889034 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0697648 ns, 0.0766093 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0660618 ns, 0.0799561 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0596659 ns, 0.067816 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0275087 ns, 0.0573225 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI221XL : entity is TRUE;
end OAI221XL;

architecture behavioral of OAI221XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalAND2(n2_var, C0_ipd);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI222X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0857478 ns, 0.103382 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0797528 ns, 0.0917728 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0768586 ns, 0.0951941 ns);
             tpd_B1_Y : VitalDelayType01 := (0.069645 ns, 0.0826397 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0598229 ns, 0.0766549 ns);
             tpd_C1_Y : VitalDelayType01 := (0.053151 ns, 0.0655967 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI222X1 : entity is TRUE;
end OAI222X1;

architecture behavioral of OAI222X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(C0_ipd, C1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalOR2(B0_ipd, B1_ipd);
          n4_var := VitalAND2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI222X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0819386 ns, 0.0994388 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0754495 ns, 0.0874086 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0725608 ns, 0.0910654 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0653966 ns, 0.0785677 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0561385 ns, 0.0734787 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0495753 ns, 0.0623183 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI222X2 : entity is TRUE;
end OAI222X2;

architecture behavioral of OAI222X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(C0_ipd, C1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalOR2(B0_ipd, B1_ipd);
          n4_var := VitalAND2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI222X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0814243 ns, 0.0990234 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0753398 ns, 0.0872833 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0723125 ns, 0.0908024 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0651413 ns, 0.0781749 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0563466 ns, 0.0736023 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0496613 ns, 0.0622453 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI222X4 : entity is TRUE;
end OAI222X4;

architecture behavioral of OAI222X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(C0_ipd, C1_ipd);
          n1_var := VitalOR2(A0_ipd, A1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalOR2(B0_ipd, B1_ipd);
          n4_var := VitalAND2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI222XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0863445 ns, 0.100808 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0803661 ns, 0.0896241 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0771735 ns, 0.0924897 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0697314 ns, 0.0802561 ns);
             tpd_C0_Y : VitalDelayType01 := (0.0592713 ns, 0.0739272 ns);
             tpd_C1_Y : VitalDelayType01 := (0.0526005 ns, 0.0628216 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         C0 : in std_ulogic := 'U' ;
         C1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI222XL : entity is TRUE;
end OAI222XL;

architecture behavioral of OAI222XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL C0_ipd : std_ulogic := 'X';
   SIGNAL C1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( C0_ipd, C0, tipd_C0 );
   VitalWireDelay( C1_ipd, C1, tipd_C1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd, C0_ipd, C1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(C0_ipd, C1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          n3_var := VitalOR2(B0_ipd, B1_ipd);
          n4_var := VitalAND2(n2_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      4 => ( C0_ipd'LAST_EVENT,
                             tpd_C0_Y,
                             TRUE),
                      5 => ( C1_ipd'LAST_EVENT,
                             tpd_C1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI22X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0652066 ns, 0.054082 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0583401 ns, 0.0457702 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0494569 ns, 0.0439822 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0421144 ns, 0.0359046 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI22X1 : entity is TRUE;
end OAI22X1;

architecture behavioral of OAI22X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI22X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.064224 ns, 0.0532081 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0577189 ns, 0.0454278 ns);
             tpd_B0_Y : VitalDelayType01 := (0.04925 ns, 0.043669 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0420956 ns, 0.0359506 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI22X2 : entity is TRUE;
end OAI22X2;

architecture behavioral of OAI22X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI22X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0641081 ns, 0.053036 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0574291 ns, 0.0451421 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0492339 ns, 0.04361 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0421074 ns, 0.0360114 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI22X4 : entity is TRUE;
end OAI22X4;

architecture behavioral of OAI22X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI22XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.065796 ns, 0.0527387 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0587944 ns, 0.0447288 ns);
             tpd_B0_Y : VitalDelayType01 := (0.048996 ns, 0.0424356 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0418463 ns, 0.0348333 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI22XL : entity is TRUE;
end OAI22XL;

architecture behavioral of OAI22XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(B0_ipd, B1_ipd);
          n2_var := VitalAND2(n0_var, n1_var);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB1X1 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.096194 ns, 0.0810448 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0923621 ns, 0.0764795 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0257387 ns, 0.0372704 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB1X1 : entity is TRUE;
end OAI2BB1X1;

architecture behavioral of OAI2BB1X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB1X2 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.134281 ns, 0.105035 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.130606 ns, 0.100587 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0244895 ns, 0.0374128 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB1X2 : entity is TRUE;
end OAI2BB1X2;

architecture behavioral of OAI2BB1X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB1X4 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.144464 ns, 0.109773 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.140698 ns, 0.1054 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0247675 ns, 0.0380555 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB1X4 : entity is TRUE;
end OAI2BB1X4;

architecture behavioral of OAI2BB1X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB1XL is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0773699 ns, 0.06787 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0736061 ns, 0.0635652 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0256099 ns, 0.0349533 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB1XL : entity is TRUE;
end OAI2BB1XL;

architecture behavioral of OAI2BB1XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB2X1 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.10604 ns, 0.0969683 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0934857 ns, 0.0891985 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0484455 ns, 0.0429007 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0413191 ns, 0.0347278 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB2X1 : entity is TRUE;
end OAI2BB2X1;

architecture behavioral of OAI2BB2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB2X2 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.132437 ns, 0.123404 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.115009 ns, 0.115263 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0481261 ns, 0.0425293 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0409766 ns, 0.0343063 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB2X2 : entity is TRUE;
end OAI2BB2X2;

architecture behavioral of OAI2BB2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB2X4 is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.139286 ns, 0.128842 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.120266 ns, 0.12016 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0482202 ns, 0.042697 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0409312 ns, 0.0344406 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB2X4 : entity is TRUE;
end OAI2BB2X4;

architecture behavioral of OAI2BB2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI2BB2XL is
   generic (
             tipd_A0N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1N : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0N_Y : VitalDelayType01 := (0.0934917 ns, 0.0828994 ns);
             tpd_A1N_Y : VitalDelayType01 := (0.0838317 ns, 0.0752498 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0479163 ns, 0.0414476 ns);
             tpd_B1_Y : VitalDelayType01 := (0.040817 ns, 0.0337233 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0N : in std_ulogic := 'U' ;
         A1N : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI2BB2XL : entity is TRUE;
end OAI2BB2XL;

architecture behavioral of OAI2BB2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0N_ipd : std_ulogic := 'X';
   SIGNAL A1N_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0N_ipd, A0N, tipd_A0N );
   VitalWireDelay( A1N_ipd, A1N, tipd_A1N );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0N_ipd, A1N_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalAND2(A0N_ipd, A1N_ipd);
          n1_var := VitalINV(n0_var);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0N_ipd'LAST_EVENT,
                             tpd_A0N_Y,
                             TRUE),
                      1 => ( A1N_ipd'LAST_EVENT,
                             tpd_A1N_Y,
                             TRUE),
                      2 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      3 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI31X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.095345 ns, 0.0551608 ns);
             tpd_A1_Y : VitalDelayType01 := (0.090184 ns, 0.0508996 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0728968 ns, 0.0406507 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0232653 ns, 0.0351362 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI31X1 : entity is TRUE;
end OAI31X1;

architecture behavioral of OAI31X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI31X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0963867 ns, 0.0550835 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0910817 ns, 0.0510612 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0724417 ns, 0.0403977 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0228204 ns, 0.034602 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI31X2 : entity is TRUE;
end OAI31X2;

architecture behavioral of OAI31X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI31X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0968597 ns, 0.0555444 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0903969 ns, 0.0509104 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0718096 ns, 0.0401985 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0228013 ns, 0.0349289 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI31X4 : entity is TRUE;
end OAI31X4;

architecture behavioral of OAI31X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI31XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.0954623 ns, 0.0533641 ns);
             tpd_A1_Y : VitalDelayType01 := (0.0901568 ns, 0.0491764 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0725584 ns, 0.0392721 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0228731 ns, 0.0337639 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI31XL : entity is TRUE;
end OAI31XL;

architecture behavioral of OAI31XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalAND2(n1_var, B0_ipd);
          Y_zd := VitalINV(n2_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI32X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.109843 ns, 0.0609822 ns);
             tpd_A1_Y : VitalDelayType01 := (0.104064 ns, 0.0567005 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0865547 ns, 0.0474321 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0496916 ns, 0.0462606 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0428388 ns, 0.0384069 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI32X1 : entity is TRUE;
end OAI32X1;

architecture behavioral of OAI32X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI32X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.109003 ns, 0.0602 ns);
             tpd_A1_Y : VitalDelayType01 := (0.103359 ns, 0.0561542 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0852935 ns, 0.0468117 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0489712 ns, 0.045543 ns);
             tpd_B1_Y : VitalDelayType01 := (0.042038 ns, 0.0379764 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI32X2 : entity is TRUE;
end OAI32X2;

architecture behavioral of OAI32X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI32X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.109534 ns, 0.0606133 ns);
             tpd_A1_Y : VitalDelayType01 := (0.103133 ns, 0.0562253 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0847656 ns, 0.0466478 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0491107 ns, 0.0460539 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0420662 ns, 0.0382024 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI32X4 : entity is TRUE;
end OAI32X4;

architecture behavioral of OAI32X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI32XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.111484 ns, 0.0598968 ns);
             tpd_A1_Y : VitalDelayType01 := (0.104869 ns, 0.0556608 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0864512 ns, 0.0463544 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0497904 ns, 0.0452703 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0421892 ns, 0.0372064 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI32XL : entity is TRUE;
end OAI32XL;

architecture behavioral of OAI32XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalAND2(n1_var, n2_var);
          Y_zd := VitalINV(n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI33X1 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.121357 ns, 0.0671466 ns);
             tpd_A1_Y : VitalDelayType01 := (0.116066 ns, 0.0628072 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0982862 ns, 0.0531742 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0871416 ns, 0.0538995 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0818075 ns, 0.0496221 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0641197 ns, 0.0407627 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI33X1 : entity is TRUE;
end OAI33X1;

architecture behavioral of OAI33X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n2_var, B2_ipd);
          n4_var := VitalAND2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI33X2 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.123952 ns, 0.0677575 ns);
             tpd_A1_Y : VitalDelayType01 := (0.117461 ns, 0.062826 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0988019 ns, 0.0531883 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0875168 ns, 0.0541186 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0814955 ns, 0.0494941 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0645895 ns, 0.0409091 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI33X2 : entity is TRUE;
end OAI33X2;

architecture behavioral of OAI33X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n2_var, B2_ipd);
          n4_var := VitalAND2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI33X4 is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.123539 ns, 0.0688096 ns);
             tpd_A1_Y : VitalDelayType01 := (0.116762 ns, 0.0637406 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0988939 ns, 0.0540503 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0891352 ns, 0.0553384 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0824152 ns, 0.0503829 ns);
             tpd_B2_Y : VitalDelayType01 := (0.0635782 ns, 0.0410429 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI33X4 : entity is TRUE;
end OAI33X4;

architecture behavioral of OAI33X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n2_var, B2_ipd);
          n4_var := VitalAND2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OAI33XL is
   generic (
             tipd_A0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_A2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B2 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A0_Y : VitalDelayType01 := (0.122175 ns, 0.0655565 ns);
             tpd_A1_Y : VitalDelayType01 := (0.116684 ns, 0.061502 ns);
             tpd_A2_Y : VitalDelayType01 := (0.0985712 ns, 0.0520205 ns);
             tpd_B0_Y : VitalDelayType01 := (0.0874261 ns, 0.0524091 ns);
             tpd_B1_Y : VitalDelayType01 := (0.0821066 ns, 0.0484536 ns);
             tpd_B2_Y : VitalDelayType01 := (0.063028 ns, 0.039338 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A0 : in std_ulogic := 'U' ;
         A1 : in std_ulogic := 'U' ;
         A2 : in std_ulogic := 'U' ;
         B0 : in std_ulogic := 'U' ;
         B1 : in std_ulogic := 'U' ;
         B2 : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OAI33XL : entity is TRUE;
end OAI33XL;

architecture behavioral of OAI33XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A0_ipd : std_ulogic := 'X';
   SIGNAL A1_ipd : std_ulogic := 'X';
   SIGNAL A2_ipd : std_ulogic := 'X';
   SIGNAL B0_ipd : std_ulogic := 'X';
   SIGNAL B1_ipd : std_ulogic := 'X';
   SIGNAL B2_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A0_ipd, A0, tipd_A0 );
   VitalWireDelay( A1_ipd, A1, tipd_A1 );
   VitalWireDelay( A2_ipd, A2, tipd_A2 );
   VitalWireDelay( B0_ipd, B0, tipd_B0 );
   VitalWireDelay( B1_ipd, B1, tipd_B1 );
   VitalWireDelay( B2_ipd, B2, tipd_B2 );
END BLOCK;

VITALBehavior : PROCESS (A0_ipd, A1_ipd, A2_ipd, B0_ipd, B1_ipd, B2_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A0_ipd, A1_ipd);
          n1_var := VitalOR2(n0_var, A2_ipd);
          n2_var := VitalOR2(B0_ipd, B1_ipd);
          n3_var := VitalOR2(n2_var, B2_ipd);
          n4_var := VitalAND2(n1_var, n3_var);
          Y_zd := VitalINV(n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A0_ipd'LAST_EVENT,
                             tpd_A0_Y,
                             TRUE),
                      1 => ( A1_ipd'LAST_EVENT,
                             tpd_A1_Y,
                             TRUE),
                      2 => ( A2_ipd'LAST_EVENT,
                             tpd_A2_Y,
                             TRUE),
                      3 => ( B0_ipd'LAST_EVENT,
                             tpd_B0_Y,
                             TRUE),
                      4 => ( B1_ipd'LAST_EVENT,
                             tpd_B1_Y,
                             TRUE),
                      5 => ( B2_ipd'LAST_EVENT,
                             tpd_B2_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0631845 ns, 0.10247 ns);
             tpd_B_Y : VitalDelayType01 := (0.0578284 ns, 0.0957204 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2X1 : entity is TRUE;
end OR2X1;

architecture behavioral of OR2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0829602 ns, 0.146825 ns);
             tpd_B_Y : VitalDelayType01 := (0.0775196 ns, 0.140406 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2X2 : entity is TRUE;
end OR2X2;

architecture behavioral of OR2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0884451 ns, 0.155732 ns);
             tpd_B_Y : VitalDelayType01 := (0.0829607 ns, 0.149479 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2X4 : entity is TRUE;
end OR2X4;

architecture behavioral of OR2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0767097 ns, 0.130478 ns);
             tpd_B_Y : VitalDelayType01 := (0.0714688 ns, 0.123947 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2X6 : entity is TRUE;
end OR2X6;

architecture behavioral of OR2X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0882293 ns, 0.155384 ns);
             tpd_B_Y : VitalDelayType01 := (0.0830431 ns, 0.149117 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2X8 : entity is TRUE;
end OR2X8;

architecture behavioral of OR2X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0524168 ns, 0.0798126 ns);
             tpd_B_Y : VitalDelayType01 := (0.0472447 ns, 0.0728571 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR2XL : entity is TRUE;
end OR2XL;

architecture behavioral of OR2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0694839 ns, 0.158628 ns);
             tpd_B_Y : VitalDelayType01 := (0.0663483 ns, 0.152515 ns);
             tpd_C_Y : VitalDelayType01 := (0.0602575 ns, 0.134562 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3X1 : entity is TRUE;
end OR3X1;

architecture behavioral of OR3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0896401 ns, 0.223779 ns);
             tpd_B_Y : VitalDelayType01 := (0.0859177 ns, 0.218231 ns);
             tpd_C_Y : VitalDelayType01 := (0.0797656 ns, 0.200724 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3X2 : entity is TRUE;
end OR3X2;

architecture behavioral of OR3X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.095221 ns, 0.236372 ns);
             tpd_B_Y : VitalDelayType01 := (0.0911757 ns, 0.230487 ns);
             tpd_C_Y : VitalDelayType01 := (0.0850394 ns, 0.213761 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3X4 : entity is TRUE;
end OR3X4;

architecture behavioral of OR3X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0828934 ns, 0.198656 ns);
             tpd_B_Y : VitalDelayType01 := (0.0792176 ns, 0.192802 ns);
             tpd_C_Y : VitalDelayType01 := (0.0728786 ns, 0.174525 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3X6 : entity is TRUE;
end OR3X6;

architecture behavioral of OR3X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0946481 ns, 0.235347 ns);
             tpd_B_Y : VitalDelayType01 := (0.0906835 ns, 0.229686 ns);
             tpd_C_Y : VitalDelayType01 := (0.0843581 ns, 0.211517 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3X8 : entity is TRUE;
end OR3X8;

architecture behavioral of OR3X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0582966 ns, 0.125366 ns);
             tpd_B_Y : VitalDelayType01 := (0.0557442 ns, 0.11978 ns);
             tpd_C_Y : VitalDelayType01 := (0.0497638 ns, 0.101455 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR3XL : entity is TRUE;
end OR3XL;

architecture behavioral of OR3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          Y_zd := VitalOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0721537 ns, 0.220362 ns);
             tpd_B_Y : VitalDelayType01 := (0.0709163 ns, 0.214196 ns);
             tpd_C_Y : VitalDelayType01 := (0.0671943 ns, 0.198179 ns);
             tpd_D_Y : VitalDelayType01 := (0.0614233 ns, 0.170421 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4X1 : entity is TRUE;
end OR4X1;

architecture behavioral of OR4X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0934776 ns, 0.310335 ns);
             tpd_B_Y : VitalDelayType01 := (0.0916284 ns, 0.304713 ns);
             tpd_C_Y : VitalDelayType01 := (0.0868828 ns, 0.286431 ns);
             tpd_D_Y : VitalDelayType01 := (0.080709 ns, 0.257114 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4X2 : entity is TRUE;
end OR4X2;

architecture behavioral of OR4X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0991381 ns, 0.32506 ns);
             tpd_B_Y : VitalDelayType01 := (0.0971762 ns, 0.319869 ns);
             tpd_C_Y : VitalDelayType01 := (0.0924235 ns, 0.303078 ns);
             tpd_D_Y : VitalDelayType01 := (0.0860613 ns, 0.274703 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4X4 : entity is TRUE;
end OR4X4;

architecture behavioral of OR4X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4X6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0868208 ns, 0.276066 ns);
             tpd_B_Y : VitalDelayType01 := (0.085299 ns, 0.270988 ns);
             tpd_C_Y : VitalDelayType01 := (0.0810831 ns, 0.254827 ns);
             tpd_D_Y : VitalDelayType01 := (0.0746843 ns, 0.224696 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4X6 : entity is TRUE;
end OR4X6;

architecture behavioral of OR4X6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4X8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0991132 ns, 0.325084 ns);
             tpd_B_Y : VitalDelayType01 := (0.0971367 ns, 0.319996 ns);
             tpd_C_Y : VitalDelayType01 := (0.0925013 ns, 0.303755 ns);
             tpd_D_Y : VitalDelayType01 := (0.0861311 ns, 0.273708 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4X8 : entity is TRUE;
end OR4X8;

architecture behavioral of OR4X8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity OR4XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0608153 ns, 0.178555 ns);
             tpd_B_Y : VitalDelayType01 := (0.0603897 ns, 0.173552 ns);
             tpd_C_Y : VitalDelayType01 := (0.0569791 ns, 0.156071 ns);
             tpd_D_Y : VitalDelayType01 := (0.050916 ns, 0.125659 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of OR4XL : entity is TRUE;
end OR4XL;

architecture behavioral of OR4XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
   VitalWireDelay( D_ipd, D, tipd_D );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd, D_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalOR2(A_ipd, B_ipd);
          n1_var := VitalOR2(n0_var, C_ipd);
          Y_zd := VitalOR2(n1_var, D_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE),
                      3 => ( D_ipd'LAST_EVENT,
                             tpd_D_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.170826 ns;
             tpw_CK_negedge : VitalDelayType := 0.160675 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.192297 ns, 0.231157 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFHQX1 : entity is TRUE;
end SDFFHQX1;

architecture behavioral of SDFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0002 := VitalINV(N30);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.179665 ns;
             tpw_CK_negedge : VitalDelayType := 0.160784 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.208124 ns, 0.249252 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFHQX2 : entity is TRUE;
end SDFFHQX2;

architecture behavioral of SDFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0002 := VitalINV(N30);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.196308 ns;
             tpw_CK_negedge : VitalDelayType := 0.160862 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.23131 ns, 0.262949 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFHQX4 : entity is TRUE;
end SDFFHQX4;

architecture behavioral of SDFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.232186 ns;
             tpw_CK_negedge : VitalDelayType := 0.160572 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.281541 ns, 0.300863 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFHQX8 : entity is TRUE;
end SDFFHQX8;

architecture behavioral of SDFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0003 := VitalINV(P0000);

          Q_zd := VitalINV(P0003);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFNSRX1 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CKN : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.1875 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             tpw_CKN_posedge : VitalDelayType := 0.151151 ns;
             tpw_CKN_negedge : VitalDelayType := 0.192311 ns;
             tpw_RN_negedge : VitalDelayType := 0.228722 ns;
             tpw_SN_negedge : VitalDelayType := 0.1522 ns;
             tsetup_SI_CKN_posedge_negedge : VitalDelayType := 0.28125 ns;
             tsetup_SI_CKN_negedge_negedge : VitalDelayType := 0.28125 ns;
             thold_SI_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_SI_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tsetup_SE_CKN_posedge_negedge : VitalDelayType := 0.234375 ns;
             tsetup_SE_CKN_negedge_negedge : VitalDelayType := 0.28125 ns;
             thold_SE_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_SE_CKN_negedge_negedge : VitalDelayType := 0.00000000000000041 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.28125 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.28125 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.234804 ns, 0.214692 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.268922 ns, 0.289882 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.293881 ns);
             tpd_RN_QN : VitalDelayType01 := (0.348456 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.201279 ns, 0.260783 ns);
             tpd_SN_QN : VitalDelayType01 := (0.315366 ns, 0.25552 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFNSRX1 : entity is TRUE;
end SDFFNSRX1;

architecture behavioral of SDFFNSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CKN );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SI_CKN_posedge_negedge,
                    SetupLow       => tsetup_SI_CKN_negedge_negedge,
                    HoldHigh       => thold_SI_CKN_posedge_negedge,
                    HoldLow        => thold_SI_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_SI_CKN,
                    Violation      => Tviol_SI_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SE_CKN_posedge_negedge,
                    SetupLow       => tsetup_SE_CKN_negedge_negedge,
                    HoldHigh       => thold_SE_CKN_posedge_negedge,
                    HoldLow        => thold_SE_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_SE_CKN,
                    Violation      => Tviol_SE_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/SDFFNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_SI_CKN OR
                        Tviol_SE_CKN OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFNSRX2 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CKN : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.1875 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             tpw_CKN_posedge : VitalDelayType := 0.151385 ns;
             tpw_CKN_negedge : VitalDelayType := 0.223523 ns;
             tpw_RN_negedge : VitalDelayType := 0.254609 ns;
             tpw_SN_negedge : VitalDelayType := 0.177505 ns;
             tsetup_SI_CKN_posedge_negedge : VitalDelayType := 0.28125 ns;
             tsetup_SI_CKN_negedge_negedge : VitalDelayType := 0.28125 ns;
             thold_SI_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_SI_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tsetup_SE_CKN_posedge_negedge : VitalDelayType := 0.234375 ns;
             tsetup_SE_CKN_negedge_negedge : VitalDelayType := 0.28125 ns;
             thold_SE_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_SE_CKN_negedge_negedge : VitalDelayType := 0.00000000000000041 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.28125 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.28125 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.252564 ns, 0.233163 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.318033 ns, 0.34284 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.312049 ns);
             tpd_RN_QN : VitalDelayType01 := (0.397518 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.217607 ns, 0.278918 ns);
             tpd_SN_QN : VitalDelayType01 := (0.364458 ns, 0.305957 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFNSRX2 : entity is TRUE;
end SDFFNSRX2;

architecture behavioral of SDFFNSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CKN );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SI_CKN_posedge_negedge,
                    SetupLow       => tsetup_SI_CKN_negedge_negedge,
                    HoldHigh       => thold_SI_CKN_posedge_negedge,
                    HoldLow        => thold_SI_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_SI_CKN,
                    Violation      => Tviol_SI_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SE_CKN_posedge_negedge,
                    SetupLow       => tsetup_SE_CKN_negedge_negedge,
                    HoldHigh       => thold_SE_CKN_posedge_negedge,
                    HoldLow        => thold_SE_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_SE_CKN,
                    Violation      => Tviol_SE_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/SDFFNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_SI_CKN OR
                        Tviol_SE_CKN OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0000 := VitalINV(P0002);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFNSRX4 is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CKN : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.234375 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.1875 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             tpw_CKN_posedge : VitalDelayType := 0.150548 ns;
             tpw_CKN_negedge : VitalDelayType := 0.258364 ns;
             tpw_RN_negedge : VitalDelayType := 0.27636 ns;
             tpw_SN_negedge : VitalDelayType := 0.199676 ns;
             tsetup_SI_CKN_posedge_negedge : VitalDelayType := 0.28125 ns;
             tsetup_SI_CKN_negedge_negedge : VitalDelayType := 0.28125 ns;
             thold_SI_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_SI_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tsetup_SE_CKN_posedge_negedge : VitalDelayType := 0.234375 ns;
             tsetup_SE_CKN_negedge_negedge : VitalDelayType := 0.234375 ns;
             thold_SE_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_SE_CKN_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.28125 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.28125 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.289691 ns, 0.273436 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.367355 ns, 0.387303 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.353134 ns);
             tpd_RN_QN : VitalDelayType01 := (0.44745 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.251349 ns, 0.320997 ns);
             tpd_SN_QN : VitalDelayType01 := (0.415339 ns, 0.345828 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFNSRX4 : entity is TRUE;
end SDFFNSRX4;

architecture behavioral of SDFFNSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CKN );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SI_CKN_posedge_negedge,
                    SetupLow       => tsetup_SI_CKN_negedge_negedge,
                    HoldHigh       => thold_SI_CKN_posedge_negedge,
                    HoldLow        => thold_SI_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_SI_CKN,
                    Violation      => Tviol_SI_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SE_CKN_posedge_negedge,
                    SetupLow       => tsetup_SE_CKN_negedge_negedge,
                    HoldHigh       => thold_SE_CKN_posedge_negedge,
                    HoldLow        => thold_SE_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_SE_CKN,
                    Violation      => Tviol_SE_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/SDFFNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_SI_CKN OR
                        Tviol_SE_CKN OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0000 := VitalINV(P0002);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFNSRXL is
   generic (
             tipd_CKN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CKN : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CKN : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CKN : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CKN : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CKN : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CKN : VitalDelayType := DefDummyIsd;
             trecovery_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_CKN_posedge_negedge : VitalDelayType := 0.0937499 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CKN_posedge_negedge : VitalDelayType := 0.1875 ns;
             tremoval_RN_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             tpw_CKN_posedge : VitalDelayType := 0.15099 ns;
             tpw_CKN_negedge : VitalDelayType := 0.176935 ns;
             tpw_RN_negedge : VitalDelayType := 0.212493 ns;
             tpw_SN_negedge : VitalDelayType := 0.136531 ns;
             tsetup_SI_CKN_posedge_negedge : VitalDelayType := 0.28125 ns;
             tsetup_SI_CKN_negedge_negedge : VitalDelayType := 0.28125 ns;
             thold_SI_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_SI_CKN_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tsetup_SE_CKN_posedge_negedge : VitalDelayType := 0.234375 ns;
             tsetup_SE_CKN_negedge_negedge : VitalDelayType := 0.28125 ns;
             thold_SE_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_SE_CKN_negedge_negedge : VitalDelayType := 0.00000000000000041 ns;
             tsetup_D_CKN_posedge_negedge : VitalDelayType := 0.28125 ns;
             tsetup_D_CKN_negedge_negedge : VitalDelayType := 0.28125 ns;
             thold_D_CKN_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_D_CKN_negedge_negedge : VitalDelayType := 0 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CKN_Q : VitalDelayType01 := (0.222999 ns, 0.201095 ns);
             tpd_CKN_QN : VitalDelayType01 := (0.239063 ns, 0.257998 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.278506 ns);
             tpd_RN_QN : VitalDelayType01 := (0.316884 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.189779 ns, 0.24561 ns);
             tpd_SN_QN : VitalDelayType01 := (0.284 ns, 0.224219 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CKN : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFNSRXL : entity is TRUE;
end SDFFNSRXL;

architecture behavioral of SDFFNSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CKN_dly : std_ulogic := 'X';
   SIGNAL CKN_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CKN_ipd, CKN, tipd_CKN );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CKN_dly, CKN_ipd, ticd_CKN );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CKN );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CKN );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CKN );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CKN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CKN );
END BLOCK;

VITALBehavior : PROCESS (CKN_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CKN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CKN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CKN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CKN : std_ulogic := '0';
      VARIABLE TimeMarker_D_CKN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CKN : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CKN : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_SN_CKN_posedge_negedge,
                    Removal        => tremoval_SN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_rec_CKN_SN_posedge,
                    Violation      => Tviol_rec_CKN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    Recovery       => trecovery_RN_CKN_posedge_negedge,
                    Removal        => tremoval_RN_CKN_posedge_negedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_rec_CKN_RN_posedge,
                    Violation      => Tviol_rec_CKN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SI_CKN_posedge_negedge,
                    SetupLow       => tsetup_SI_CKN_negedge_negedge,
                    HoldHigh       => thold_SI_CKN_posedge_negedge,
                    HoldLow        => thold_SI_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_SI_CKN,
                    Violation      => Tviol_SI_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_SE_CKN_posedge_negedge,
                    SetupLow       => tsetup_SE_CKN_negedge_negedge,
                    HoldHigh       => thold_SE_CKN_posedge_negedge,
                    HoldLow        => thold_SE_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_SE_CKN,
                    Violation      => Tviol_SE_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CKN_dly,
                    RefSignalName  => "CKN",
                    SetupHigh      => tsetup_D_CKN_posedge_negedge,
                    SetupLow       => tsetup_D_CKN_negedge_negedge,
                    HoldHigh       => thold_D_CKN_posedge_negedge,
                    HoldLow        => thold_D_CKN_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    TimingData     => TimeMarker_D_CKN,
                    Violation      => Tviol_D_CKN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CKN_dly,
                    TestSignalName => "CKN",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CKN_posedge,
                    PulseWidthLow  => tpw_CKN_negedge,
                    PeriodData     => PeriodCheckInfo_CKN,
                    Violation      => PWviol_CKN,
                    HeaderMsg      => InstancePath & "/SDFFNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CKN_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CKN_RN_posedge OR
                        Tviol_SI_CKN OR
                        Tviol_SE_CKN OR
                        Tviol_D_CKN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CKN );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalINV(CKN_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CKN_dly'LAST_EVENT,
                             tpd_CKN_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.159163 ns;
             tpw_CK_negedge : VitalDelayType := 0.146832 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.188458 ns, 0.218987 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFQX1 : entity is TRUE;
end SDFFQX1;

architecture behavioral of SDFFQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.170509 ns;
             tpw_CK_negedge : VitalDelayType := 0.147606 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.207877 ns, 0.233271 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFQX2 : entity is TRUE;
end SDFFQX2;

architecture behavioral of SDFFQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.195326 ns;
             tpw_CK_negedge : VitalDelayType := 0.14757 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.241509 ns, 0.256913 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFQX4 : entity is TRUE;
end SDFFQX4;

architecture behavioral of SDFFQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFQXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.151769 ns;
             tpw_CK_negedge : VitalDelayType := 0.147067 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.175806 ns, 0.204216 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFQXL : entity is TRUE;
end SDFFQXL;

architecture behavioral of SDFFQXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFQXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFQXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.1865 ns;
             tpw_CK_posedge : VitalDelayType := 0.174524 ns;
             tpw_CK_negedge : VitalDelayType := 0.157727 ns;
             tpw_RN_negedge : VitalDelayType := 0.107425 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.233393 ns, 0.23657 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0710599 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRHQX1 : entity is TRUE;
end SDFFRHQX1;

architecture behavioral of SDFFRHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.1865 ns;
             tpw_CK_posedge : VitalDelayType := 0.18676 ns;
             tpw_CK_negedge : VitalDelayType := 0.157702 ns;
             tpw_RN_negedge : VitalDelayType := 0.115005 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.260914 ns, 0.255043 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0865062 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRHQX2 : entity is TRUE;
end SDFFRHQX2;

architecture behavioral of SDFFRHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.1865 ns;
             tpw_CK_posedge : VitalDelayType := 0.201995 ns;
             tpw_CK_negedge : VitalDelayType := 0.160928 ns;
             tpw_RN_negedge : VitalDelayType := 0.122529 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.275055 ns, 0.267012 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0793116 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRHQX4 : entity is TRUE;
end SDFFRHQX4;

architecture behavioral of SDFFRHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0003 := VitalINV(P0002);

          Q_zd := VitalINV(P0003);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.1865 ns;
             tpw_CK_posedge : VitalDelayType := 0.244666 ns;
             tpw_CK_negedge : VitalDelayType := 0.159124 ns;
             tpw_RN_negedge : VitalDelayType := 0.135554 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.326696 ns, 0.305972 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0793377 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRHQX8 : entity is TRUE;
end SDFFRHQX8;

architecture behavioral of SDFFRHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.1865 ns;
             tpw_CK_posedge : VitalDelayType := 0.210744 ns;
             tpw_CK_negedge : VitalDelayType := 0.146829 ns;
             tpw_RN_negedge : VitalDelayType := 0.115753 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.255893 ns, 0.239567 ns);
             tpd_CK_QN : VitalDelayType01 := (0.292331 ns, 0.319293 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0912168 ns);
             tpd_RN_QN : VitalDelayType01 := (0.144605 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRX1 : entity is TRUE;
end SDFFRX1;

architecture behavioral of SDFFRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.1865 ns;
             tpw_CK_posedge : VitalDelayType := 0.241669 ns;
             tpw_CK_negedge : VitalDelayType := 0.14594 ns;
             tpw_RN_negedge : VitalDelayType := 0.118953 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.270538 ns, 0.247297 ns);
             tpd_CK_QN : VitalDelayType01 := (0.3298 ns, 0.3745 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0901769 ns);
             tpd_RN_QN : VitalDelayType01 := (0.173195 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRX2 : entity is TRUE;
end SDFFRX2;

architecture behavioral of SDFFRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE QBINT : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          QBINT := VitalINV(N30);

          Q_zd := VitalINV(QBINT);

          QN_zd := VitalBUF(QBINT);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.1865 ns;
             tpw_CK_posedge : VitalDelayType := 0.269733 ns;
             tpw_CK_negedge : VitalDelayType := 0.146525 ns;
             tpw_RN_negedge : VitalDelayType := 0.128342 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.298611 ns, 0.270699 ns);
             tpd_CK_QN : VitalDelayType01 := (0.361971 ns, 0.407412 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0845118 ns);
             tpd_RN_QN : VitalDelayType01 := (0.174013 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRX4 : entity is TRUE;
end SDFFRX4;

architecture behavioral of SDFFRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.00100009 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := 0.1865 ns;
             tpw_CK_posedge : VitalDelayType := 0.188321 ns;
             tpw_CK_negedge : VitalDelayType := 0.14605 ns;
             tpw_RN_negedge : VitalDelayType := 0.110793 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.236695 ns, 0.225048 ns);
             tpd_CK_QN : VitalDelayType01 := (0.261942 ns, 0.275294 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.0786634 ns);
             tpd_RN_QN : VitalDelayType01 := (0.115606 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFRXL : entity is TRUE;
end SDFFRXL;

architecture behavioral of SDFFRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          RN_EQ_1_AN_SE_EQ_1 := VitalAND2(RN_dly, SE_dly);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.20663 ns;
             tpw_CK_negedge : VitalDelayType := 0.162071 ns;
             tpw_RN_negedge : VitalDelayType := 0.228561 ns;
             tpw_SN_negedge : VitalDelayType := 0.152238 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.235375 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.217462 ns, 0.252985 ns);
             tpd_CK_QN : VitalDelayType01 := (0.307287 ns, 0.272281 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.293961 ns);
             tpd_RN_QN : VitalDelayType01 := (0.348575 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.20149 ns, 0.260849 ns);
             tpd_SN_QN : VitalDelayType01 := (0.315456 ns, 0.255707 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRX1 : entity is TRUE;
end SDFFSRX1;

architecture behavioral of SDFFSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.180336 ns;
             tpw_CK_negedge : VitalDelayType := 0.171563 ns;
             tpw_SN_negedge : VitalDelayType := 0.103027 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.192176 ns, 0.249571 ns);
             tpd_SN_Q : VitalDelayType01 := (0.167546 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSHQX1 : entity is TRUE;
end SDFFSHQX1;

architecture behavioral of SDFFSHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE N35 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N35 := n0_vec(1);

          P0001 := VitalINV(N35);

          Q_zd := VitalINV(P0001);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.190549 ns;
             tpw_CK_negedge : VitalDelayType := 0.171861 ns;
             tpw_SN_negedge : VitalDelayType := 0.111623 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.208331 ns, 0.270327 ns);
             tpd_SN_Q : VitalDelayType01 := (0.184642 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSHQX2 : entity is TRUE;
end SDFFSHQX2;

architecture behavioral of SDFFSHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.210454 ns;
             tpw_CK_negedge : VitalDelayType := 0.172265 ns;
             tpw_SN_negedge : VitalDelayType := 0.123281 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := 0.0458749 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100942 ns;
             tpd_CK_Q : VitalDelayType01 := (0.231566 ns, 0.290617 ns);
             tpd_SN_Q : VitalDelayType01 := (0.204838 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSHQX4 : entity is TRUE;
end SDFFSHQX4;

architecture behavioral of SDFFSHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.252472 ns;
             tpw_CK_negedge : VitalDelayType := 0.172064 ns;
             tpw_SN_negedge : VitalDelayType := 0.150237 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.280251 ns, 0.342071 ns);
             tpd_SN_Q : VitalDelayType01 := (0.252022 ns, 0 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSHQX8 : entity is TRUE;
end SDFFSHQX8;

architecture behavioral of SDFFSHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.183777 ns;
             tpw_CK_negedge : VitalDelayType := 0.174102 ns;
             tpw_RN_negedge : VitalDelayType := 0.203496 ns;
             tpw_SN_negedge : VitalDelayType := 0.114291 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.235375 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.207475 ns, 0.248479 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.283215 ns);
             tpd_SN_Q : VitalDelayType01 := (0.180269 ns, 0.2385 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRHQX1 : entity is TRUE;
end SDFFSRHQX1;

architecture behavioral of SDFFSRHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.194575 ns;
             tpw_CK_negedge : VitalDelayType := 0.173998 ns;
             tpw_RN_negedge : VitalDelayType := 0.215703 ns;
             tpw_SN_negedge : VitalDelayType := 0.123364 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.235375 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.226906 ns, 0.269966 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.306788 ns);
             tpd_SN_Q : VitalDelayType01 := (0.198843 ns, 0.26172 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRHQX2 : entity is TRUE;
end SDFFSRHQX2;

architecture behavioral of SDFFSRHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.216051 ns;
             tpw_CK_negedge : VitalDelayType := 0.173381 ns;
             tpw_RN_negedge : VitalDelayType := 0.228918 ns;
             tpw_SN_negedge : VitalDelayType := 0.135928 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.257107 ns, 0.289452 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.335046 ns);
             tpd_SN_Q : VitalDelayType01 := (0.220619 ns, 0.29056 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRHQX4 : entity is TRUE;
end SDFFSRHQX4;

architecture behavioral of SDFFSRHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.234375 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.264584 ns;
             tpw_CK_negedge : VitalDelayType := 0.174247 ns;
             tpw_RN_negedge : VitalDelayType := 0.260963 ns;
             tpw_SN_negedge : VitalDelayType := 0.16238 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.323182 ns, 0.342021 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.399972 ns);
             tpd_SN_Q : VitalDelayType01 := (0.269593 ns, 0.353067 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRHQX8 : entity is TRUE;
end SDFFSRHQX8;

architecture behavioral of SDFFSRHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0003 := VitalINV(P0002);

          Q_zd := VitalINV(P0003);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.234063 ns;
             tpw_CK_negedge : VitalDelayType := 0.162392 ns;
             tpw_RN_negedge : VitalDelayType := 0.252462 ns;
             tpw_SN_negedge : VitalDelayType := 0.17704 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.235375 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.238918 ns, 0.266668 ns);
             tpd_CK_QN : VitalDelayType01 := (0.351472 ns, 0.328834 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.309992 ns);
             tpd_RN_QN : VitalDelayType01 := (0.395375 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.21687 ns, 0.277223 ns);
             tpd_SN_QN : VitalDelayType01 := (0.362666 ns, 0.30529 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRX2 : entity is TRUE;
end SDFFSRX2;

architecture behavioral of SDFFSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE QBINT : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          QBINT := VitalINV(P0000);

          Q_zd := VitalINV(QBINT);

          QN_zd := VitalBUF(QBINT);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.234375 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.272508 ns;
             tpw_CK_negedge : VitalDelayType := 0.162856 ns;
             tpw_RN_negedge : VitalDelayType := 0.276 ns;
             tpw_SN_negedge : VitalDelayType := 0.19967 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.235375 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.284747 ns, 0.301742 ns);
             tpd_CK_QN : VitalDelayType01 := (0.395739 ns, 0.382132 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.353423 ns);
             tpd_RN_QN : VitalDelayType01 := (0.447791 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.2517 ns, 0.321154 ns);
             tpd_SN_QN : VitalDelayType01 := (0.415585 ns, 0.346165 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRX4 : entity is TRUE;
end SDFFSRX4;

architecture behavioral of SDFFSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0000 := VitalINV(P0002);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             trecovery_RN_SN_posedge_posedge : VitalDelayType := 0.1875 ns;
             trecovery_RN_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tremoval_RN_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             tpw_CK_posedge : VitalDelayType := 0.190812 ns;
             tpw_CK_negedge : VitalDelayType := 0.162141 ns;
             tpw_RN_negedge : VitalDelayType := 0.211958 ns;
             tpw_SN_negedge : VitalDelayType := 0.136243 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.235375 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tremoval_RN_SN_posedge_posedge : VitalDelayType := VitalZeroDelay;
             tpd_CK_Q : VitalDelayType01 := (0.204597 ns, 0.237533 ns);
             tpd_CK_QN : VitalDelayType01 := (0.275524 ns, 0.23929 ns);
             tpd_RN_Q : VitalDelayType01 := (0 ns, 0.277531 ns);
             tpd_RN_QN : VitalDelayType01 := (0.315806 ns, 0 ns);
             tpd_SN_Q : VitalDelayType01 := (0.189041 ns, 0.244387 ns);
             tpd_SN_QN : VitalDelayType01 := (0.282677 ns, 0.223414 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSRXL : entity is TRUE;
end SDFFSRXL;

architecture behavioral of SDFFSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_SN_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_SN_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_CK_RN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_RN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_CLEAR : std_ulogic;
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE RN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => SN_dly,
                    RefSignalName  => "SN",
                    Recovery       => trecovery_RN_SN_posedge_posedge,
                    Removal        => tremoval_RN_SN_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_rec_SN_RN_posedge,
                    Violation      => Tviol_rec_SN_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_RN_CK_posedge_posedge,
                    Removal        => tremoval_RN_CK_posedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_rec_CK_RN_posedge,
                    Violation      => Tviol_rec_CK_RN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_rec_SN_RN_posedge OR
                        Tviol_rec_CK_RN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_CLEAR := VitalINV(RN_dly);

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_CLEAR, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          RN_EQ_1 := VitalBUF(RN_dly);

          n1_var := VitalAND2(RN_dly, SE_dly);
          RN_EQ_1_AN_SE_EQ_1_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n2_var := VitalINV(SE_dly);
          n3_var := VitalAND2(RN_dly, n2_var);
          RN_EQ_1_AN_SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n3_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      2 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.204547 ns;
             tpw_CK_negedge : VitalDelayType := 0.160669 ns;
             tpw_SN_negedge : VitalDelayType := 0.139908 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.202014 ns, 0.255122 ns);
             tpd_CK_QN : VitalDelayType01 := (0.30907 ns, 0.255115 ns);
             tpd_SN_Q : VitalDelayType01 := (0.188446 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.241183 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSX1 : entity is TRUE;
end SDFFSX1;

architecture behavioral of SDFFSX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE N35 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N35 := n0_vec(1);

          P0002 := VitalINV(N35);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.230597 ns;
             tpw_CK_negedge : VitalDelayType := 0.160731 ns;
             tpw_SN_negedge : VitalDelayType := 0.164376 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.217398 ns, 0.268167 ns);
             tpd_CK_QN : VitalDelayType01 := (0.352847 ns, 0.304023 ns);
             tpd_SN_Q : VitalDelayType01 := (0.202818 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.288967 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSX2 : entity is TRUE;
end SDFFSX2;

architecture behavioral of SDFFSX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.266769 ns;
             tpw_CK_negedge : VitalDelayType := 0.160219 ns;
             tpw_SN_negedge : VitalDelayType := 0.189041 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.252393 ns, 0.30455 ns);
             tpd_CK_QN : VitalDelayType01 := (0.399152 ns, 0.345914 ns);
             tpd_SN_Q : VitalDelayType01 := (0.238385 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.331068 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSX4 : entity is TRUE;
end SDFFSX4;

architecture behavioral of SDFFSX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFSXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_CK : VitalDelayType := DefDummyIsd;
             trecovery_SN_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tremoval_SN_CK_posedge_posedge : VitalDelayType := 0.0927498 ns;
             tpw_CK_posedge : VitalDelayType := 0.188899 ns;
             tpw_CK_negedge : VitalDelayType := 0.16065 ns;
             tpw_SN_negedge : VitalDelayType := 0.124437 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.190741 ns, 0.239751 ns);
             tpd_CK_QN : VitalDelayType01 := (0.277547 ns, 0.224538 ns);
             tpd_SN_Q : VitalDelayType01 := (0.176755 ns, 0 ns);
             tpd_SN_QN : VitalDelayType01 := (0 ns, 0.210367 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFSXL : entity is TRUE;
end SDFFSXL;

architecture behavioral of SDFFSXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_CK_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_CK_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE N35 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE SN_EQ_1 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE SE_EQ_0_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    Recovery       => trecovery_SN_CK_posedge_posedge,
                    Removal        => tremoval_SN_CK_posedge_posedge,
                    CheckEnabled   => TRUE,
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    TimingData     => TimeMarker_rec_CK_SN_posedge,
                    Violation      => Tviol_rec_CK_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFSXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_CK_SN_posedge OR
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_SN_negedge OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N35 := n0_vec(1);

          P0002 := VitalINV(N35);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1_AN_SN_EQ_1 := VitalAND2(SE_dly, SN_dly);

          SN_EQ_1 := VitalBUF(SN_dly);

          n1_var := VitalINV(SE_dly);
          SE_EQ_0_AN_SN_EQ_1 := VitalAND2(n1_var, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE),
                      1 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFTRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.192521 ns;
             tpw_CK_negedge : VitalDelayType := 0.142738 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.201354 ns, 0.233279 ns);
             tpd_CK_QN : VitalDelayType01 := (0.285725 ns, 0.254004 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFTRX1 : entity is TRUE;
end SDFFTRX1;

architecture behavioral of SDFFTRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX1",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFTRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalAND2(D_dly, RN_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          n2_var := VitalINV(SE_dly);
          D_EQ_1_AN_SE_EQ_0 := VitalAND2(D_dly, n2_var);

          n3_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFTRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.216106 ns;
             tpw_CK_negedge : VitalDelayType := 0.14345 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.216705 ns, 0.242648 ns);
             tpd_CK_QN : VitalDelayType01 := (0.324609 ns, 0.302703 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFTRX2 : entity is TRUE;
end SDFFTRX2;

architecture behavioral of SDFFTRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX2",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFTRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalAND2(D_dly, RN_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          n2_var := VitalINV(SE_dly);
          D_EQ_1_AN_SE_EQ_0 := VitalAND2(D_dly, n2_var);

          n3_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFTRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.246266 ns;
             tpw_CK_negedge : VitalDelayType := 0.143076 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.252958 ns, 0.267947 ns);
             tpd_CK_QN : VitalDelayType01 := (0.357521 ns, 0.345145 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFTRX4 : entity is TRUE;
end SDFFTRX4;

architecture behavioral of SDFFTRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX4",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFTRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalAND2(D_dly, RN_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          n2_var := VitalINV(SE_dly);
          D_EQ_1_AN_SE_EQ_0 := VitalAND2(D_dly, n2_var);

          n3_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFTRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.177802 ns;
             tpw_CK_negedge : VitalDelayType := 0.142845 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.189965 ns, 0.219681 ns);
             tpd_CK_QN : VitalDelayType01 := (0.256308 ns, 0.223549 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFTRXL : entity is TRUE;
end SDFFTRXL;

architecture behavioral of SDFFTRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRXL",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFTRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFTRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalAND2(D_dly, RN_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          n2_var := VitalINV(SE_dly);
          D_EQ_1_AN_SE_EQ_0 := VitalAND2(D_dly, n2_var);

          n3_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.192546 ns;
             tpw_CK_negedge : VitalDelayType := 0.147279 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.201373 ns, 0.233325 ns);
             tpd_CK_QN : VitalDelayType01 := (0.285764 ns, 0.253979 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFX1 : entity is TRUE;
end SDFFX1;

architecture behavioral of SDFFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.217279 ns;
             tpw_CK_negedge : VitalDelayType := 0.146701 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.218362 ns, 0.244034 ns);
             tpd_CK_QN : VitalDelayType01 := (0.325888 ns, 0.304371 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFX2 : entity is TRUE;
end SDFFX2;

architecture behavioral of SDFFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalINV(P0001);

          QN_zd := VitalBUF(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.245935 ns;
             tpw_CK_negedge : VitalDelayType := 0.147034 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.25254 ns, 0.267643 ns);
             tpd_CK_QN : VitalDelayType01 := (0.357149 ns, 0.344721 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFX4 : entity is TRUE;
end SDFFX4;

architecture behavioral of SDFFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SDFFXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.178143 ns;
             tpw_CK_negedge : VitalDelayType := 0.147396 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.190607 ns, 0.220116 ns);
             tpd_CK_QN : VitalDelayType01 := (0.256756 ns, 0.224222 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SDFFXL : entity is TRUE;
end SDFFXL;

architecture behavioral of SDFFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SDFFXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SDFFXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n0_D := VitalMUX2(SI_dly, D_dly, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.177999 ns;
             tpw_CK_negedge : VitalDelayType := 0.157807 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.205901 ns, 0.246112 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFHQX1 : entity is TRUE;
end SEDFFHQX1;

architecture behavioral of SEDFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.185332 ns;
             tpw_CK_negedge : VitalDelayType := 0.157655 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.188506 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.216957 ns, 0.25568 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFHQX2 : entity is TRUE;
end SEDFFHQX2;

architecture behavioral of SEDFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.202111 ns;
             tpw_CK_negedge : VitalDelayType := 0.159129 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.242231 ns, 0.273159 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFHQX4 : entity is TRUE;
end SEDFFHQX4;

architecture behavioral of SEDFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.239187 ns;
             tpw_CK_negedge : VitalDelayType := 0.158754 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.141625 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.293578 ns, 0.314227 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFHQX8 : entity is TRUE;
end SEDFFHQX8;

architecture behavioral of SEDFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX8",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFHQX8",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0001);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0001 := VitalINV(P0003);

          Q_zd := VitalINV(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFTRX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.197711 ns;
             tpw_CK_negedge : VitalDelayType := 0.146406 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.376 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.28225 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.1885 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.329125 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.28225 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.1885 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.376 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.28225 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.1885 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tpd_CK_Q : VitalDelayType01 := (0.211579 ns, 0.241768 ns);
             tpd_CK_QN : VitalDelayType01 := (0.295454 ns, 0.26538 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFTRX1 : entity is TRUE;
end SEDFFTRX1;

architecture behavioral of SEDFFTRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n8_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n9_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n10_var : std_ulogic;
      VARIABLE n11_var : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFTRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n8_var := VitalAND2(n7_var, RN_dly);
          n0_D := VitalMUX2(SI_dly, n8_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n9_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n9_var);

          n10_var := VitalAND2(E_dly, RN_dly);
          n11_var := VitalINV(SE_dly);
          E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 := VitalAND2(n10_var, n11_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFTRX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.220197 ns;
             tpw_CK_negedge : VitalDelayType := 0.147385 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.376 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.28225 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.1885 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.329125 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.28225 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.1885 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.376 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.28225 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.1885 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tpd_CK_Q : VitalDelayType01 := (0.224537 ns, 0.249007 ns);
             tpd_CK_QN : VitalDelayType01 := (0.332287 ns, 0.311593 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFTRX2 : entity is TRUE;
end SEDFFTRX2;

architecture behavioral of SEDFFTRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n8_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n9_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n10_var : std_ulogic;
      VARIABLE n11_var : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFTRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n8_var := VitalAND2(n7_var, RN_dly);
          n0_D := VitalMUX2(SI_dly, n8_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0000 := VitalINV(P0003);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n9_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n9_var);

          n10_var := VitalAND2(E_dly, RN_dly);
          n11_var := VitalINV(SE_dly);
          E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 := VitalAND2(n10_var, n11_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFTRX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.247448 ns;
             tpw_CK_negedge : VitalDelayType := 0.146909 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.376 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.28225 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.1885 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.329125 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.28225 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.235375 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.376 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.28225 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.1885 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tpd_CK_Q : VitalDelayType01 := (0.255897 ns, 0.270696 ns);
             tpd_CK_QN : VitalDelayType01 := (0.36094 ns, 0.348683 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFTRX4 : entity is TRUE;
end SEDFFTRX4;

architecture behavioral of SEDFFTRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n8_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n9_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n10_var : std_ulogic;
      VARIABLE n11_var : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFTRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n8_var := VitalAND2(n7_var, RN_dly);
          n0_D := VitalMUX2(SI_dly, n8_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0000 := VitalINV(P0003);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n9_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n9_var);

          n10_var := VitalAND2(E_dly, RN_dly);
          n11_var := VitalINV(SE_dly);
          E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 := VitalAND2(n10_var, n11_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFTRXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_RN_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.182955 ns;
             tpw_CK_negedge : VitalDelayType := 0.146353 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_RN_CK_posedge_posedge : VitalDelayType := 0.376 ns;
             tsetup_RN_CK_negedge_posedge : VitalDelayType := 0.28225 ns;
             thold_RN_CK_posedge_posedge : VitalDelayType := -0.1885 ns;
             thold_RN_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.329125 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.28225 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.1885 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.376 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.28225 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.1885 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tpd_CK_Q : VitalDelayType01 := (0.200733 ns, 0.228476 ns);
             tpd_CK_QN : VitalDelayType01 := (0.26594 ns, 0.235005 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFTRXL : entity is TRUE;
end SEDFFTRXL;

architecture behavioral of SEDFFTRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( RN_dly, RN_ipd, tisd_RN_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, RN_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_CK : std_ulogic := '0';
      VARIABLE TimeMarker_RN_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE n5_var : std_ulogic;
      VARIABLE n6_var : std_ulogic;
      VARIABLE n7_var : std_ulogic;
      VARIABLE n8_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n9_var : std_ulogic;
      VARIABLE RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n10_var : std_ulogic;
      VARIABLE n11_var : std_ulogic;
      VARIABLE E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_RN_CK_posedge_posedge,
                    SetupLow       => tsetup_RN_CK_negedge_posedge,
                    HoldHigh       => thold_RN_CK_posedge_posedge,
                    HoldLow        => thold_RN_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    TimingData     => TimeMarker_RN_CK,
                    Violation      => Tviol_RN_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFTRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_RN_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(D_dly);
          n2_var := VitalAND2(n1_var, E_dly);
          n3_var := VitalINV(n2_var);
          n4_var := VitalINV(E_dly);
          n5_var := VitalAND2(n4_var, P0000);
          n6_var := VitalINV(n5_var);
          n7_var := VitalAND2(n3_var, n6_var);
          n8_var := VitalAND2(n7_var, RN_dly);
          n0_D := VitalMUX2(SI_dly, n8_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0000 := VitalINV(N30);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n9_var := VitalINV(SE_dly);
          RN_EQ_1_AN_SE_EQ_0 := VitalAND2(RN_dly, n9_var);

          n10_var := VitalAND2(E_dly, RN_dly);
          n11_var := VitalINV(SE_dly);
          E_EQ_1_AN_RN_EQ_1_AN_SE_EQ_0 := VitalAND2(n10_var, n11_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.199904 ns;
             tpw_CK_negedge : VitalDelayType := 0.146817 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.141625 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.28225 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.201252 ns, 0.232727 ns);
             tpd_CK_QN : VitalDelayType01 := (0.300537 ns, 0.270129 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFX1 : entity is TRUE;
end SEDFFX1;

architecture behavioral of SEDFFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX1",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX1",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.223852 ns;
             tpw_CK_negedge : VitalDelayType := 0.14683 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.141625 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.28225 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.217904 ns, 0.242835 ns);
             tpd_CK_QN : VitalDelayType01 := (0.338984 ns, 0.319161 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFX2 : entity is TRUE;
end SEDFFX2;

architecture behavioral of SEDFFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX2",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0002);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          QN_zd := VitalBUF(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.248253 ns;
             tpw_CK_negedge : VitalDelayType := 0.147301 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.141625 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.28225 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.250879 ns, 0.266263 ns);
             tpd_CK_QN : VitalDelayType01 := (0.363153 ns, 0.351075 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFX4 : entity is TRUE;
end SEDFFX4;

architecture behavioral of SEDFFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0003 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFX4",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0003);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0003 := VitalINV(P0001);

          Q_zd := VitalINV(P0003);

          QN_zd := VitalBUF(P0003);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SEDFFXL is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_CK : VitalDelayType := DefDummyIsd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.185838 ns;
             tpw_CK_negedge : VitalDelayType := 0.146976 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.141625 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D_CK_negedge_posedge : VitalDelayType := 0.28225 ns;
             thold_D_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.189964 ns, 0.219325 ns);
             tpd_CK_QN : VitalDelayType01 := (0.272277 ns, 0.240736 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of SEDFFXL : entity is TRUE;
end SEDFFXL;

architecture behavioral of SEDFFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D_dly, D_ipd, tisd_D_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D_dly, E_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE E_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFXL",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFXL",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFXL",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D_CK_posedge_posedge,
                    SetupLow       => tsetup_D_CK_negedge_posedge,
                    HoldHigh       => thold_D_CK_posedge_posedge,
                    HoldLow        => thold_D_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SEDFFXL",
                    TimingData     => TimeMarker_D_CK,
                    Violation      => Tviol_D_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SEDFFXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        Tviol_D_CK OR
                        PWviol_CK );

          n1_var := VitalINV(P0000);
          n2_var := VitalMUX2(D_dly, n1_var, E_dly);
          n0_D := VitalMUX2(SI_dly, n2_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalINV(P0000);

          QN_zd := VitalBUF(P0000);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n3_var := VitalINV(SE_dly);
          E_EQ_1_AN_SE_EQ_0 := VitalAND2(E_dly, n3_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SMDFFHQX1 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.172133 ns;
             tpw_CK_negedge : VitalDelayType := 0.164341 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.194033 ns, 0.232549 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SMDFFHQX1 : entity is TRUE;
end SMDFFHQX1;

architecture behavioral of SMDFFHQX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE S0_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S0_EQ_0_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SMDFFHQX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n1_var := VitalMUX2(D1_dly, D0_dly, S0_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n2_var := VitalINV(SE_dly);
          S0_EQ_1_AN_SE_EQ_0 := VitalAND2(S0_dly, n2_var);

          n3_var := VitalINV(S0_dly);
          n4_var := VitalINV(SE_dly);
          S0_EQ_0_AN_SE_EQ_0 := VitalAND2(n3_var, n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SMDFFHQX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.182227 ns;
             tpw_CK_negedge : VitalDelayType := 0.165345 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.209662 ns, 0.246883 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SMDFFHQX2 : entity is TRUE;
end SMDFFHQX2;

architecture behavioral of SMDFFHQX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE N30 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE S0_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S0_EQ_0_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SMDFFHQX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n1_var := VitalMUX2(D1_dly, D0_dly, S0_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          N30 := n0_vec(1);

          P0001 := VitalINV(N30);

          Q_zd := VitalINV(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n2_var := VitalINV(SE_dly);
          S0_EQ_1_AN_SE_EQ_0 := VitalAND2(S0_dly, n2_var);

          n3_var := VitalINV(S0_dly);
          n4_var := VitalINV(SE_dly);
          S0_EQ_0_AN_SE_EQ_0 := VitalAND2(n3_var, n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SMDFFHQX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.197356 ns;
             tpw_CK_negedge : VitalDelayType := 0.164463 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.233043 ns, 0.2639 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SMDFFHQX4 : entity is TRUE;
end SMDFFHQX4;

architecture behavioral of SMDFFHQX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0002 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE S0_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S0_EQ_0_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SMDFFHQX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n1_var := VitalMUX2(D1_dly, D0_dly, S0_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0002 := n0_vec(1);

          P0001 := VitalINV(P0002);

          Q_zd := VitalINV(P0001);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n2_var := VitalINV(SE_dly);
          S0_EQ_1_AN_SE_EQ_0 := VitalAND2(S0_dly, n2_var);

          n3_var := VitalINV(S0_dly);
          n4_var := VitalINV(SE_dly);
          S0_EQ_0_AN_SE_EQ_0 := VitalAND2(n3_var, n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity SMDFFHQX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_D0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D0_CK : VitalDelayType := DefDummyIsd;
             tipd_D1 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D1_CK : VitalDelayType := DefDummyIsd;
             tipd_S0 : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_S0_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tipd_SI : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SI_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_posedge : VitalDelayType := 0.233109 ns;
             tpw_CK_negedge : VitalDelayType := 0.165298 ns;
             tsetup_SI_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SI_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SI_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SI_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_S0_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_S0_CK_negedge_posedge : VitalDelayType := 0.235375 ns;
             thold_S0_CK_posedge_posedge : VitalDelayType := -0.047875 ns;
             thold_S0_CK_negedge_posedge : VitalDelayType := -0.047875 ns;
             tsetup_D1_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D1_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D1_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D1_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_D0_CK_posedge_posedge : VitalDelayType := 0.28225 ns;
             tsetup_D0_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_D0_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_D0_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_Q : VitalDelayType01 := (0.282377 ns, 0.301787 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         D0 : in std_ulogic := 'U' ;
         D1 : in std_ulogic := 'U' ;
         S0 : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         SI : in std_ulogic := 'U' ;
         Q : out std_ulogic);

   attribute VITAL_LEVEL0 of SMDFFHQX8 : entity is TRUE;
end SMDFFHQX8;

architecture behavioral of SMDFFHQX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL D0_dly : std_ulogic := 'X';
   SIGNAL D0_ipd : std_ulogic := 'X';
   SIGNAL D1_dly : std_ulogic := 'X';
   SIGNAL D1_ipd : std_ulogic := 'X';
   SIGNAL S0_dly : std_ulogic := 'X';
   SIGNAL S0_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';
   SIGNAL SI_dly : std_ulogic := 'X';
   SIGNAL SI_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( D0_ipd, D0, tipd_D0 );
   VitalWireDelay( D1_ipd, D1, tipd_D1 );
   VitalWireDelay( S0_ipd, S0, tipd_S0 );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
   VitalWireDelay( SI_ipd, SI, tipd_SI );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( D0_dly, D0_ipd, tisd_D0_CK );
   VitalSignalDelay( D1_dly, D1_ipd, tisd_D1_CK );
   VitalSignalDelay( S0_dly, S0_ipd, tisd_S0_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
   VitalSignalDelay( SI_dly, SI_ipd, tisd_SI_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, D0_dly, D1_dly, S0_dly, SE_dly, SI_dly)

      --timing checks section variables
      VARIABLE Tviol_SI_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SI_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_S0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_S0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D1_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D1_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D0_CK : std_ulogic := '0';
      VARIABLE TimeMarker_D0_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_D : std_ulogic;
      VARIABLE intclk : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0003 : std_ulogic;
      VARIABLE P0002 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_dff_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE SE_EQ_1 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE S0_EQ_1_AN_SE_EQ_0 : std_ulogic;
      VARIABLE n3_var : std_ulogic;
      VARIABLE n4_var : std_ulogic;
      VARIABLE S0_EQ_0_AN_SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SI_dly,
                    TestSignalName => "SI",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SI_CK_posedge_posedge,
                    SetupLow       => tsetup_SI_CK_negedge_posedge,
                    HoldHigh       => thold_SI_CK_posedge_posedge,
                    HoldLow        => thold_SI_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    TimingData     => TimeMarker_SI_CK,
                    Violation      => Tviol_SI_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => S0_dly,
                    TestSignalName => "S0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_S0_CK_posedge_posedge,
                    SetupLow       => tsetup_S0_CK_negedge_posedge,
                    HoldHigh       => thold_S0_CK_posedge_posedge,
                    HoldLow        => thold_S0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    TimingData     => TimeMarker_S0_CK,
                    Violation      => Tviol_S0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D1_dly,
                    TestSignalName => "D1",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D1_CK_posedge_posedge,
                    SetupLow       => tsetup_D1_CK_negedge_posedge,
                    HoldHigh       => thold_D1_CK_posedge_posedge,
                    HoldLow        => thold_D1_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_1_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    TimingData     => TimeMarker_D1_CK,
                    Violation      => Tviol_D1_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D0_dly,
                    TestSignalName => "D0",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_D0_CK_posedge_posedge,
                    SetupLow       => tsetup_D0_CK_negedge_posedge,
                    HoldHigh       => thold_D0_CK_posedge_posedge,
                    HoldLow        => thold_D0_CK_negedge_posedge,
                    CheckEnabled   => To_X01(S0_EQ_0_AN_SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    TimingData     => TimeMarker_D0_CK,
                    Violation      => Tviol_D0_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_CK_posedge,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK,
                    Violation      => PWviol_CK,
                    HeaderMsg      => InstancePath & "/SMDFFHQX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SI_CK OR
                        Tviol_SE_CK OR
                        Tviol_S0_CK OR
                        Tviol_D1_CK OR
                        Tviol_D0_CK OR
                        PWviol_CK );

          n1_var := VitalMUX2(D1_dly, D0_dly, S0_dly);
          n0_D := VitalMUX2(SI_dly, n1_var, SE_dly);

          intclk := VitalBUF(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_dff,
                                DataIn => (NOTIFIER, n0_D, intclk, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_dff_n0 );

          P0003 := n0_vec(1);

          P0002 := VitalINV(P0003);

          Q_zd := VitalINV(P0002);

          SE_EQ_1 := VitalBUF(SE_dly);

          SE_EQ_0 := VitalINV(SE_dly);

          n2_var := VitalINV(SE_dly);
          S0_EQ_1_AN_SE_EQ_0 := VitalAND2(S0_dly, n2_var);

          n3_var := VitalINV(S0_dly);
          n4_var := VitalINV(SE_dly);
          S0_EQ_0_AN_SE_EQ_0 := VitalAND2(n3_var, n4_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0752355 ns, 0.0739132 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0634212 ns, 0.0690783 ns, 0.0476489 ns, 0.0856162 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX1 : entity is TRUE;
end TBUFX1;

architecture behavioral of TBUFX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX12 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.099681 ns, 0.0967831 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.114108 ns, 0.0937196 ns, 0.0734571 ns, 0.128141 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX12 : entity is TRUE;
end TBUFX12;

architecture behavioral of TBUFX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX16 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.160051 ns, 0.150612 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.148084 ns, 0.155013 ns, 0.0885154 ns, 0.198262 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX16 : entity is TRUE;
end TBUFX16;

architecture behavioral of TBUFX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0937158 ns, 0.0878888 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0750415 ns, 0.0879381 ns, 0.0688879 ns, 0.0999095 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX2 : entity is TRUE;
end TBUFX2;

architecture behavioral of TBUFX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX20 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.101327 ns, 0.0969624 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.107828 ns, 0.09518 ns, 0.0736191 ns, 0.123269 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX20 : entity is TRUE;
end TBUFX20;

architecture behavioral of TBUFX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX3 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0889031 ns, 0.0852786 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0873722 ns, 0.0828695 ns, 0.061191 ns, 0.105701 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX3 : entity is TRUE;
end TBUFX3;

architecture behavioral of TBUFX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0991801 ns, 0.093449 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0937295 ns, 0.093296 ns, 0.0730394 ns, 0.112956 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX4 : entity is TRUE;
end TBUFX4;

architecture behavioral of TBUFX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX6 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0876298 ns, 0.0891089 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.115048 ns, 0.0816292 ns, 0.0608274 ns, 0.125502 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX6 : entity is TRUE;
end TBUFX6;

architecture behavioral of TBUFX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFX8 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0986769 ns, 0.0981072 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.122994 ns, 0.0928307 ns, 0.0736939 ns, 0.134359 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFX8 : entity is TRUE;
end TBUFX8;

architecture behavioral of TBUFX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TBUFXL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_OE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.0644801 ns, 0.0650767 ns);
             tpd_OE_Y : VitalDelayType01Z := (VitalZeroDelay, VitalZeroDelay, 0.0575137 ns, 0.058306 ns, 0.0377183 ns, 0.0764832 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         OE : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TBUFXL : entity is TRUE;
end TBUFXL;

architecture behavioral of TBUFXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL OE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( OE_ipd, OE, tipd_OE );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, OE_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalBUFIF1(A_ipd, OE_ipd);


          -- Path delay section
          VitalPathDelay01Z(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_A_Y),
                             TRUE),
                      1 => ( OE_ipd'LAST_EVENT,
                             VitalExtendToFillDelay(tpd_OE_Y),
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TIEHI is
   generic (

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TIEHI : entity is TRUE;
end TIEHI;

architecture behavioral of TIEHI is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL HIGH : std_ulogic := '1';
begin

   --functionality section
   VITALBUF (Y, HIGH);

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TIELO is
   generic (

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of TIELO : entity is TRUE;
end TIELO;

architecture behavioral of TIELO is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL LOW : std_ulogic := '0';
begin

   --functionality section
   VITALBUF (Y, LOW);

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX12 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.277126 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.372474 ns, 0.311791 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX12 : entity is TRUE;
end TLATNCAX12;

architecture behavioral of TLATNCAX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE N0 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX12",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX12",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          N0 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX16 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.326157 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.1525 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1525 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.0587499 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.0587499 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.387842 ns, 0.327306 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX16 : entity is TRUE;
end TLATNCAX16;

architecture behavioral of TLATNCAX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX16",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX16",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.288767 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.52759 ns, 0.426063 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX2 : entity is TRUE;
end TLATNCAX2;

architecture behavioral of TLATNCAX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX20 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.3742 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.407956 ns, 0.346615 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX20 : entity is TRUE;
end TLATNCAX20;

architecture behavioral of TLATNCAX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX20",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX20",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX3 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.259398 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.4324 ns, 0.35378 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX3 : entity is TRUE;
end TLATNCAX3;

architecture behavioral of TLATNCAX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX3",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX3",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.248288 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.41493 ns, 0.332769 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX4 : entity is TRUE;
end TLATNCAX4;

architecture behavioral of TLATNCAX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE N0 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          N0 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX6 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.255049 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.366894 ns, 0.306219 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX6 : entity is TRUE;
end TLATNCAX6;

architecture behavioral of TLATNCAX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX6",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX6",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNCAX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.254323 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.370044 ns, 0.305232 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNCAX8 : entity is TRUE;
end TLATNCAX8;

architecture behavioral of TLATNCAX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly)

      --timing checks section variables
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNCAX8",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNCAX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, E_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNSRX1 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_GN_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             trecovery_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tpw_GN_negedge : VitalDelayType := 0.259322 ns;
             tpw_RN_negedge : VitalDelayType := 0.192298 ns;
             tpw_SN_negedge : VitalDelayType := 0.134862 ns;
             tsetup_RN_GN_posedge_posedge : VitalDelayType := 0.1875 ns;
             thold_RN_GN_posedge_posedge : VitalDelayType := -0.0937499 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.1875 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := -0.000000000741742 ns;
             tpd_D_Q : VitalDelayType01 := (0.222253 ns, 0.281949 ns);
             tpd_D_QN : VitalDelayType01 := (0.238108 ns, 0.181496 ns);
             tpd_GN_Q : VitalDelayType01 := (0.342994 ns, 0.36742 ns);
             tpd_GN_QN : VitalDelayType01 := (0.323004 ns, 0.302035 ns);
             tpd_RN_Q : VitalDelayType01 := (0.318962 ns, 0.302081 ns);
             tpd_RN_QN : VitalDelayType01 := (0.258448 ns, 0.277983 ns);
             tpd_SN_Q : VitalDelayType01 := (0.141517 ns, 0.192898 ns);
             tpd_SN_QN : VitalDelayType01 := (0.14921 ns, 0.100749 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNSRX1 : entity is TRUE;
end TLATNSRX1;

architecture behavioral of TLATNSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( GN_dly, GN_ipd, tisd_GN_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_GN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_GN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_GN : std_ulogic := '0';
      VARIABLE TimeMarker_RN_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE GN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(GN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    Recovery       => trecovery_SN_GN_posedge_posedge,
                    Removal        => tremoval_SN_GN_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    TimingData     => TimeMarker_rec_GN_SN_posedge,
                    Violation      => Tviol_rec_GN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_RN_GN_posedge_posedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_GN_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    TimingData     => TimeMarker_RN_GN,
                    Violation      => Tviol_RN_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_GN_SN_posedge OR
                        Tviol_RN_GN OR
                        Tviol_D_GN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_GN_negedge );

          n1_var := VitalINV(GN_dly);
          n0_ENABLE := VitalAND2(n1_var, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);

          GN_EQ_1 := VitalBUF(GN_dly);

          n2_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n2_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNSRX2 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_GN_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             trecovery_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_GN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             tpw_GN_negedge : VitalDelayType := 0.289218 ns;
             tpw_RN_negedge : VitalDelayType := 0.218643 ns;
             tpw_SN_negedge : VitalDelayType := 0.15772 ns;
             tsetup_RN_GN_posedge_posedge : VitalDelayType := 0.1875 ns;
             thold_RN_GN_posedge_posedge : VitalDelayType := -0.0937499 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.1875 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := -0.0937499 ns;
             tpd_D_Q : VitalDelayType01 := (0.255134 ns, 0.329982 ns);
             tpd_D_QN : VitalDelayType01 := (0.282797 ns, 0.212155 ns);
             tpd_GN_Q : VitalDelayType01 := (0.373312 ns, 0.414138 ns);
             tpd_GN_QN : VitalDelayType01 := (0.366584 ns, 0.33027 ns);
             tpd_RN_Q : VitalDelayType01 := (0.348617 ns, 0.344792 ns);
             tpd_RN_QN : VitalDelayType01 := (0.297703 ns, 0.305594 ns);
             tpd_SN_Q : VitalDelayType01 := (0.155778 ns, 0.224496 ns);
             tpd_SN_QN : VitalDelayType01 := (0.177546 ns, 0.113043 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNSRX2 : entity is TRUE;
end TLATNSRX2;

architecture behavioral of TLATNSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( GN_dly, GN_ipd, tisd_GN_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_GN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_GN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_GN : std_ulogic := '0';
      VARIABLE TimeMarker_RN_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE GN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(GN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    Recovery       => trecovery_SN_GN_posedge_posedge,
                    Removal        => tremoval_SN_GN_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    TimingData     => TimeMarker_rec_GN_SN_posedge,
                    Violation      => Tviol_rec_GN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_RN_GN_posedge_posedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_GN_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    TimingData     => TimeMarker_RN_GN,
                    Violation      => Tviol_RN_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_GN_SN_posedge OR
                        Tviol_RN_GN OR
                        Tviol_D_GN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_GN_negedge );

          n1_var := VitalINV(GN_dly);
          n0_ENABLE := VitalAND2(n1_var, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);

          GN_EQ_1 := VitalBUF(GN_dly);

          n2_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n2_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNSRX4 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_GN_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             trecovery_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tpw_GN_negedge : VitalDelayType := 0.324968 ns;
             tpw_RN_negedge : VitalDelayType := 0.251881 ns;
             tpw_SN_negedge : VitalDelayType := 0.178422 ns;
             tsetup_RN_GN_posedge_posedge : VitalDelayType := 0.28125 ns;
             thold_RN_GN_posedge_posedge : VitalDelayType := -0.0937499 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.1875 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.1875 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := -0.0937499 ns;
             tpd_D_Q : VitalDelayType01 := (0.288843 ns, 0.364569 ns);
             tpd_D_QN : VitalDelayType01 := (0.315618 ns, 0.243673 ns);
             tpd_GN_Q : VitalDelayType01 := (0.408152 ns, 0.453177 ns);
             tpd_GN_QN : VitalDelayType01 := (0.404018 ns, 0.362964 ns);
             tpd_RN_Q : VitalDelayType01 := (0.38467 ns, 0.381571 ns);
             tpd_RN_QN : VitalDelayType01 := (0.332555 ns, 0.339407 ns);
             tpd_SN_Q : VitalDelayType01 := (0.152713 ns, 0.227307 ns);
             tpd_SN_QN : VitalDelayType01 := (0.178672 ns, 0.10857 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNSRX4 : entity is TRUE;
end TLATNSRX4;

architecture behavioral of TLATNSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( GN_dly, GN_ipd, tisd_GN_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_GN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_GN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_GN : std_ulogic := '0';
      VARIABLE TimeMarker_RN_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE GN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(GN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    Recovery       => trecovery_SN_GN_posedge_posedge,
                    Removal        => tremoval_SN_GN_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    TimingData     => TimeMarker_rec_GN_SN_posedge,
                    Violation      => Tviol_rec_GN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_RN_GN_posedge_posedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_GN_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    TimingData     => TimeMarker_RN_GN,
                    Violation      => Tviol_RN_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_GN_SN_posedge OR
                        Tviol_RN_GN OR
                        Tviol_D_GN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_GN_negedge );

          n1_var := VitalINV(GN_dly);
          n0_ENABLE := VitalAND2(n1_var, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);

          GN_EQ_1 := VitalBUF(GN_dly);

          n2_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n2_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNSRXL is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_GN_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_SN_GN_posedge_posedge : VitalDelayType := 0 ns;
             tremoval_SN_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tpw_GN_negedge : VitalDelayType := 0.238091 ns;
             tpw_RN_negedge : VitalDelayType := 0.170946 ns;
             tpw_SN_negedge : VitalDelayType := 0.112314 ns;
             tsetup_RN_GN_posedge_posedge : VitalDelayType := 0.1875 ns;
             thold_RN_GN_posedge_posedge : VitalDelayType := -0.0937499 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := -0.000000000741742 ns;
             tpd_D_Q : VitalDelayType01 := (0.192973 ns, 0.240636 ns);
             tpd_D_QN : VitalDelayType01 := (0.202173 ns, 0.156227 ns);
             tpd_GN_Q : VitalDelayType01 := (0.313282 ns, 0.325309 ns);
             tpd_GN_QN : VitalDelayType01 := (0.286257 ns, 0.276328 ns);
             tpd_RN_Q : VitalDelayType01 := (0.289716 ns, 0.259425 ns);
             tpd_RN_QN : VitalDelayType01 := (0.221135 ns, 0.2527 ns);
             tpd_SN_Q : VitalDelayType01 := (0.113734 ns, 0.152048 ns);
             tpd_SN_QN : VitalDelayType01 := (0.114062 ns, 0.077203 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNSRXL : entity is TRUE;
end TLATNSRXL;

architecture behavioral of TLATNSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( GN_dly, GN_ipd, tisd_GN_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_GN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_GN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_GN : std_ulogic := '0';
      VARIABLE TimeMarker_RN_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n1_var : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE GN_EQ_1 : std_ulogic;
      VARIABLE n2_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(GN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    Recovery       => trecovery_SN_GN_posedge_posedge,
                    Removal        => tremoval_SN_GN_posedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    TimingData     => TimeMarker_rec_GN_SN_posedge,
                    Violation      => Tviol_rec_GN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_RN_GN_posedge_posedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_GN_negedge_posedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    TimingData     => TimeMarker_RN_GN,
                    Violation      => Tviol_RN_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_GN_SN_posedge OR
                        Tviol_RN_GN OR
                        Tviol_D_GN OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_GN_negedge );

          n1_var := VitalINV(GN_dly);
          n0_ENABLE := VitalAND2(n1_var, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);

          GN_EQ_1 := VitalBUF(GN_dly);

          n2_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n2_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX12 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.247098 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.373614 ns, 0.311177 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX12 : entity is TRUE;
end TLATNTSCAX12;

architecture behavioral of TLATNTSCAX12 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE N5 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX12",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX12",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX12",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          N5 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX16 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.274069 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1525 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1525 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.0587499 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.0587499 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.1525 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1525 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.0587499 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.0587499 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.388479 ns, 0.327166 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX16 : entity is TRUE;
end TLATNTSCAX16;

architecture behavioral of TLATNTSCAX16 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX16",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX16",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX16",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX2 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.277981 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.528204 ns, 0.424691 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX2 : entity is TRUE;
end TLATNTSCAX2;

architecture behavioral of TLATNTSCAX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX2",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX2",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX20 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.298784 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.1885 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.09475 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.409168 ns, 0.346766 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX20 : entity is TRUE;
end TLATNTSCAX20;

architecture behavioral of TLATNTSCAX20 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX20",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX20",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX20",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX3 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.245182 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.433047 ns, 0.352916 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX3 : entity is TRUE;
end TLATNTSCAX3;

architecture behavioral of TLATNTSCAX3 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX3",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX3",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX3",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX4 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.234911 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.09475 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.00100009 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.416384 ns, 0.332132 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX4 : entity is TRUE;
end TLATNTSCAX4;

architecture behavioral of TLATNTSCAX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX4",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX4",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX6 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.233854 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.367992 ns, 0.305534 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX6 : entity is TRUE;
end TLATNTSCAX6;

architecture behavioral of TLATNTSCAX6 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE N5 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX6",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX6",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX6",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          N5 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNTSCAX8 is
   generic (
             tipd_CK : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_CK : VitalDelayType := DefDummyIcd;
             tipd_E : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_E_CK : VitalDelayType := DefDummyIsd;
             tipd_SE : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SE_CK : VitalDelayType := DefDummyIsd;
             tpw_CK_negedge : VitalDelayType := 0.233121 ns;
             tsetup_SE_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_SE_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_SE_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_SE_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tsetup_E_CK_posedge_posedge : VitalDelayType := 0.09475 ns;
             tsetup_E_CK_negedge_posedge : VitalDelayType := 0.1885 ns;
             thold_E_CK_posedge_posedge : VitalDelayType := -0.00100009 ns;
             thold_E_CK_negedge_posedge : VitalDelayType := -0.09475 ns;
             tpd_CK_ECK : VitalDelayType01 := (0.371287 ns, 0.304171 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         CK : in std_ulogic := 'U' ;
         E : in std_ulogic := 'U' ;
         SE : in std_ulogic := 'U' ;
         ECK : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNTSCAX8 : entity is TRUE;
end TLATNTSCAX8;

architecture behavioral of TLATNTSCAX8 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL CK_dly : std_ulogic := 'X';
   SIGNAL CK_ipd : std_ulogic := 'X';
   SIGNAL E_dly : std_ulogic := 'X';
   SIGNAL E_ipd : std_ulogic := 'X';
   SIGNAL SE_dly : std_ulogic := 'X';
   SIGNAL SE_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( CK_ipd, CK, tipd_CK );
   VitalWireDelay( E_ipd, E, tipd_E );
   VitalWireDelay( SE_ipd, SE, tipd_SE );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( CK_dly, CK_ipd, ticd_CK );
   VitalSignalDelay( E_dly, E_ipd, tisd_E_CK );
   VitalSignalDelay( SE_dly, SE_ipd, tisd_SE_CK );
END BLOCK;

VITALBehavior : PROCESS (CK_dly, E_dly, SE_dly)

      --timing checks section variables
      VARIABLE Tviol_SE_CK : std_ulogic := '0';
      VARIABLE TimeMarker_SE_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_E_CK : std_ulogic := '0';
      VARIABLE TimeMarker_E_CK : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_CK_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_CK_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_D : std_ulogic;
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE ECK_zd : std_ulogic;
      VARIABLE E_EQ_0 : std_ulogic;
      VARIABLE SE_EQ_0 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE ECK_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => SE_dly,
                    TestSignalName => "SE",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_SE_CK_posedge_posedge,
                    SetupLow       => tsetup_SE_CK_negedge_posedge,
                    HoldHigh       => thold_SE_CK_posedge_posedge,
                    HoldLow        => thold_SE_CK_negedge_posedge,
                    CheckEnabled   => To_X01(E_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX8",
                    TimingData     => TimeMarker_SE_CK,
                    Violation      => Tviol_SE_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => E_dly,
                    TestSignalName => "E",
                    RefSignal      => CK_dly,
                    RefSignalName  => "CK",
                    SetupHigh      => tsetup_E_CK_posedge_posedge,
                    SetupLow       => tsetup_E_CK_negedge_posedge,
                    HoldHigh       => thold_E_CK_posedge_posedge,
                    HoldLow        => thold_E_CK_negedge_posedge,
                    CheckEnabled   => To_X01(SE_EQ_0) /= '0',
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNTSCAX8",
                    TimingData     => TimeMarker_E_CK,
                    Violation      => Tviol_E_CK,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => CK_dly,
                    TestSignalName => "CK",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_CK_negedge,
                    PeriodData     => PeriodCheckInfo_CK_negedge,
                    Violation      => PWviol_CK_negedge,
                    HeaderMsg      => InstancePath & "/TLATNTSCAX8",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_SE_CK OR
                        Tviol_E_CK OR
                        PWviol_CK_negedge );

          n0_D := VitalOR2(E_dly, SE_dly);

          n0_ENABLE := VitalINV(CK_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, n0_D, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          ECK_zd := VitalAND2(CK_dly, P0000);

          E_EQ_0 := VitalINV(E_dly);

          SE_EQ_0 := VitalINV(SE_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => ECK,
               OutSignalName => "ECK",
               OutTemp => ECK_zd,
               Paths => (
                      0 => ( CK_dly'LAST_EVENT,
                             tpd_CK_ECK,
                             TRUE)),
               GlitchData => ECK_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNX1 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_GN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_GN : VitalDelayType := DefDummyIcd;
             tpw_GN_negedge : VitalDelayType := 0.175006 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.1875 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := -0.000000000741742 ns;
             tpd_D_Q : VitalDelayType01 := (0.218731 ns, 0.219755 ns);
             tpd_D_QN : VitalDelayType01 := (0.182562 ns, 0.178205 ns);
             tpd_GN_Q : VitalDelayType01 := (0.243679 ns, 0.269224 ns);
             tpd_GN_QN : VitalDelayType01 := (0.231922 ns, 0.203114 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNX1 : entity is TRUE;
end TLATNX1;

architecture behavioral of TLATNX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_GN );
   VitalSignalDelay( GN_dly, GN_ipd, ticd_GN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly)

      --timing checks section variables
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNX1",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_GN OR
                        PWviol_GN_negedge );

          n0_ENABLE := VitalINV(GN_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNX2 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_GN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_GN : VitalDelayType := DefDummyIcd;
             tpw_GN_negedge : VitalDelayType := 0.193898 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.1875 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.1875 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := -0.0937499 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := -0.000000000741742 ns;
             tpd_D_Q : VitalDelayType01 := (0.247129 ns, 0.250587 ns);
             tpd_D_QN : VitalDelayType01 := (0.211435 ns, 0.204461 ns);
             tpd_GN_Q : VitalDelayType01 := (0.272411 ns, 0.299217 ns);
             tpd_GN_QN : VitalDelayType01 := (0.259965 ns, 0.229682 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNX2 : entity is TRUE;
end TLATNX2;

architecture behavioral of TLATNX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_GN );
   VitalSignalDelay( GN_dly, GN_ipd, ticd_GN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly)

      --timing checks section variables
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNX2",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_GN OR
                        PWviol_GN_negedge );

          n0_ENABLE := VitalINV(GN_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNX4 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_GN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_GN : VitalDelayType := DefDummyIcd;
             tpw_GN_negedge : VitalDelayType := 0.227662 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.1875 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.1875 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := -0.0937499 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := -0.0937499 ns;
             tpd_D_Q : VitalDelayType01 := (0.284493 ns, 0.294288 ns);
             tpd_D_QN : VitalDelayType01 := (0.252995 ns, 0.239767 ns);
             tpd_GN_Q : VitalDelayType01 := (0.310555 ns, 0.341642 ns);
             tpd_GN_QN : VitalDelayType01 := (0.300191 ns, 0.265687 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNX4 : entity is TRUE;
end TLATNX4;

architecture behavioral of TLATNX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_GN );
   VitalSignalDelay( GN_dly, GN_ipd, ticd_GN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly)

      --timing checks section variables
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNX4",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_GN OR
                        PWviol_GN_negedge );

          n0_ENABLE := VitalINV(GN_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATNXL is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_GN : VitalDelayType := DefDummyIsd;
             tipd_GN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_GN : VitalDelayType := DefDummyIcd;
             tpw_GN_negedge : VitalDelayType := 0.163133 ns;
             tsetup_D_GN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_GN_negedge_posedge : VitalDelayType := 0.0937499 ns;
             thold_D_GN_posedge_posedge : VitalDelayType := 0 ns;
             thold_D_GN_negedge_posedge : VitalDelayType := -0.000000000741742 ns;
             tpd_D_Q : VitalDelayType01 := (0.191884 ns, 0.196111 ns);
             tpd_D_QN : VitalDelayType01 := (0.162617 ns, 0.15519 ns);
             tpd_GN_Q : VitalDelayType01 := (0.21701 ns, 0.243819 ns);
             tpd_GN_QN : VitalDelayType01 := (0.210176 ns, 0.180276 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         GN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATNXL : entity is TRUE;
end TLATNXL;

architecture behavioral of TLATNXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL GN_dly : std_ulogic := 'X';
   SIGNAL GN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( GN_ipd, GN, tipd_GN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_GN );
   VitalSignalDelay( GN_dly, GN_ipd, ticd_GN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, GN_dly)

      --timing checks section variables
      VARIABLE Tviol_D_GN : std_ulogic := '0';
      VARIABLE TimeMarker_D_GN : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_GN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_GN_negedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => GN_dly,
                    RefSignalName  => "GN",
                    SetupHigh      => tsetup_D_GN_posedge_posedge,
                    SetupLow       => tsetup_D_GN_negedge_posedge,
                    HoldHigh       => thold_D_GN_posedge_posedge,
                    HoldLow        => thold_D_GN_negedge_posedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATNXL",
                    TimingData     => TimeMarker_D_GN,
                    Violation      => Tviol_D_GN,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => GN_dly,
                    TestSignalName => "GN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_GN_negedge,
                    PeriodData     => PeriodCheckInfo_GN_negedge,
                    Violation      => PWviol_GN_negedge,
                    HeaderMsg      => InstancePath & "/TLATNXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_GN OR
                        PWviol_GN_negedge );

          n0_ENABLE := VitalINV(GN_dly);

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( GN_dly'LAST_EVENT,
                             tpd_GN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATSRX1 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_G_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             trecovery_SN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_G_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             tpw_G_posedge : VitalDelayType := 0.226589 ns;
             tpw_RN_negedge : VitalDelayType := 0.190388 ns;
             tpw_SN_negedge : VitalDelayType := 0.133845 ns;
             tsetup_RN_G_posedge_negedge : VitalDelayType := 0.1875 ns;
             thold_RN_G_posedge_negedge : VitalDelayType := -0.0937499 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.1875 ns;
             thold_D_G_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_D_G_negedge_negedge : VitalDelayType := -0.0937499 ns;
             tpd_D_Q : VitalDelayType01 := (0.221722 ns, 0.281566 ns);
             tpd_D_QN : VitalDelayType01 := (0.237874 ns, 0.181094 ns);
             tpd_G_Q : VitalDelayType01 := (0.309064 ns, 0.334457 ns);
             tpd_G_QN : VitalDelayType01 := (0.29021 ns, 0.268333 ns);
             tpd_RN_Q : VitalDelayType01 := (0.313597 ns, 0.299693 ns);
             tpd_RN_QN : VitalDelayType01 := (0.256207 ns, 0.272819 ns);
             tpd_SN_Q : VitalDelayType01 := (0.141297 ns, 0.192566 ns);
             tpd_SN_QN : VitalDelayType01 := (0.149269 ns, 0.100657 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATSRX1 : entity is TRUE;
end TLATSRX1;

architecture behavioral of TLATSRX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( G_dly, G_ipd, tisd_G_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_G_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_G_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_G : std_ulogic := '0';
      VARIABLE TimeMarker_RN_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE G_EQ_0 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(G_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    Recovery       => trecovery_SN_G_posedge_negedge,
                    Removal        => tremoval_SN_G_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    TimingData     => TimeMarker_rec_G_SN_posedge,
                    Violation      => Tviol_rec_G_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_RN_G_posedge_negedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_G_negedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    TimingData     => TimeMarker_RN_G,
                    Violation      => Tviol_RN_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATSRX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_G_SN_posedge OR
                        Tviol_RN_G OR
                        Tviol_D_G OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_G_posedge );

          n0_ENABLE := VitalAND2(G_dly, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);

          G_EQ_0 := VitalINV(G_dly);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATSRX2 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_G_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             trecovery_SN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_G_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             tpw_G_posedge : VitalDelayType := 0.256892 ns;
             tpw_RN_negedge : VitalDelayType := 0.21619 ns;
             tpw_SN_negedge : VitalDelayType := 0.156536 ns;
             tsetup_RN_G_posedge_negedge : VitalDelayType := 0.28125 ns;
             thold_RN_G_posedge_negedge : VitalDelayType := -0.0937499 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.1875 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.1875 ns;
             thold_D_G_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_D_G_negedge_negedge : VitalDelayType := -0.0937499 ns;
             tpd_D_Q : VitalDelayType01 := (0.2527 ns, 0.328291 ns);
             tpd_D_QN : VitalDelayType01 := (0.281135 ns, 0.209846 ns);
             tpd_G_Q : VitalDelayType01 := (0.338076 ns, 0.381455 ns);
             tpd_G_QN : VitalDelayType01 := (0.333996 ns, 0.295207 ns);
             tpd_RN_Q : VitalDelayType01 := (0.342649 ns, 0.341908 ns);
             tpd_RN_QN : VitalDelayType01 := (0.294963 ns, 0.299779 ns);
             tpd_SN_Q : VitalDelayType01 := (0.155848 ns, 0.224429 ns);
             tpd_SN_QN : VitalDelayType01 := (0.177432 ns, 0.113179 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATSRX2 : entity is TRUE;
end TLATSRX2;

architecture behavioral of TLATSRX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( G_dly, G_ipd, tisd_G_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_G_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_G_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_G : std_ulogic := '0';
      VARIABLE TimeMarker_RN_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE G_EQ_0 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(G_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    Recovery       => trecovery_SN_G_posedge_negedge,
                    Removal        => tremoval_SN_G_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    TimingData     => TimeMarker_rec_G_SN_posedge,
                    Violation      => Tviol_rec_G_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_RN_G_posedge_negedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_G_negedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    TimingData     => TimeMarker_RN_G,
                    Violation      => Tviol_RN_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATSRX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_G_SN_posedge OR
                        Tviol_RN_G OR
                        Tviol_D_G OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_G_posedge );

          n0_ENABLE := VitalAND2(G_dly, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0001 := n0_vec(1);

          P0000 := VitalINV(P0001);

          Q_zd := VitalBUF(P0001);

          QN_zd := VitalINV(P0001);

          G_EQ_0 := VitalINV(G_dly);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATSRX4 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_G_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0.00000000000000083 ns;
             trecovery_SN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_G_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             tpw_G_posedge : VitalDelayType := 0.294598 ns;
             tpw_RN_negedge : VitalDelayType := 0.251926 ns;
             tpw_SN_negedge : VitalDelayType := 0.177357 ns;
             tsetup_RN_G_posedge_negedge : VitalDelayType := 0.28125 ns;
             thold_RN_G_posedge_negedge : VitalDelayType := -0.1875 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.1875 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.28125 ns;
             thold_D_G_posedge_negedge : VitalDelayType := -0.0937499 ns;
             thold_D_G_negedge_negedge : VitalDelayType := -0.0937499 ns;
             tpd_D_Q : VitalDelayType01 := (0.291146 ns, 0.368276 ns);
             tpd_D_QN : VitalDelayType01 := (0.318836 ns, 0.245607 ns);
             tpd_G_Q : VitalDelayType01 := (0.375969 ns, 0.423326 ns);
             tpd_G_QN : VitalDelayType01 := (0.373863 ns, 0.33047 ns);
             tpd_RN_Q : VitalDelayType01 := (0.380944 ns, 0.38203 ns);
             tpd_RN_QN : VitalDelayType01 := (0.332906 ns, 0.335402 ns);
             tpd_SN_Q : VitalDelayType01 := (0.153158 ns, 0.227803 ns);
             tpd_SN_QN : VitalDelayType01 := (0.17882 ns, 0.108701 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATSRX4 : entity is TRUE;
end TLATSRX4;

architecture behavioral of TLATSRX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( G_dly, G_ipd, tisd_G_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_G_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_G_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_G : std_ulogic := '0';
      VARIABLE TimeMarker_RN_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE G_EQ_0 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(G_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    Recovery       => trecovery_SN_G_posedge_negedge,
                    Removal        => tremoval_SN_G_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    TimingData     => TimeMarker_rec_G_SN_posedge,
                    Violation      => Tviol_rec_G_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_RN_G_posedge_negedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_G_negedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    TimingData     => TimeMarker_RN_G,
                    Violation      => Tviol_RN_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATSRX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_G_SN_posedge OR
                        Tviol_RN_G OR
                        Tviol_D_G OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_G_posedge );

          n0_ENABLE := VitalAND2(G_dly, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);

          G_EQ_0 := VitalINV(G_dly);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATSRXL is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_RN : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_G_RN : VitalDelayType := DefDummyIcd;
             tipd_RN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_RN : VitalDelayType := DefDummyIcd;
             tipd_SN : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_SN_RN : VitalDelayType := DefDummyIsd;
             trecovery_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_RN_posedge_posedge : VitalDelayType := 0.0937499 ns;
             trecovery_SN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tremoval_SN_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tpw_G_posedge : VitalDelayType := 0.205942 ns;
             tpw_RN_negedge : VitalDelayType := 0.169394 ns;
             tpw_SN_negedge : VitalDelayType := 0.111504 ns;
             tsetup_RN_G_posedge_negedge : VitalDelayType := 0.1875 ns;
             thold_RN_G_posedge_negedge : VitalDelayType := -0.0937499 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.1875 ns;
             thold_D_G_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tpd_D_Q : VitalDelayType01 := (0.192937 ns, 0.24063 ns);
             tpd_D_QN : VitalDelayType01 := (0.202154 ns, 0.156156 ns);
             tpd_G_Q : VitalDelayType01 := (0.280218 ns, 0.293118 ns);
             tpd_G_QN : VitalDelayType01 := (0.254018 ns, 0.243308 ns);
             tpd_RN_Q : VitalDelayType01 := (0.284751 ns, 0.257691 ns);
             tpd_RN_QN : VitalDelayType01 := (0.219391 ns, 0.247747 ns);
             tpd_SN_Q : VitalDelayType01 := (0.11375 ns, 0.15199 ns);
             tpd_SN_QN : VitalDelayType01 := (0.114017 ns, 0.077247 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         RN : in std_ulogic := 'U' ;
         SN : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATSRXL : entity is TRUE;
end TLATSRXL;

architecture behavioral of TLATSRXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';
   SIGNAL RN_dly : std_ulogic := 'X';
   SIGNAL RN_ipd : std_ulogic := 'X';
   SIGNAL SN_dly : std_ulogic := 'X';
   SIGNAL SN_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
   VitalWireDelay( RN_ipd, RN, tipd_RN );
   VitalWireDelay( SN_ipd, SN, tipd_SN );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_RN );
   VitalSignalDelay( G_dly, G_ipd, tisd_G_RN );
   VitalSignalDelay( RN_dly, RN_ipd, ticd_RN );
   VitalSignalDelay( SN_dly, SN_ipd, tisd_SN_RN );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly, RN_dly, SN_dly)

      --timing checks section variables
      VARIABLE Tviol_rec_RN_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_RN_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_rec_G_SN_posedge : std_ulogic := '0';
      VARIABLE TimeMarker_rec_G_SN_posedge : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_RN_G : std_ulogic := '0';
      VARIABLE TimeMarker_RN_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_SN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_SN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_RN_negedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_RN_negedge : VitalPeriodDataType;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_ENABLE : std_ulogic;
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SET : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE G_EQ_0 : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE D_EQ_0_AN_RN_EQ_1 : std_ulogic;
      VARIABLE D_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE RN_EQ_1_AN_SN_EQ_1 : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => RN_dly,
                    RefSignalName  => "RN",
                    Recovery       => trecovery_SN_RN_posedge_posedge,
                    Removal        => tremoval_SN_RN_posedge_posedge,
                    CheckEnabled   => To_X01(G_EQ_0) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'R',
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    TimingData     => TimeMarker_rec_RN_SN_posedge,
                    Violation      => Tviol_rec_RN_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalRecoveryRemovalCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    Recovery       => trecovery_SN_G_posedge_negedge,
                    Removal        => tremoval_SN_G_posedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_0_AN_RN_EQ_1) /= '0',
                    ActiveLow      => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    TimingData     => TimeMarker_rec_G_SN_posedge,
                    Violation      => Tviol_rec_G_SN_posedge,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_RN_G_posedge_negedge,
                    SetupLow       => 0 ns,
                    HoldHigh       => 0 ns,
                    HoldLow        => thold_RN_G_negedge_negedge,
                    CheckEnabled   => To_X01(D_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    TimingData     => TimeMarker_RN_G,
                    Violation      => Tviol_RN_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => To_X01(RN_EQ_1_AN_SN_EQ_1) /= '0',
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => SN_dly,
                    TestSignalName => "SN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_SN_negedge,
                    PeriodData     => PeriodCheckInfo_SN_negedge,
                    Violation      => PWviol_SN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => RN_dly,
                    TestSignalName => "RN",
                    Period         => 0 ps,
                    PulseWidthHigh => 0 ns,
                    PulseWidthLow  => tpw_RN_negedge,
                    PeriodData     => PeriodCheckInfo_RN_negedge,
                    Violation      => PWviol_RN_negedge,
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATSRXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_rec_RN_SN_posedge OR
                        Tviol_rec_G_SN_posedge OR
                        Tviol_RN_G OR
                        Tviol_D_G OR
                        PWviol_SN_negedge OR
                        PWviol_RN_negedge OR
                        PWviol_G_posedge );

          n0_ENABLE := VitalAND2(G_dly, RN_dly);

          n0_RN_dly := '0';

          n0_SET := VitalINV(SN_dly);

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, n0_ENABLE, n0_RN_dly, n0_SET),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);

          G_EQ_0 := VitalINV(G_dly);

          n1_var := VitalINV(D_dly);
          D_EQ_0_AN_RN_EQ_1 := VitalAND2(n1_var, RN_dly);

          D_EQ_1_AN_SN_EQ_1 := VitalAND2(D_dly, SN_dly);

          RN_EQ_1_AN_SN_EQ_1 := VitalAND2(RN_dly, SN_dly);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_Q,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE),
                      2 => ( RN_dly'LAST_EVENT,
                             tpd_RN_QN,
                             TRUE),
                      3 => ( SN_dly'LAST_EVENT,
                             tpd_SN_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATX1 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_G : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_G : VitalDelayType := DefDummyIcd;
             tpw_G_posedge : VitalDelayType := 0.177164 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.1875 ns;
             thold_D_G_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tpd_D_Q : VitalDelayType01 := (0.220037 ns, 0.222018 ns);
             tpd_D_QN : VitalDelayType01 := (0.184815 ns, 0.179595 ns);
             tpd_G_Q : VitalDelayType01 := (0.271373 ns, 0.235293 ns);
             tpd_G_QN : VitalDelayType01 := (0.198034 ns, 0.230776 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATX1 : entity is TRUE;
end TLATX1;

architecture behavioral of TLATX1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_G );
   VitalSignalDelay( G_dly, G_ipd, ticd_G );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly)

      --timing checks section variables
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE QINT : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATX1",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATX1",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_G OR
                        PWviol_G_posedge );

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, G_dly, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          QINT := n0_vec(1);

          P0000 := VitalINV(QINT);

          Q_zd := VitalBUF(QINT);

          QN_zd := VitalINV(QINT);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATX2 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_G : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_G : VitalDelayType := DefDummyIcd;
             tpw_G_posedge : VitalDelayType := 0.196285 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.1875 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.1875 ns;
             thold_D_G_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_D_G_negedge_negedge : VitalDelayType := -0.0937499 ns;
             tpd_D_Q : VitalDelayType01 := (0.248876 ns, 0.253177 ns);
             tpd_D_QN : VitalDelayType01 := (0.213999 ns, 0.206127 ns);
             tpd_G_Q : VitalDelayType01 := (0.299463 ns, 0.266493 ns);
             tpd_G_QN : VitalDelayType01 := (0.227202 ns, 0.256667 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATX2 : entity is TRUE;
end TLATX2;

architecture behavioral of TLATX2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_G );
   VitalSignalDelay( G_dly, G_ipd, ticd_G );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly)

      --timing checks section variables
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATX2",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATX2",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_G OR
                        PWviol_G_posedge );

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, G_dly, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATX4 is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_G : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_G : VitalDelayType := DefDummyIcd;
             tpw_G_posedge : VitalDelayType := 0.229555 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.1875 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.1875 ns;
             thold_D_G_posedge_negedge : VitalDelayType := -0.0937499 ns;
             thold_D_G_negedge_negedge : VitalDelayType := -0.0937499 ns;
             tpd_D_Q : VitalDelayType01 := (0.285324 ns, 0.294782 ns);
             tpd_D_QN : VitalDelayType01 := (0.25373 ns, 0.240887 ns);
             tpd_G_Q : VitalDelayType01 := (0.336208 ns, 0.307462 ns);
             tpd_G_QN : VitalDelayType01 := (0.266404 ns, 0.291715 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATX4 : entity is TRUE;
end TLATX4;

architecture behavioral of TLATX4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_G );
   VitalSignalDelay( G_dly, G_ipd, ticd_G );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly)

      --timing checks section variables
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE P0000 : std_ulogic;
      VARIABLE P0001 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATX4",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATX4",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_G OR
                        PWviol_G_posedge );

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, G_dly, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          P0000 := n0_vec(1);

          P0001 := VitalINV(P0000);

          Q_zd := VitalBUF(P0000);

          QN_zd := VitalINV(P0000);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity TLATXL is
   generic (
             tipd_D : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tisd_D_G : VitalDelayType := DefDummyIsd;
             tipd_G : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             ticd_G : VitalDelayType := DefDummyIcd;
             tpw_G_posedge : VitalDelayType := 0.162533 ns;
             tsetup_D_G_posedge_negedge : VitalDelayType := 0.0937499 ns;
             tsetup_D_G_negedge_negedge : VitalDelayType := 0.0937499 ns;
             thold_D_G_posedge_negedge : VitalDelayType := 0.000000000741743 ns;
             thold_D_G_negedge_negedge : VitalDelayType := 0.00000000000000083 ns;
             tpd_D_Q : VitalDelayType01 := (0.190764 ns, 0.196494 ns);
             tpd_D_QN : VitalDelayType01 := (0.163107 ns, 0.154306 ns);
             tpd_G_Q : VitalDelayType01 := (0.24206 ns, 0.209743 ns);
             tpd_G_QN : VitalDelayType01 := (0.176138 ns, 0.205531 ns);

             TimingChecksOn : BOOLEAN := false;
             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         D : in std_ulogic := 'U' ;
         G : in std_ulogic := 'U' ;
         Q : out std_ulogic ;
         QN : out std_ulogic);

   attribute VITAL_LEVEL0 of TLATXL : entity is TRUE;
end TLATXL;

architecture behavioral of TLATXL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL D_dly : std_ulogic := 'X';
   SIGNAL D_ipd : std_ulogic := 'X';
   SIGNAL G_dly : std_ulogic := 'X';
   SIGNAL G_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( D_ipd, D, tipd_D );
   VitalWireDelay( G_ipd, G, tipd_G );
END BLOCK;

SIGNALDELAY : BLOCK
BEGIN
   VitalSignalDelay( D_dly, D_ipd, tisd_D_G );
   VitalSignalDelay( G_dly, G_ipd, ticd_G );
END BLOCK;

VITALBehavior : PROCESS (D_dly, G_dly)

      --timing checks section variables
      VARIABLE Tviol_D_G : std_ulogic := '0';
      VARIABLE TimeMarker_D_G : VitalTimingDataType := VitalTimingDataInit;
      VARIABLE PWviol_G_posedge : std_ulogic := '0';
      VARIABLE PeriodCheckInfo_G_posedge : VitalPeriodDataType;

      -- functionality section variables
      VARIABLE n0_RN_dly : std_ulogic := '0';
      VARIABLE n0_SN_dly : std_ulogic := '0';
      VARIABLE QINT : std_ulogic;
      VARIABLE P0000 : std_ulogic;
      VARIABLE n0_vec : std_logic_vector( 1 TO 1 );
      VARIABLE PrevData_udp_tlat_n0 : std_logic_vector( 0 TO 4 );
      VARIABLE Q_zd : std_ulogic;
      VARIABLE QN_zd : std_ulogic;
      VARIABLE NOTIFIER : std_ulogic := '0';

      -- path delay section variables
      VARIABLE Q_GlitchData : VitalGlitchDataType;
      VARIABLE QN_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Timing checks section
          IF (TimingChecksOn) THEN

                VitalSetupHoldCheck (
                    TestSignal     => D_dly,
                    TestSignalName => "D",
                    RefSignal      => G_dly,
                    RefSignalName  => "G",
                    SetupHigh      => tsetup_D_G_posedge_negedge,
                    SetupLow       => tsetup_D_G_negedge_negedge,
                    HoldHigh       => thold_D_G_posedge_negedge,
                    HoldLow        => thold_D_G_negedge_negedge,
                    CheckEnabled   => TRUE,
                    RefTransition  => 'F',
                    HeaderMsg      => InstancePath & "/TLATXL",
                    TimingData     => TimeMarker_D_G,
                    Violation      => Tviol_D_G,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

                VitalPeriodPulseCheck (
                    TestSignal     => G_dly,
                    TestSignalName => "G",
                    Period         => 0 ps,
                    PulseWidthHigh => tpw_G_posedge,
                    PulseWidthLow  => 0 ns,
                    PeriodData     => PeriodCheckInfo_G_posedge,
                    Violation      => PWviol_G_posedge,
                    HeaderMsg      => InstancePath & "/TLATXL",
                    CheckEnabled   => TRUE,
                    XOn            => DefSeqXOn,
                    MsgOn          => DefSeqMsgOn,
                    MsgSeverity    => WARNING );

          END IF;


          -- Functionality section
          NOTIFIER := (
                        Tviol_D_G OR
                        PWviol_G_posedge );

          n0_RN_dly := '0';

          n0_SN_dly := '0';

          VitalStateTable ( StateTable => udp_tlat,
                                DataIn => (NOTIFIER, D_dly, G_dly, n0_RN_dly, n0_SN_dly),
                             NumStates => 1,
                                Result => n0_vec,
                        PreviousDataIn => PrevData_udp_tlat_n0 );

          QINT := n0_vec(1);

          P0000 := VitalINV(QINT);

          Q_zd := VitalBUF(QINT);

          QN_zd := VitalINV(QINT);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Q,
               OutSignalName => "Q",
               OutTemp => Q_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_Q,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_Q,
                             TRUE)),
               GlitchData => Q_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );

          VitalPathDelay01(
               OutSignal     => QN,
               OutSignalName => "QN",
               OutTemp => QN_zd,
               Paths => (
                      0 => ( D_dly'LAST_EVENT,
                             tpd_D_QN,
                             TRUE),
                      1 => ( G_dly'LAST_EVENT,
                             tpd_G_QN,
                             TRUE)),
               GlitchData => QN_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.126094 ns, 0.131469 ns);
             tpd_B_Y : VitalDelayType01 := (0.100951 ns, 0.0927974 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR2X1 : entity is TRUE;
end XNOR2X1;

architecture behavioral of XNOR2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.158744 ns, 0.168938 ns);
             tpd_B_Y : VitalDelayType01 := (0.133254 ns, 0.128146 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR2X2 : entity is TRUE;
end XNOR2X2;

architecture behavioral of XNOR2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.204367 ns, 0.215994 ns);
             tpd_B_Y : VitalDelayType01 := (0.16387 ns, 0.155966 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR2X4 : entity is TRUE;
end XNOR2X4;

architecture behavioral of XNOR2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.10955 ns, 0.111678 ns);
             tpd_B_Y : VitalDelayType01 := (0.0846284 ns, 0.0743164 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR2XL : entity is TRUE;
end XNOR2XL;

architecture behavioral of XNOR2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalINV(n0_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.190859 ns, 0.19444 ns);
             tpd_B_Y : VitalDelayType01 := (0.139194 ns, 0.135863 ns);
             tpd_C_Y : VitalDelayType01 := (0.0877728 ns, 0.0885754 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR3X1 : entity is TRUE;
end XNOR3X1;

architecture behavioral of XNOR3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          n1_var := VitalXOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XNOR3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.192282 ns, 0.172589 ns);
             tpd_B_Y : VitalDelayType01 := (0.137029 ns, 0.116579 ns);
             tpd_C_Y : VitalDelayType01 := (0.0880304 ns, 0.070471 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XNOR3XL : entity is TRUE;
end XNOR3XL;

architecture behavioral of XNOR3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE n1_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          n1_var := VitalXOR2(n0_var, C_ipd);
          Y_zd := VitalINV(n1_var);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR2X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.124336 ns, 0.129473 ns);
             tpd_B_Y : VitalDelayType01 := (0.0905571 ns, 0.101103 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR2X1 : entity is TRUE;
end XOR2X1;

architecture behavioral of XOR2X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR2X2 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.157397 ns, 0.167107 ns);
             tpd_B_Y : VitalDelayType01 := (0.122379 ns, 0.138311 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR2X2 : entity is TRUE;
end XOR2X2;

architecture behavioral of XOR2X2 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR2X4 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.20434 ns, 0.216911 ns);
             tpd_B_Y : VitalDelayType01 := (0.151509 ns, 0.170284 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR2X4 : entity is TRUE;
end XOR2X4;

architecture behavioral of XOR2X4 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR2XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.107361 ns, 0.109362 ns);
             tpd_B_Y : VitalDelayType01 := (0.0746331 ns, 0.0815051 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR2XL : entity is TRUE;
end XOR2XL;

architecture behavioral of XOR2XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd)


      -- functionality section variables
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          Y_zd := VitalXOR2(A_ipd, B_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR3X1 is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.189924 ns, 0.192385 ns);
             tpd_B_Y : VitalDelayType01 := (0.13802 ns, 0.133437 ns);
             tpd_C_Y : VitalDelayType01 := (0.0886119 ns, 0.0890249 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR3X1 : entity is TRUE;
end XOR3X1;

architecture behavioral of XOR3X1 is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalXOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


LIBRARY IEEE;
USE IEEE.Std_logic_1164.all;
USE IEEE.VITAL_Timing.all;
USE IEEE.VITAL_Primitives.all;
USE work.prim.all;

entity XOR3XL is
   generic (
             tipd_A : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_B : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tipd_C : VitalDelayType01 := (DefDummyIpd, DefDummyIpd);
             tpd_A_Y : VitalDelayType01 := (0.193623 ns, 0.173791 ns);
             tpd_B_Y : VitalDelayType01 := (0.13704 ns, 0.114469 ns);
             tpd_C_Y : VitalDelayType01 := (0.0877267 ns, 0.0712006 ns);

             XOn            : BOOLEAN := DefCombSpikeXOn;
             MsgOn          : BOOLEAN := DefCombSpikeMsgOn;
             instancePath   : STRING  := "*" );

   port (
         A : in std_ulogic := 'U' ;
         B : in std_ulogic := 'U' ;
         C : in std_ulogic := 'U' ;
         Y : out std_ulogic);

   attribute VITAL_LEVEL0 of XOR3XL : entity is TRUE;
end XOR3XL;

architecture behavioral of XOR3XL is
   attribute VITAL_LEVEL1 of behavioral : architecture is TRUE;

   SIGNAL A_ipd : std_ulogic := 'X';
   SIGNAL B_ipd : std_ulogic := 'X';
   SIGNAL C_ipd : std_ulogic := 'X';

begin

--Input Path Delays
WIREDELAY : BLOCK
BEGIN
   VitalWireDelay( A_ipd, A, tipd_A );
   VitalWireDelay( B_ipd, B, tipd_B );
   VitalWireDelay( C_ipd, C, tipd_C );
END BLOCK;

VITALBehavior : PROCESS (A_ipd, B_ipd, C_ipd)


      -- functionality section variables
      VARIABLE n0_var : std_ulogic;
      VARIABLE Y_zd : std_ulogic;

      -- path delay section variables
      VARIABLE Y_GlitchData : VitalGlitchDataType;

      BEGIN
          -- Functionality section
          n0_var := VitalXOR2(A_ipd, B_ipd);
          Y_zd := VitalXOR2(n0_var, C_ipd);


          -- Path delay section
          VitalPathDelay01(
               OutSignal     => Y,
               OutSignalName => "Y",
               OutTemp => Y_zd,
               Paths => (
                      0 => ( A_ipd'LAST_EVENT,
                             tpd_A_Y,
                             TRUE),
                      1 => ( B_ipd'LAST_EVENT,
                             tpd_B_Y,
                             TRUE),
                      2 => ( C_ipd'LAST_EVENT,
                             tpd_C_Y,
                             TRUE)),
               GlitchData => Y_GlitchData,
               Mode  => OnEvent,
               XOn            => XOn,
               MsgOn          => MsgOn,
               MsgSeverity    => WARNING );


END PROCESS;

end behavioral;


