// Verilog-AMS netlist generated by the AMS netlister, version ICOA5.2.51.500.7.
// Cadence Design Systems, Inc.

`include "disciplines.vams"
 
module trans_inv_1X ( Vgnd,in,out,Vpwr ); 

input   Vgnd;
input   in;
output   out;
input   Vpwr;

 
parameter td=0;
parameter tr=0;
parameter tf=0;
 
 
 
gpdk090_pmos2v #(.ps(4u), .m(1 * 1), .as(840f), .l(280.0n), .pd(4u), .ad(840f),
 .w(1.4u)) (*
integer library_binding = "gpdk090";
integer 
passed_mfactor = "m";
 *)
PM1 ( out, in, Vpwr, Vpwr );
 
gpdk090_nmos2v #(.ps(3.07u), .m(1 * 1), .as(561f), .l(280.0n), .pd(3.07u),
 .ad(561f), .w(935n)) (*
integer library_binding = "gpdk090";
integer 
passed_mfactor = "m";
 *)
NM1 ( out, in, Vgnd, Vgnd );

endmodule
