// Verilog-AMS netlist generated by the AMS netlister, version ICOA5.2.51.500.7.
// Cadence Design Systems, Inc.

`include "disciplines.vams"
 
module PE68515_ssr ( Pminus,Pplus,Sminus,cnt_chip,Splus,cnt_line ); 

inout   Pminus;
inout   Pplus;
inout   Sminus;
inout   cnt_chip;

inout   Splus;
inout   cnt_line;

 
 
 
vcvs #(.gain(1.0)) (*
integer library_binding = "analogLib";
 *)
E1 ( 
cnt_line, Sminus, cnt_chip, Pminus );
vcvs #(.gain(1.0)) (*
integer library_binding = "analogLib";
 *)
E0 ( 
Splus, cnt_line, Pplus, cnt_chip );
 
resistor #(.r(8.1K)) (*
integer library_binding = "analogLib";
 *)
R6
 ( Pminus, Pplus );

endmodule
