// Verilog-AMS netlist generated by the AMS netlister, version ICOA5.2.51.500.7.
// Cadence Design Systems, Inc.

`include "disciplines.vams"
 
module adc ( out,VDD,INM,INP,SIDDQ,INP_TEST,INM_TEST,sample_test,
hold_test,hold,sample,ph2b,ph1,VSS,ref_ladder_100uA,ibias100,ibias100A,
ibias100B,ibias100C,ibias100D,ibias100E,ibias100F,ibias100G,ibias100H,
ibias100V,ibias50Y ); 

output [62:0]  out;
input   VDD;
input   INM;
input   INP;
input  
 SIDDQ;
input   INP_TEST;
input   INM_TEST;
input   sample_test;

input   hold_test;
input   hold;
input   sample;
input   ph2b;
input  
 ph1;
input   VSS;
input   ref_ladder_100uA;
input   ibias100;
input  
 ibias100A;
input   ibias100B;
input   ibias100C;
input   ibias100D;

input   ibias100E;
input   ibias100F;
input   ibias100G;
input  
 ibias100H;
input   ibias100V;
input   ibias50Y;

 
 
gpdk090_resm2 #(.w(2u), .r(75m), .l(8u)) (*
integer library_binding
 = "gpdk090";
 *)
R0 ( net0132, ref_ladder_100uA );
 
adc_64comparators (*
integer library_binding = "ether";
 *)

ADC_64COMPARATORS ( .in3p( out3p ), .ibiasF100( ibias100F ), .ibiasG100( 
ibias100G ), .in4n( out4n ), .in5p( out5p ), .ibiasB100( ibias100B ), 
.in8p( out8p ), .SIDDQ( SIDDQ ), .in1n( out1n ), .ibiasE100( ibias100E ), 
.in2p( out2p ), .in6p( out6p ), .in8n( out8n ), .in6n( out6n ), .in7n( 
out7n ), .in7p( out7p ), .in4p( out4p ), .in1p( out1p ), .in3n( out3n ), 
.in0n( out0n ), .ibiasC100( ibias100C ), .VDD( VDD ), .ph2b( ph2b ), .dm8n( 
net56 ), .ph1( ph1 ), .out( out[62:0] ), .in2n( out2n ), .in5n( out5n ), 
.dm0p( net080 ), .ibiasH100( ibias100H ), .VSS( VSS ), .dm0n( net90 ), 
.dm8p( net55 ), .ibiasA100( ibias100A ), .ibiasD100( ibias100D ), .in0p( 
out0p ) );
 
adc_interp_array (*
integer library_binding = "ether";
 *)

ADC_INTERP_ARRAY ( .out5n( out5n ), .out0p( out0p ), .out7p( out7p ), 
.out7n( out7n ), .SIDDQ( SIDDQ ), .out5p( out5p ), .ref9( ref9 ), .out6n( 
out6n ), .vinm( shoutm ), .out3n( out3n ), .out2p( out2p ), .ref7( 
ref7 ), .out4n( out4n ), .out1p( out1p ), .vinp( shoutp ), .out8n( 
out8n ), .out0n( out0n ), .ref1( ref1 ), .out8p( out8p ), .out4p( 
out4p ), .ref10( net0132 ), .ref8( ref8 ), .out6p( out6p ), .out3p( 
out3p ), .VDD( VDD ), .ref4( ref4 ), .ref3( ref3 ), .ref0( ref0 ), .dm8n( 
net56 ), .out2n( out2n ), .ref2( ref2 ), .out1n( out1n ), .bias100( 
ibias100 ), .VSS( VSS ), .dm0p( net080 ), .dm0n( net90 ), .ref6( ref6 ), 
.dm8p( net55 ), .ref5( ref5 ) );
 
adc_ref_ladder (*
integer library_binding = "ether";
 *)

ADC_REF_LADDER ( .INP( shoutp ), .SIDDQ( SIDDQ ), .ref9( ref9 ), .ibias50( 
ibias50Y ), .ref7( ref7 ), .ref1( ref1 ), .VDD( VDD ), .ref8( ref8 ), 
.ref10( net0132 ), .ref0( ref0 ), .ref3( ref3 ), .ref4( ref4 ), .INM( 
shoutm ), .ref2( ref2 ), .VSS( VSS ), .ref6( ref6 ), .ref5( ref5 ) );
 
adc_sample_hold (*
integer library_binding = "ether";
 *)

ADC_SAMPLE_HOLD ( .SIDDQ( SIDDQ ), .hold_test( hold_test ), .inp( INP ), 
.sample_test( sample_test ), .inm_test( INM_TEST ), .outp( shoutp ), .sample( 
sample ), .outm( shoutm ), .VDD( VDD ), .inm( INM ), .hold( hold ), .bias100( 
ibias100V ), .VSS( VSS ), .inp_test( INP_TEST ) );

endmodule
