$FILE_FORMAT_VERSION
	Version 1.1;
$END
$GLOBAL_SIGNALS
	VDD!:::4-user5-false11-inUseByCDBA5-false4-lang4-CDBA4-wire4-wire6-discip0-3-gnd5-false5-alias5-false5-alsIx1-0;
	VSS!:::4-user5-false11-inUseByCDBA5-false4-lang4-CDBA4-wire4-wire6-discip0-3-gnd5-false5-alias5-false5-alsIx1-0;
	gnd!:::4-user5-false11-inUseByCDBA4-true4-lang4-CDBA4-wire4-wire6-discip0-3-gnd4-true5-alias5-false5-alsIx1-0;
$END
$TIMESTAMP
	1099515144000=verilog.vams;
$END
$DESIGN_VARIABLES
	VMULT:4-user5-false11-inUseByCDBA4-true4-type4-real5-value1-114-valueSetInForm4-true;
	freg:4-user4-true11-inUseByCDBA5-false4-type4-real5-value11-4.16667E+0814-valueSetInForm4-true;
	fvco:4-user4-true11-inUseByCDBA5-false4-type4-real5-value7-2.5E+0914-valueSetInForm4-true;
$END
